RTEMS 6.1-rc1
reg_iomm.h
1/* The header file is generated by make_header.py from IOMM.json */
2/* Current script's version can be found at: */
3/* https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python */
4
5/*
6 * Copyright (c) 2014-2015, Premysl Houdek <kom541000@gmail.com>
7 *
8 * Czech Technical University in Prague
9 * Zikova 1903/4
10 * 166 36 Praha 6
11 * Czech Republic
12 *
13 * All rights reserved.
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions are met:
17 *
18 * 1. Redistributions of source code must retain the above copyright notice, this
19 * list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright notice,
21 * this list of conditions and the following disclaimer in the documentation
22 * and/or other materials provided with the distribution.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
28 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
31 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
33 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 * The views and conclusions contained in the software and documentation are those
36 * of the authors and should not be interpreted as representing official policies,
37 * either expressed or implied, of the FreeBSD Project.
38*/
39#ifndef LIBBSP_ARM_TMS570_IOMM
40#define LIBBSP_ARM_TMS570_IOMM
41
42#include <bsp/utility.h>
43
44typedef struct{
45 uint32_t PINMMR0; /*Pin Multiplexing Control Register 0*/
46 uint32_t PINMMR1; /*Pin Multiplexing Control Register 1*/
47 uint32_t PINMMR2; /*Pin Multiplexing Control Register 2*/
48 uint32_t PINMMR3; /*Pin Multiplexing Control Register 3*/
49 uint32_t PINMMR4; /*Pin Multiplexing Control Register 4*/
50 uint32_t PINMMR5; /*Pin Multiplexing Control Register 5*/
51 uint32_t PINMMR6; /*Pin Multiplexing Control Register 6*/
52 uint32_t PINMMR7; /*Pin Multiplexing Control Register 7*/
53 uint32_t PINMMR8; /*Pin Multiplexing Control Register 8*/
54 uint32_t PINMMR9; /*Pin Multiplexing Control Register 9*/
55 uint32_t PINMMR10; /*Pin Multiplexing Control Register 10*/
56 uint32_t PINMMR11; /*Pin Multiplexing Control Register 11*/
57 uint32_t PINMMR12; /*Pin Multiplexing Control Register 12*/
58 uint32_t PINMMR13; /*Pin Multiplexing Control Register 13*/
59 uint32_t PINMMR14; /*Pin Multiplexing Control Register 14*/
60 uint32_t PINMMR15; /*Pin Multiplexing Control Register 15*/
61 uint32_t PINMMR16; /*Pin Multiplexing Control Register 16*/
62 uint32_t PINMMR17; /*Pin Multiplexing Control Register 17*/
63 uint32_t PINMMR18; /*Pin Multiplexing Control Register 18*/
64 uint32_t PINMMR19; /*Pin Multiplexing Control Register 19*/
65 uint32_t PINMMR20; /*Pin Multiplexing Control Register 20*/
66 uint32_t PINMMR21; /*Pin Multiplexing Control Register 21*/
67 uint32_t PINMMR22; /*Pin Multiplexing Control Register 22*/
68 uint32_t PINMMR23; /*Pin Multiplexing Control Register 23*/
69 uint32_t PINMMR24; /*Pin Multiplexing Control Register 24*/
70 uint32_t PINMMR25; /*Pin Multiplexing Control Register 25*/
71 uint32_t PINMMR26; /*Pin Multiplexing Control Register 26*/
72 uint32_t PINMMR27; /*Pin Multiplexing Control Register 27*/
73 uint32_t PINMMR28; /*Pin Multiplexing Control Register 28*/
74 uint32_t PINMMR29; /*Pin Multiplexing Control Register 29*/
75 uint32_t PINMMR30; /*Pin Multiplexing Control Register 30*/
76} tms570_pinmux_t;
77
78typedef struct{
79 uint32_t REVISION_REG; /*Revision Register*/
80 uint8_t reserved1 [28];
81 uint32_t ENDIAN_REG; /*Device Endianness Register*/
82 uint8_t reserved2 [20];
83 uint32_t KICK_REG0; /*Kicker Register 0*/
84 uint32_t KICK_REG1; /*Kicker Register 1*/
85 uint8_t reserved3 [160];
86 uint32_t ERR_RAW_STATUS_REG;/*Error Raw Status / Set Register*/
87 uint32_t ERR_ENABLED_STATUS_REG;/*Error Enabled Status / Clear Register*/
88 uint32_t ERR_ENABLE_REG; /*Error Signaling Enable Register*/
89 uint32_t ERR_ENABLE_CLR_REG;/*Error Signaling Enable Clear Register*/
90 uint8_t reserved4 [4];
91 uint32_t FAULT_ADDRESS_REG; /*Fault Address Register*/
92 uint32_t FAULT_STATUS_REG; /*Fault Status Register*/
93 uint32_t FAULT_CLEAR_REG; /*Fault Clear Register*/
94 uint8_t reserved5 [16];
95 tms570_pinmux_t PINMUX; /*Pin Multiplexing Control Registers*/
96} tms570_iomm_t;
97
98
99/*--------------------TMS570_IOMM_PINMMRx--------------------*/
100/* field: PINMMRx24To31 - Each of these byte-fields control the functionality on a given ball/pin. */
101#define TMS570_IOMM_PINMMRx_PINMMRx24To31(val) BSP_FLD32(val,24, 31)
102#define TMS570_IOMM_PINMMRx_PINMMRx24To31_GET(reg) BSP_FLD32GET(reg,24, 31)
103#define TMS570_IOMM_PINMMRx_PINMMRx24To31_SET(reg,val) BSP_FLD32SET(reg, val,24, 31)
104
105/* field: PINMMRx16To23 - Each of these byte-fields control the functionality on a given ball/pin. */
106#define TMS570_IOMM_PINMMRx_PINMMRx16To23(val) BSP_FLD32(val,16, 23)
107#define TMS570_IOMM_PINMMRx_PINMMRx16To23_GET(reg) BSP_FLD32GET(reg,16, 23)
108#define TMS570_IOMM_PINMMRx_PINMMRx16To23_SET(reg,val) BSP_FLD32SET(reg, val,16, 23)
109
110/* field: PINMMRx8To16 - Each of these byte-fields control the functionality on a given ball/pin. */
111#define TMS570_IOMM_PINMMRx_PINMMRx8To16(val) BSP_FLD32(val,8, 15)
112#define TMS570_IOMM_PINMMRx_PINMMRx8To16_GET(reg) BSP_FLD32GET(reg,8, 15)
113#define TMS570_IOMM_PINMMRx_PINMMRx8To16_SET(reg,val) BSP_FLD32SET(reg, val,8, 15)
114
115/* field: PINMMRx0To7 - Each of these byte-fields control the functionality on a given ball/pin. */
116#define TMS570_IOMM_PINMMRx_PINMMRx0To7(val) BSP_FLD32(val,0, 7)
117#define TMS570_IOMM_PINMMRx_PINMMRx0To7_GET(reg) BSP_FLD32GET(reg,0, 7)
118#define TMS570_IOMM_PINMMRx_PINMMRx0To7_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
119
120
121/*------------------TMS570_IOMM_REVISION_REG------------------*/
122/* field: REV_SCHEME - Revision Scheme */
123#define TMS570_IOMM_REVISION_REG_REV_SCHEME(val) BSP_FLD32(val,30, 31)
124#define TMS570_IOMM_REVISION_REG_REV_SCHEME_GET(reg) BSP_FLD32GET(reg,30, 31)
125#define TMS570_IOMM_REVISION_REG_REV_SCHEME_SET(reg,val) BSP_FLD32SET(reg, val,30, 31)
126
127/* field: REV_MODULE - Module Id */
128#define TMS570_IOMM_REVISION_REG_REV_MODULE(val) BSP_FLD32(val,16, 27)
129#define TMS570_IOMM_REVISION_REG_REV_MODULE_GET(reg) BSP_FLD32GET(reg,16, 27)
130#define TMS570_IOMM_REVISION_REG_REV_MODULE_SET(reg,val) BSP_FLD32SET(reg, val,16, 27)
131
132/* field: REV_RTL - RTL Revision */
133#define TMS570_IOMM_REVISION_REG_REV_RTL(val) BSP_FLD32(val,11, 15)
134#define TMS570_IOMM_REVISION_REG_REV_RTL_GET(reg) BSP_FLD32GET(reg,11, 15)
135#define TMS570_IOMM_REVISION_REG_REV_RTL_SET(reg,val) BSP_FLD32SET(reg, val,11, 15)
136
137/* field: REV_MAJOR - Major Revision */
138#define TMS570_IOMM_REVISION_REG_REV_MAJOR(val) BSP_FLD32(val,8, 10)
139#define TMS570_IOMM_REVISION_REG_REV_MAJOR_GET(reg) BSP_FLD32GET(reg,8, 10)
140#define TMS570_IOMM_REVISION_REG_REV_MAJOR_SET(reg,val) BSP_FLD32SET(reg, val,8, 10)
141
142/* field: REV_CUSTOM - REV CUSTOM 0 Custom Revision */
143#define TMS570_IOMM_REVISION_REG_REV_CUSTOM(val) BSP_FLD32(val,6, 7)
144#define TMS570_IOMM_REVISION_REG_REV_CUSTOM_GET(reg) BSP_FLD32GET(reg,6, 7)
145#define TMS570_IOMM_REVISION_REG_REV_CUSTOM_SET(reg,val) BSP_FLD32SET(reg, val,6, 7)
146
147/* field: REV_MINOR - Minor Revision */
148#define TMS570_IOMM_REVISION_REG_REV_MINOR(val) BSP_FLD32(val,0, 5)
149#define TMS570_IOMM_REVISION_REG_REV_MINOR_GET(reg) BSP_FLD32GET(reg,0, 5)
150#define TMS570_IOMM_REVISION_REG_REV_MINOR_SET(reg,val) BSP_FLD32SET(reg, val,0, 5)
151
152
153/*-------------------TMS570_IOMM_ENDIAN_REG-------------------*/
154/* field: ENDIAN - Device endianness */
155#define TMS570_IOMM_ENDIAN_REG_ENDIAN BSP_BIT32(0)
156
157
158/*-------------------TMS570_IOMM_KICK_REG0-------------------*/
159/* field: KICK0 - Kicker 0 Register. */
160/* Whole 32 bits */
161
162/*-------------------TMS570_IOMM_KICK_REG1-------------------*/
163/* field: KICK1 - Kicker 1 Register. */
164/* Whole 32 bits */
165
166/*---------------TMS570_IOMM_ERR_RAW_STATUS_REG---------------*/
167/* field: ADDR_ERR - Addressing Error Status and Error Signaling Enable. */
168#define TMS570_IOMM_ERR_RAW_STATUS_REG_ADDR_ERR BSP_BIT32(1)
169
170/* field: PROT_ERR - register inside the IOMM is written in the CPU's user mode of operation. */
171#define TMS570_IOMM_ERR_RAW_STATUS_REG_PROT_ERR BSP_BIT32(0)
172
173
174/*-------------TMS570_IOMM_ERR_ENABLED_STATUS_REG-------------*/
175/* field: ENABLED_ADDR_ERR - Addressing Error Signaling Enable Status and Status Clear */
176#define TMS570_IOMM_ERR_ENABLED_STATUS_REG_ENABLED_ADDR_ERR BSP_BIT32(1)
177
178/* field: ENABLED_PROT_ERR - Protection Error Signaling Enable Status and Status Clear */
179#define TMS570_IOMM_ERR_ENABLED_STATUS_REG_ENABLED_PROT_ERR BSP_BIT32(0)
180
181
182/*-----------------TMS570_IOMM_ERR_ENABLE_REG-----------------*/
183/* field: ADDR_ERR_EN - Addressing Error Signaling Enable */
184#define TMS570_IOMM_ERR_ENABLE_REG_ADDR_ERR_EN BSP_BIT32(1)
185
186/* field: PROT_ERR_EN - Protection ErrorSignaling Enable */
187#define TMS570_IOMM_ERR_ENABLE_REG_PROT_ERR_EN BSP_BIT32(0)
188
189
190/*---------------TMS570_IOMM_ERR_ENABLE_CLR_REG---------------*/
191/* field: ADDR_ERR_EN_CLR - Addressing Error Signaling Enable Clear */
192#define TMS570_IOMM_ERR_ENABLE_CLR_REG_ADDR_ERR_EN_CLR BSP_BIT32(1)
193
194/* field: PROT_ERR_EN_CLR - Protection Error Signaling Enable Clear */
195#define TMS570_IOMM_ERR_ENABLE_CLR_REG_PROT_ERR_EN_CLR BSP_BIT32(0)
196
197
198/*---------------TMS570_IOMM_FAULT_ADDRESS_REG---------------*/
199/* field: FAULT_ADDR - Fault Address. */
200/* Whole 32 bits */
201
202/*----------------TMS570_IOMM_FAULT_STATUS_REG----------------*/
203/* field: FAULT_ID - Faulting Transaction ID */
204#define TMS570_IOMM_FAULT_STATUS_REG_FAULT_ID(val) BSP_FLD32(val,24, 27)
205#define TMS570_IOMM_FAULT_STATUS_REG_FAULT_ID_GET(reg) BSP_FLD32GET(reg,24, 27)
206#define TMS570_IOMM_FAULT_STATUS_REG_FAULT_ID_SET(reg,val) BSP_FLD32SET(reg, val,24, 27)
207
208/* field: FAULT_MSTID - ID of Master that initiated the faulting transaction */
209#define TMS570_IOMM_FAULT_STATUS_REG_FAULT_MSTID(val) BSP_FLD32(val,16, 23)
210#define TMS570_IOMM_FAULT_STATUS_REG_FAULT_MSTID_GET(reg) BSP_FLD32GET(reg,16, 23)
211#define TMS570_IOMM_FAULT_STATUS_REG_FAULT_MSTID_SET(reg,val) BSP_FLD32SET(reg, val,16, 23)
212
213/* field: FAULT_PRIVID - Faulting Privilege ID */
214#define TMS570_IOMM_FAULT_STATUS_REG_FAULT_PRIVID(val) BSP_FLD32(val,9, 12)
215#define TMS570_IOMM_FAULT_STATUS_REG_FAULT_PRIVID_GET(reg) BSP_FLD32GET(reg,9, 12)
216#define TMS570_IOMM_FAULT_STATUS_REG_FAULT_PRIVID_SET(reg,val) BSP_FLD32SET(reg, val,9, 12)
217
218/* field: FAULT_TYPE - Type of fault detected */
219#define TMS570_IOMM_FAULT_STATUS_REG_FAULT_TYPE(val) BSP_FLD32(val,0, 5)
220#define TMS570_IOMM_FAULT_STATUS_REG_FAULT_TYPE_GET(reg) BSP_FLD32GET(reg,0, 5)
221#define TMS570_IOMM_FAULT_STATUS_REG_FAULT_TYPE_SET(reg,val) BSP_FLD32SET(reg, val,0, 5)
222
223
224/*----------------TMS570_IOMM_FAULT_CLEAR_REG----------------*/
225/* field: FAULT_CLEAR - Fault Clear */
226#define TMS570_IOMM_FAULT_CLEAR_REG_FAULT_CLEAR BSP_BIT32(0)
227
228
229/*---------------------TMS570_IOMM_PINMUX---------------------*/
230/* field: FAULT_CLEAR - Fault Clear */
231#define TMS570_IOMM_PINMUX_FAULT_CLEAR BSP_BIT32(0)
232
233
234
235#endif /* LIBBSP_ARM_TMS570_IOMM */
utility.h
This header file provides utility macros for BSPs.
tms570_iomm_t
Definition: reg_iomm.h:78
tms570_pinmux_t
Definition: reg_iomm.h:44
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