RTEMS 6.1-rc1
reg_flex_ray.h
1/* The header file is generated by make_header.py from FLEX_RAY.json */
2/* Current script's version can be found at: */
3/* https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python */
4
5/*
6 * Copyright (c) 2014-2015, Premysl Houdek <kom541000@gmail.com>
7 *
8 * Czech Technical University in Prague
9 * Zikova 1903/4
10 * 166 36 Praha 6
11 * Czech Republic
12 *
13 * All rights reserved.
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions are met:
17 *
18 * 1. Redistributions of source code must retain the above copyright notice, this
19 * list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright notice,
21 * this list of conditions and the following disclaimer in the documentation
22 * and/or other materials provided with the distribution.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
28 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
31 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
33 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 * The views and conclusions contained in the software and documentation are those
36 * of the authors and should not be interpreted as representing official policies,
37 * either expressed or implied, of the FreeBSD Project.
38*/
39#ifndef LIBBSP_ARM_TMS570_FLEX_RAY
40#define LIBBSP_ARM_TMS570_FLEX_RAY
41
42#include <bsp/utility.h>
43
44typedef struct{
45 uint32_t GSN0; /*Global Static Number 0*/
46 uint32_t GSN1; /*Global Static Number 1*/
47 uint8_t reserved1 [8];
48 uint32_t GCS; /*Global Control Set*/
49 uint32_t GCR; /*Global Control Reset*/
50 uint32_t TSCB; /*Transfer Status Current Buffer*/
51 uint32_t LTBCC; /*Last Transferred Buffer to Communication Controller*/
52 uint32_t LTBSM; /*Last Transferred Buffer to System Memory*/
53 uint32_t TBA; /*Transfer Base Address*/
54 uint32_t NTBA; /*Next Transfer Base Address*/
55 uint32_t BAMS; /*Base Address of Mirrored Status*/
56 uint32_t SAMP; /*Start Address of Memory Protection*/
57 uint32_t EAMP; /*End Address of Memory Protection*/
58 uint8_t reserved2 [8];
59 uint32_t TSMO1; /*Transfer to System Memory Occurred 1*/
60 uint32_t TSMO2; /*Transfer to System Memory Occurred 2*/
61 uint32_t TSMO3; /*Transfer to System Memory Occurred 3*/
62 uint32_t TSMO4; /*Transfer to System Memory Occurred 4*/
63 uint32_t TCCO1; /*Transfer to Communication Controller Occurred 1*/
64 uint32_t TCCO2; /*Transfer to Communication Controller Occurred 2*/
65 uint32_t TCCO3; /*Transfer to Communication Controller Occurred 3*/
66 uint32_t TCCO4; /*Transfer to Communication Controller Occurred 4*/
67 uint32_t TOOFF; /*Transfer Occurred Offset*/
68 uint8_t reserved3 [12];
69 uint32_t PEADR; /*Parity Error Address*/
70 uint32_t TEIF; /*Transfer Error Interrupt*/
71 uint32_t TEIRES; /*Transfer Error Interrupt Enable Set*/
72 uint32_t TEIRER; /*Transfer Error Interrupt Enable Reset*/
73 uint32_t TTSMS1; /*Trigger Transfer to System Memory Set 1*/
74 uint32_t TTSMR1; /*Trigger Transfer to System Memory Reset 1*/
75 uint32_t TTSMS2; /*Trigger Transfer to System Memory Set 2*/
76 uint32_t TTSMR2; /*Trigger Transfer to System Memory Reset 2*/
77 uint32_t TTSMS3; /*Trigger Transfer to System Memory Set 3*/
78 uint32_t TTSMR3; /*Trigger Transfer to System Memory Reset 3*/
79 uint32_t TTSMS4; /*Trigger Transfer to System Memory Set 4*/
80 uint32_t TTSMR4; /*Trigger Transfer to System Memory Reset 4*/
81 uint32_t TTCCS1; /*Trigger Transfer to Communication Controller Set 1*/
82 uint32_t TTCCR1; /*Trigger Transfer to Communication Controller Reset 1*/
83 uint32_t TTCCS2; /*Trigger Transfer to Communication Controller Set 2*/
84 uint32_t TTCCR2; /*Trigger Transfer to Communication Controller Reset 2*/
85 uint32_t TTCCS3; /*Trigger Transfer to Communication Controller Set 3*/
86 uint32_t TTCCR3; /*Trigger Transfer to Communication Controller Reset 3*/
87 uint32_t TTCCS4; /*Trigger Transfer to Communication Controller Set 4*/
88 uint32_t TTCCR4; /*Trigger Transfer to Communication Controller Reset 4*/
89 uint32_t ETESMS1; /*Enable Transfer on Event to System Memory Set 1*/
90 uint32_t ETESMR1; /*Enable Transfer on Event to System Memory Reset 1*/
91 uint32_t ETESMS2; /*Enable Transfer on Event to System Memory Set 2*/
92 uint32_t ETESMR2; /*Enable Transfer on Event to System Memory Reset 2*/
93 uint32_t ETESMS3; /*Enable Transfer on Event to System Memory Set 3*/
94 uint32_t ETESMR3; /*Enable Transfer on Event to System Memory Reset 3*/
95 uint32_t ETESMS4; /*Enable Transfer on Event to System Memory Set 4*/
96 uint32_t ETESMR4; /*Enable Transfer on Event to System Memory Reset 4*/
97 uint32_t CESMS1; /*Clear on Event to System Memory Set 1*/
98 uint32_t CESMR1; /*Clear on Event to System Memory Reset 1*/
99 uint32_t CESMS2; /*Clear on Event to System Memory Set 2*/
100 uint32_t CESMR2; /*Clear on Event to System Memory Reset 2*/
101 uint32_t CESMS3; /*Clear on Event to System Memory Set 3*/
102 uint32_t CESMR3; /*Clear on Event to System Memory Reset 3*/
103 uint32_t CESMS4; /*Clear on Event to System Memory Set 4*/
104 uint32_t CESMR4; /*Clear on Event to System Memory Reset 4*/
105 uint32_t TSMIES1; /*Transfer to System Memory Interrupt Enable Set 1*/
106 uint32_t TSMIER1; /*Transfer to System Memory Interrupt Enable Reset 1*/
107 uint32_t TSMIES2; /*Transfer to System Memory Interrupt Enable Set 2*/
108 uint32_t TSMIER2; /*Transfer to System Memory Interrupt Enable Reset 2*/
109 uint32_t TSMIES3; /*Transfer to System Memory Interrupt Enable Set 3*/
110 uint32_t TSMIER3; /*Transfer to System Memory Interrupt Enable Reset 3*/
111 uint32_t TSMIES4; /*Transfer to System Memory Interrupt Enable Set 4*/
112 uint32_t TSMIER4; /*Transfer to System Memory Interrupt Enable Reset 4*/
113 uint32_t TCCIES1; /*Transfer to Communication Controller Interrupt Enable Set 1*/
114 uint32_t TCCIER1; /*Transfer to Communication Controller Interrupt Enable Reset 1*/
115 uint32_t TCCIES2; /*Transfer to Communication Controller Interrupt Enable Set 2*/
116 uint32_t TCCIER2; /*Transfer to Communication Controller Interrupt Enable Reset 2*/
117 uint32_t TCCIES3; /*Transfer to Communication Controller Interrupt Enable Set 3*/
118 uint32_t TCCIER3; /*Transfer to Communication Controller Interrupt Enable Reset 3*/
119 uint32_t TCCIES4; /*Transfer to Communication Controller Interrupt Enable Set 4*/
120 uint32_t TCCIER4; /*Transfer to Communication Controller Interrupt Enable Reset 4*/
122
123
124/*--------------------TMS570_FLEX_RAY_GSN0--------------------*/
125/* field: Data_A - Data_A(15-0) */
126#define TMS570_FLEX_RAY_GSN0_Data_A(val) BSP_FLD32(val,16, 31)
127#define TMS570_FLEX_RAY_GSN0_Data_A_GET(reg) BSP_FLD32GET(reg,16, 31)
128#define TMS570_FLEX_RAY_GSN0_Data_A_SET(reg,val) BSP_FLD32SET(reg, val,16, 31)
129
130/* field: Data_B - (complement of Data_A(15-0)) */
131#define TMS570_FLEX_RAY_GSN0_Data_B(val) BSP_FLD32(val,0, 15)
132#define TMS570_FLEX_RAY_GSN0_Data_B_GET(reg) BSP_FLD32GET(reg,0, 15)
133#define TMS570_FLEX_RAY_GSN0_Data_B_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
134
135
136/*--------------------TMS570_FLEX_RAY_GSN1--------------------*/
137/* field: Data_C - Data_C(15-0) */
138#define TMS570_FLEX_RAY_GSN1_Data_C(val) BSP_FLD32(val,16, 31)
139#define TMS570_FLEX_RAY_GSN1_Data_C_GET(reg) BSP_FLD32GET(reg,16, 31)
140#define TMS570_FLEX_RAY_GSN1_Data_C_SET(reg,val) BSP_FLD32SET(reg, val,16, 31)
141
142/* field: Data_D - (complement of Data_C(15-0)) */
143#define TMS570_FLEX_RAY_GSN1_Data_D(val) BSP_FLD32(val,0, 15)
144#define TMS570_FLEX_RAY_GSN1_Data_D_GET(reg) BSP_FLD32GET(reg,0, 15)
145#define TMS570_FLEX_RAY_GSN1_Data_D_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
146
147
148/*--------------------TMS570_FLEX_RAY_GCS--------------------*/
149/* field: ENDVBM - Endianness Correction on VBusp Master */
150#define TMS570_FLEX_RAY_GCS_ENDVBM BSP_BIT32(31)
151
152/* field: ENDVBS - Endianness correction on VBusp Slave */
153#define TMS570_FLEX_RAY_GCS_ENDVBS BSP_BIT32(30)
154
155/* field: ENDRx - Endianness Correction for No (header or payload) Data Sink Access */
156#define TMS570_FLEX_RAY_GCS_ENDRx(val) BSP_FLD32(val,28, 29)
157#define TMS570_FLEX_RAY_GCS_ENDRx_GET(reg) BSP_FLD32GET(reg,28, 29)
158#define TMS570_FLEX_RAY_GCS_ENDRx_SET(reg,val) BSP_FLD32SET(reg, val,28, 29)
159
160/* field: ENDHx - Endianness Correction for Header */
161#define TMS570_FLEX_RAY_GCS_ENDHx(val) BSP_FLD32(val,26, 27)
162#define TMS570_FLEX_RAY_GCS_ENDHx_GET(reg) BSP_FLD32GET(reg,26, 27)
163#define TMS570_FLEX_RAY_GCS_ENDHx_SET(reg,val) BSP_FLD32SET(reg, val,26, 27)
164
165/* field: ENDPx - Endianness Correction for Payload */
166#define TMS570_FLEX_RAY_GCS_ENDPx(val) BSP_FLD32(val,24, 25)
167#define TMS570_FLEX_RAY_GCS_ENDPx_GET(reg) BSP_FLD32GET(reg,24, 25)
168#define TMS570_FLEX_RAY_GCS_ENDPx_SET(reg,val) BSP_FLD32SET(reg, val,24, 25)
169
170/* field: PRIO - Transfer Priority */
171#define TMS570_FLEX_RAY_GCS_PRIO BSP_BIT32(21)
172
173/* field: PEFT - Parity for Test */
174#define TMS570_FLEX_RAY_GCS_PEFT BSP_BIT32(20)
175
176/* field: PELx - Parity Lock */
177#define TMS570_FLEX_RAY_GCS_PELx(val) BSP_FLD32(val,16, 19)
178#define TMS570_FLEX_RAY_GCS_PELx_GET(reg) BSP_FLD32GET(reg,16, 19)
179#define TMS570_FLEX_RAY_GCS_PELx_SET(reg,val) BSP_FLD32SET(reg, val,16, 19)
180
181/* field: CETESM - Clear ETESM Register */
182#define TMS570_FLEX_RAY_GCS_CETESM BSP_BIT32(14)
183
184/* field: CTTCC - Clear TTCC Register */
185#define TMS570_FLEX_RAY_GCS_CTTCC BSP_BIT32(13)
186
187/* field: CTTSM - Clear TTSM Register */
188#define TMS570_FLEX_RAY_GCS_CTTSM BSP_BIT32(12)
189
190/* field: ETSM - Enable Transfer Status Mirrored */
191#define TMS570_FLEX_RAY_GCS_ETSM BSP_BIT32(8)
192
193/* field: SILE - Status Interrupt Line Enable */
194#define TMS570_FLEX_RAY_GCS_SILE BSP_BIT32(5)
195
196/* field: EILE - Error Interrupt Line Enable */
197#define TMS570_FLEX_RAY_GCS_EILE BSP_BIT32(4)
198
199/* field: TUH - Transfer Unit Halted */
200#define TMS570_FLEX_RAY_GCS_TUH BSP_BIT32(1)
201
202/* field: TUE - Transfer Unit Enabled */
203#define TMS570_FLEX_RAY_GCS_TUE BSP_BIT32(0)
204
205
206/*--------------------TMS570_FLEX_RAY_GCR--------------------*/
207/* field: ENDVBM - Endianness Correction on VBusp Master */
208#define TMS570_FLEX_RAY_GCR_ENDVBM BSP_BIT32(31)
209
210/* field: ENDVBS - Endianness correction on VBusp Slave */
211#define TMS570_FLEX_RAY_GCR_ENDVBS BSP_BIT32(30)
212
213/* field: ENDRx - Endianness Correction for No (header or payload) Data Sink Access */
214#define TMS570_FLEX_RAY_GCR_ENDRx(val) BSP_FLD32(val,28, 29)
215#define TMS570_FLEX_RAY_GCR_ENDRx_GET(reg) BSP_FLD32GET(reg,28, 29)
216#define TMS570_FLEX_RAY_GCR_ENDRx_SET(reg,val) BSP_FLD32SET(reg, val,28, 29)
217
218/* field: ENDHx - Endianness Correction for Header */
219#define TMS570_FLEX_RAY_GCR_ENDHx(val) BSP_FLD32(val,26, 27)
220#define TMS570_FLEX_RAY_GCR_ENDHx_GET(reg) BSP_FLD32GET(reg,26, 27)
221#define TMS570_FLEX_RAY_GCR_ENDHx_SET(reg,val) BSP_FLD32SET(reg, val,26, 27)
222
223/* field: ENDPx - Endianness Correction for Payload */
224#define TMS570_FLEX_RAY_GCR_ENDPx(val) BSP_FLD32(val,24, 25)
225#define TMS570_FLEX_RAY_GCR_ENDPx_GET(reg) BSP_FLD32GET(reg,24, 25)
226#define TMS570_FLEX_RAY_GCR_ENDPx_SET(reg,val) BSP_FLD32SET(reg, val,24, 25)
227
228/* field: PRIO - Transfer Priority */
229#define TMS570_FLEX_RAY_GCR_PRIO BSP_BIT32(21)
230
231/* field: PEFT - Parity for Test */
232#define TMS570_FLEX_RAY_GCR_PEFT BSP_BIT32(20)
233
234/* field: PELx - Parity Lock */
235#define TMS570_FLEX_RAY_GCR_PELx(val) BSP_FLD32(val,16, 19)
236#define TMS570_FLEX_RAY_GCR_PELx_GET(reg) BSP_FLD32GET(reg,16, 19)
237#define TMS570_FLEX_RAY_GCR_PELx_SET(reg,val) BSP_FLD32SET(reg, val,16, 19)
238
239/* field: CETESM - Clear ETESM Register */
240#define TMS570_FLEX_RAY_GCR_CETESM BSP_BIT32(14)
241
242/* field: CTTCC - Clear TTCC Register */
243#define TMS570_FLEX_RAY_GCR_CTTCC BSP_BIT32(13)
244
245/* field: CTTSM - Clear TTSM Register */
246#define TMS570_FLEX_RAY_GCR_CTTSM BSP_BIT32(12)
247
248/* field: ETSM - Enable Transfer Status Mirrored */
249#define TMS570_FLEX_RAY_GCR_ETSM BSP_BIT32(8)
250
251/* field: SILE - Status Interrupt Line Enable */
252#define TMS570_FLEX_RAY_GCR_SILE BSP_BIT32(5)
253
254/* field: EILE - Error Interrupt Line Enable */
255#define TMS570_FLEX_RAY_GCR_EILE BSP_BIT32(4)
256
257/* field: TUH - Transfer Unit Halted */
258#define TMS570_FLEX_RAY_GCR_TUH BSP_BIT32(1)
259
260/* field: TUE - Transfer Unit Enabled */
261#define TMS570_FLEX_RAY_GCR_TUE BSP_BIT32(0)
262
263
264/*--------------------TMS570_FLEX_RAY_TSCB--------------------*/
265/* field: TSMS - Transfer State Machine Status */
266#define TMS570_FLEX_RAY_TSCB_TSMS(val) BSP_FLD32(val,16, 20)
267#define TMS570_FLEX_RAY_TSCB_TSMS_GET(reg) BSP_FLD32GET(reg,16, 20)
268#define TMS570_FLEX_RAY_TSCB_TSMS_SET(reg,val) BSP_FLD32SET(reg, val,16, 20)
269
270/* field: STUH - Status of Transfer Unit State Machine for Halt Detection */
271#define TMS570_FLEX_RAY_TSCB_STUH BSP_BIT32(12)
272
273/* field: IDLE - Detects Transfer State Machine State IDLE */
274#define TMS570_FLEX_RAY_TSCB_IDLE BSP_BIT32(8)
275
276/* field: BN - Buffer Number */
277#define TMS570_FLEX_RAY_TSCB_BN(val) BSP_FLD32(val,0, 6)
278#define TMS570_FLEX_RAY_TSCB_BN_GET(reg) BSP_FLD32GET(reg,0, 6)
279#define TMS570_FLEX_RAY_TSCB_BN_SET(reg,val) BSP_FLD32SET(reg, val,0, 6)
280
281
282/*-------------------TMS570_FLEX_RAY_LTBCC-------------------*/
283/* field: BN - Buffer number. */
284#define TMS570_FLEX_RAY_LTBCC_BN(val) BSP_FLD32(val,0, 6)
285#define TMS570_FLEX_RAY_LTBCC_BN_GET(reg) BSP_FLD32GET(reg,0, 6)
286#define TMS570_FLEX_RAY_LTBCC_BN_SET(reg,val) BSP_FLD32SET(reg, val,0, 6)
287
288
289/*-------------------TMS570_FLEX_RAY_LTBSM-------------------*/
290/* field: BN - Buffer number. */
291#define TMS570_FLEX_RAY_LTBSM_BN(val) BSP_FLD32(val,0, 6)
292#define TMS570_FLEX_RAY_LTBSM_BN_GET(reg) BSP_FLD32GET(reg,0, 6)
293#define TMS570_FLEX_RAY_LTBSM_BN_SET(reg,val) BSP_FLD32SET(reg, val,0, 6)
294
295
296/*--------------------TMS570_FLEX_RAY_TBA--------------------*/
297/* field: TBA - Transfer Base Address. */
298/* Whole 32 bits */
299
300/*--------------------TMS570_FLEX_RAY_NTBA--------------------*/
301/* field: nTBA - nTBA(31-0) */
302/* Whole 32 bits */
303
304/*--------------------TMS570_FLEX_RAY_BAMS--------------------*/
305/* field: BAMS - Base Address of Mirrored Status32-bit base pointer, 2 LSB are not significant (32-bit */
306/* Whole 32 bits */
307
308/*--------------------TMS570_FLEX_RAY_SAMP--------------------*/
309/* field: SAMP - Start Address Memory Protection. */
310/* Whole 32 bits */
311
312/*--------------------TMS570_FLEX_RAY_EAMP--------------------*/
313/* field: EAMP - End Address Memory Protection. */
314/* Whole 32 bits */
315
316/*-------------------TMS570_FLEX_RAY_TSMO1-------------------*/
317/* field: TSMO1 - Transfer to System Memory Occurred Register 1. */
318/* Whole 32 bits */
319
320/*-------------------TMS570_FLEX_RAY_TSMO2-------------------*/
321/* field: TSMO1 - Transfer to System Memory Occurred Register 1. */
322/* Whole 32 bits */
323
324/*-------------------TMS570_FLEX_RAY_TSMO3-------------------*/
325/* field: TSMO1 - Transfer to System Memory Occurred Register 1. */
326/* Whole 32 bits */
327
328/*-------------------TMS570_FLEX_RAY_TSMO4-------------------*/
329/* field: TSMO1 - Transfer to System Memory Occurred Register 1. */
330/* Whole 32 bits */
331
332/*-------------------TMS570_FLEX_RAY_TCCO1-------------------*/
333/* field: TCCO1 - Transfer to Communication Controller Occurred Register 1. */
334/* Whole 32 bits */
335
336/*-------------------TMS570_FLEX_RAY_TCCO2-------------------*/
337/* field: TCCO1 - Transfer to Communication Controller Occurred Register 1. */
338/* Whole 32 bits */
339
340/*-------------------TMS570_FLEX_RAY_TCCO3-------------------*/
341/* field: TCCO1 - Transfer to Communication Controller Occurred Register 1. */
342/* Whole 32 bits */
343
344/*-------------------TMS570_FLEX_RAY_TCCO4-------------------*/
345/* field: TCCO1 - Transfer to Communication Controller Occurred Register 1. */
346/* Whole 32 bits */
347
348/*-------------------TMS570_FLEX_RAY_TOOFF-------------------*/
349/* field: TDIR - Transfer Direction. */
350#define TMS570_FLEX_RAY_TOOFF_TDIR BSP_BIT32(8)
351
352/* field: OFF - Offset Vector */
353#define TMS570_FLEX_RAY_TOOFF_OFF(val) BSP_FLD32(val,0, 7)
354#define TMS570_FLEX_RAY_TOOFF_OFF_GET(reg) BSP_FLD32GET(reg,0, 7)
355#define TMS570_FLEX_RAY_TOOFF_OFF_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
356
357
358/*-------------------TMS570_FLEX_RAY_PEADR-------------------*/
359/* field: ADR - Address of failing TCR location. */
360#define TMS570_FLEX_RAY_PEADR_ADR(val) BSP_FLD32(val,0, 8)
361#define TMS570_FLEX_RAY_PEADR_ADR_GET(reg) BSP_FLD32GET(reg,0, 8)
362#define TMS570_FLEX_RAY_PEADR_ADR_SET(reg,val) BSP_FLD32SET(reg, val,0, 8)
363
364
365/*--------------------TMS570_FLEX_RAY_TEIF--------------------*/
366/* field: MPV - Memory Protection Violation. */
367#define TMS570_FLEX_RAY_TEIF_MPV BSP_BIT32(17)
368
369/* field: PE - Parity Error. The flag signals a parity error to the host. */
370#define TMS570_FLEX_RAY_TEIF_PE BSP_BIT32(16)
371
372/* field: RSTAT - Status of VBUS on read transfers. */
373#define TMS570_FLEX_RAY_TEIF_RSTAT(val) BSP_FLD32(val,8, 10)
374#define TMS570_FLEX_RAY_TEIF_RSTAT_GET(reg) BSP_FLD32GET(reg,8, 10)
375#define TMS570_FLEX_RAY_TEIF_RSTAT_SET(reg,val) BSP_FLD32SET(reg, val,8, 10)
376
377/* field: WSTAT - Status of VBUS on write transfers. */
378#define TMS570_FLEX_RAY_TEIF_WSTAT(val) BSP_FLD32(val,4, 6)
379#define TMS570_FLEX_RAY_TEIF_WSTAT_GET(reg) BSP_FLD32GET(reg,4, 6)
380#define TMS570_FLEX_RAY_TEIF_WSTAT_SET(reg,val) BSP_FLD32SET(reg, val,4, 6)
381
382/* field: TNR - Transfer Not Ready. */
383#define TMS570_FLEX_RAY_TEIF_TNR BSP_BIT32(1)
384
385/* field: FAC - Forbidden Access. */
386#define TMS570_FLEX_RAY_TEIF_FAC BSP_BIT32(0)
387
388
389/*-------------------TMS570_FLEX_RAY_TEIRES-------------------*/
390/* field: RSTATE - Read Error Interrupt Generation (interrupt generation on VBUS read transfer errors). */
391#define TMS570_FLEX_RAY_TEIRES_RSTATE(val) BSP_FLD32(val,8, 10)
392#define TMS570_FLEX_RAY_TEIRES_RSTATE_GET(reg) BSP_FLD32GET(reg,8, 10)
393#define TMS570_FLEX_RAY_TEIRES_RSTATE_SET(reg,val) BSP_FLD32SET(reg, val,8, 10)
394
395/* field: WSTATE - Write Error Interrupt Generation (interrupt generation on VBUS write transfer errors). */
396#define TMS570_FLEX_RAY_TEIRES_WSTATE(val) BSP_FLD32(val,4, 6)
397#define TMS570_FLEX_RAY_TEIRES_WSTATE_GET(reg) BSP_FLD32GET(reg,4, 6)
398#define TMS570_FLEX_RAY_TEIRES_WSTATE_SET(reg,val) BSP_FLD32SET(reg, val,4, 6)
399
400/* field: TNRE - Transfer Not Ready Enable. */
401#define TMS570_FLEX_RAY_TEIRES_TNRE BSP_BIT32(1)
402
403/* field: FACE - Forbidden Access Enable. */
404#define TMS570_FLEX_RAY_TEIRES_FACE BSP_BIT32(0)
405
406
407/*-------------------TMS570_FLEX_RAY_TEIRER-------------------*/
408/* field: RSTATE - Read Error Interrupt Generation (interrupt generation on VBUS read transfer errors). */
409#define TMS570_FLEX_RAY_TEIRER_RSTATE(val) BSP_FLD32(val,8, 10)
410#define TMS570_FLEX_RAY_TEIRER_RSTATE_GET(reg) BSP_FLD32GET(reg,8, 10)
411#define TMS570_FLEX_RAY_TEIRER_RSTATE_SET(reg,val) BSP_FLD32SET(reg, val,8, 10)
412
413/* field: WSTATE - Write Error Interrupt Generation (interrupt generation on VBUS write transfer errors). */
414#define TMS570_FLEX_RAY_TEIRER_WSTATE(val) BSP_FLD32(val,4, 6)
415#define TMS570_FLEX_RAY_TEIRER_WSTATE_GET(reg) BSP_FLD32GET(reg,4, 6)
416#define TMS570_FLEX_RAY_TEIRER_WSTATE_SET(reg,val) BSP_FLD32SET(reg, val,4, 6)
417
418/* field: TNRE - Transfer Not Ready Enable. */
419#define TMS570_FLEX_RAY_TEIRER_TNRE BSP_BIT32(1)
420
421/* field: FACE - Forbidden Access Enable. */
422#define TMS570_FLEX_RAY_TEIRER_FACE BSP_BIT32(0)
423
424
425/*-------------------TMS570_FLEX_RAY_TTSMS1-------------------*/
426/* field: TTSMS1 - Trigger Transfer to System Memory Set 1. */
427/* Whole 32 bits */
428
429/*-------------------TMS570_FLEX_RAY_TTSMR1-------------------*/
430/* field: TTSMS1 - Trigger Transfer to System Memory Set 1. */
431/* Whole 32 bits */
432
433/*-------------------TMS570_FLEX_RAY_TTSMS2-------------------*/
434/* field: TTSMS1 - Trigger Transfer to System Memory Set 1. */
435/* Whole 32 bits */
436
437/*-------------------TMS570_FLEX_RAY_TTSMR2-------------------*/
438/* field: TTSMS1 - Trigger Transfer to System Memory Set 1. */
439/* Whole 32 bits */
440
441/*-------------------TMS570_FLEX_RAY_TTSMS3-------------------*/
442/* field: TTSMS1 - Trigger Transfer to System Memory Set 1. */
443/* Whole 32 bits */
444
445/*-------------------TMS570_FLEX_RAY_TTSMR3-------------------*/
446/* field: TTSMS1 - Trigger Transfer to System Memory Set 1. */
447/* Whole 32 bits */
448
449/*-------------------TMS570_FLEX_RAY_TTSMS4-------------------*/
450/* field: TTSMS1 - Trigger Transfer to System Memory Set 1. */
451/* Whole 32 bits */
452
453/*-------------------TMS570_FLEX_RAY_TTSMR4-------------------*/
454/* field: TTSMS1 - Trigger Transfer to System Memory Set 1. */
455/* Whole 32 bits */
456
457/*-------------------TMS570_FLEX_RAY_TTCCS1-------------------*/
458/* field: TTCCS1 - Trigger Transfer to Communication Controller Set 1. */
459/* Whole 32 bits */
460
461/*-------------------TMS570_FLEX_RAY_TTCCR1-------------------*/
462/* field: TTCCS1 - Trigger Transfer to Communication Controller Set 1. */
463/* Whole 32 bits */
464
465/*-------------------TMS570_FLEX_RAY_TTCCS2-------------------*/
466/* field: TTCCS1 - Trigger Transfer to Communication Controller Set 1. */
467/* Whole 32 bits */
468
469/*-------------------TMS570_FLEX_RAY_TTCCR2-------------------*/
470/* field: TTCCS1 - Trigger Transfer to Communication Controller Set 1. */
471/* Whole 32 bits */
472
473/*-------------------TMS570_FLEX_RAY_TTCCS3-------------------*/
474/* field: TTCCS1 - Trigger Transfer to Communication Controller Set 1. */
475/* Whole 32 bits */
476
477/*-------------------TMS570_FLEX_RAY_TTCCR3-------------------*/
478/* field: TTCCS1 - Trigger Transfer to Communication Controller Set 1. */
479/* Whole 32 bits */
480
481/*-------------------TMS570_FLEX_RAY_TTCCS4-------------------*/
482/* field: TTCCS1 - Trigger Transfer to Communication Controller Set 1. */
483/* Whole 32 bits */
484
485/*-------------------TMS570_FLEX_RAY_TTCCR4-------------------*/
486/* field: TTCCS1 - Trigger Transfer to Communication Controller Set 1. */
487/* Whole 32 bits */
488
489/*------------------TMS570_FLEX_RAY_ETESMS1------------------*/
490/* field: ETESMS1 - Enable Transfer on Event to System Memory Set 1. */
491/* Whole 32 bits */
492
493/*------------------TMS570_FLEX_RAY_ETESMR1------------------*/
494/* field: ETESMS1 - Enable Transfer on Event to System Memory Set 1. */
495/* Whole 32 bits */
496
497/*------------------TMS570_FLEX_RAY_ETESMS2------------------*/
498/* field: ETESMS1 - Enable Transfer on Event to System Memory Set 1. */
499/* Whole 32 bits */
500
501/*------------------TMS570_FLEX_RAY_ETESMR2------------------*/
502/* field: ETESMS1 - message buffers 0 to 31. */
503/* Whole 32 bits */
504
505/*------------------TMS570_FLEX_RAY_ETESMS3------------------*/
506/* field: ETESMS1 - Enable Transfer on Event to System Memory Set 1. */
507/* Whole 32 bits */
508
509/*------------------TMS570_FLEX_RAY_ETESMR3------------------*/
510/* field: ETESMS1 - Enable Transfer on Event to System Memory Set 1. */
511/* Whole 32 bits */
512
513/*------------------TMS570_FLEX_RAY_ETESMS4------------------*/
514/* field: ETESMS1 - Enable Transfer on Event to System Memory Set 1. */
515/* Whole 32 bits */
516
517/*------------------TMS570_FLEX_RAY_ETESMR4------------------*/
518/* field: ETESMS1 - message buffers 0 to 31. */
519/* Whole 32 bits */
520
521/*-------------------TMS570_FLEX_RAY_CESMS1-------------------*/
522/* field: CESMS1 - Clear on Event to System Memory Set 1. */
523/* Whole 32 bits */
524
525/*-------------------TMS570_FLEX_RAY_CESMR1-------------------*/
526/* field: CESMS1 - Clear on Event to System Memory Set 1. */
527/* Whole 32 bits */
528
529/*-------------------TMS570_FLEX_RAY_CESMS2-------------------*/
530/* field: CESMS1 - Clear on Event to System Memory Set 1. */
531/* Whole 32 bits */
532
533/*-------------------TMS570_FLEX_RAY_CESMR2-------------------*/
534/* field: CESMS1 - Clear on Event to System Memory Set 1. */
535/* Whole 32 bits */
536
537/*-------------------TMS570_FLEX_RAY_CESMS3-------------------*/
538/* field: CESMS1 - Clear on Event to System Memory Set 1. */
539/* Whole 32 bits */
540
541/*-------------------TMS570_FLEX_RAY_CESMR3-------------------*/
542/* field: CESMS1 - CESMS1(31-0) */
543/* Whole 32 bits */
544
545/*-------------------TMS570_FLEX_RAY_CESMS4-------------------*/
546/* field: CESMS1 - Clear on Event to System Memory Set 1. */
547/* Whole 32 bits */
548
549/*-------------------TMS570_FLEX_RAY_CESMR4-------------------*/
550/* field: CESMS1 - Clear on Event to System Memory Set 1. */
551/* Whole 32 bits */
552
553/*------------------TMS570_FLEX_RAY_TSMIES1------------------*/
554/* field: TTSMIES1 - Transfer to System Memory Interrupt Enable Set 1. */
555/* Whole 32 bits */
556
557/*------------------TMS570_FLEX_RAY_TSMIER1------------------*/
558/* field: TTSMIES1 - Transfer to System Memory Interrupt Enable Set 1. */
559/* Whole 32 bits */
560
561/*------------------TMS570_FLEX_RAY_TSMIES2------------------*/
562/* field: TTSMIES1 - Transfer to System Memory Interrupt Enable Set 1. */
563/* Whole 32 bits */
564
565/*------------------TMS570_FLEX_RAY_TSMIER2------------------*/
566/* field: TTSMIES1 - Transfer to System Memory Interrupt Enable Set 1. */
567/* Whole 32 bits */
568
569/*------------------TMS570_FLEX_RAY_TSMIES3------------------*/
570/* field: TTSMIES1 - Transfer to System Memory Interrupt Enable Set 1. */
571/* Whole 32 bits */
572
573/*------------------TMS570_FLEX_RAY_TSMIER3------------------*/
574/* field: TTSMIES1 - Transfer to System Memory Interrupt Enable Set 1. */
575/* Whole 32 bits */
576
577/*------------------TMS570_FLEX_RAY_TSMIES4------------------*/
578/* field: TTSMIES1 - Transfer to System Memory Interrupt Enable Set 1. */
579/* Whole 32 bits */
580
581/*------------------TMS570_FLEX_RAY_TSMIER4------------------*/
582/* field: TTSMIES1 - Transfer to System Memory Interrupt Enable Set 1. */
583/* Whole 32 bits */
584
585/*------------------TMS570_FLEX_RAY_TCCIES1------------------*/
586/* field: TCCIES1 - Transfer to Communication Controller Interrupt Enable Set 1. */
587/* Whole 32 bits */
588
589/*------------------TMS570_FLEX_RAY_TCCIER1------------------*/
590/* field: TCCIES1 - Transfer to Communication Controller Interrupt Enable Set 1. */
591/* Whole 32 bits */
592
593/*------------------TMS570_FLEX_RAY_TCCIES2------------------*/
594/* field: TCCIES1 - Transfer to Communication Controller Interrupt Enable Set 1. */
595/* Whole 32 bits */
596
597/*------------------TMS570_FLEX_RAY_TCCIER2------------------*/
598/* field: TCCIES1 - to message buffers 0 to 31. */
599/* Whole 32 bits */
600
601/*------------------TMS570_FLEX_RAY_TCCIES3------------------*/
602/* field: TCCIES1 - Transfer to Communication Controller Interrupt Enable Set 1. */
603/* Whole 32 bits */
604
605/*------------------TMS570_FLEX_RAY_TCCIER3------------------*/
606/* field: TCCIES1 - Transfer to Communication Controller Interrupt Enable Set 1. */
607/* Whole 32 bits */
608
609/*------------------TMS570_FLEX_RAY_TCCIES4------------------*/
610/* field: TCCIES1 - Transfer to Communication Controller Interrupt Enable Set 1. */
611/* Whole 32 bits */
612
613/*------------------TMS570_FLEX_RAY_TCCIER4------------------*/
614/* field: TCCIES1 - Transfer to Communication Controller Interrupt Enable Set 1. */
615/* Whole 32 bits */
616
617
618#endif /* LIBBSP_ARM_TMS570_FLEX_RAY */
This header file provides utility macros for BSPs.
Definition: reg_flex_ray.h:44