RTEMS
6.1-rc1
bsps
powerpc
gen5200
nvram
m93cxx.h
1
/*
2
* RTEMS generic MPC5200 BSP
3
*
4
* This file contains definitions for the M93Cxx EEPROM devices.
5
*
6
* M93C46 is a serial microwire EEPROM which contains
7
* 1Kbit (128 bytes/64 words) of non-volatile memory.
8
* The device can be configured for byte- or word-
9
* access. The driver provides a file-like interface
10
* to this memory.
11
*
12
* MPC5x00 PIN settings:
13
*
14
* PSC3_6 (output) -> MC93C46 serial data in (D)
15
* PSC3_7 (input) -> MC93C46 serial data out (Q)
16
* PSC3_8 (output) -> MC93C46 chip select input (S)
17
* PSC3_9 (output) -> MC93C46 serial clock (C)
18
*/
19
20
/*
21
* Copyright (c) 2005 embedded brains GmbH & Co. KG
22
* Copyright (c) 2003 IPR Engineering
23
*
24
* The license and distribution terms for this file may be
25
* found in the file LICENSE in this distribution or at
26
* http://www.rtems.org/license/LICENSE.
27
*/
28
29
#ifndef __M93CXX_H__
30
#define __M93CXX_H__
31
32
#ifdef __cplusplus
33
extern
"C"
{
34
#endif
35
36
static
void
m93cxx_enable_write(
void
);
37
static
void
m93cxx_disable_write(
void
);
38
static
void
m93cxx_write_byte(uint32_t, uint8_t);
39
static
uint8_t m93cxx_read_byte(uint32_t);
40
void
wait_usec(
unsigned
long
);
41
42
#define M93CXX_MODE_WORD
43
/*#define M93C46_MODE_BYTE*/
44
#define M93C46
45
#define M93C46_NVRAM_SIZE 128
46
47
#define GPIO_PSC3_6 (1 << 12)
48
#define GPIO_PSC3_7 (1 << 13)
49
#define GPIO_PSC3_8 (1 << 26)
50
#define GPIO_PSC3_9 (1 << 26)
51
52
#define START_BIT 0x1
53
#define EWDS_OPCODE 0x0
54
#define WRAL_OPCODE 0x1
55
#define ERAL_OPCODE 0x2
56
#define EWEN_OPCODE 0x3
57
#define WRITE_OPCODE 0x4
58
#define READ_OPCODE 0x8
59
#define ERASE_OPCODE 0xC
60
61
#define WAIT(i) wait_usec(i)
62
63
#define ENABLE_CHIP_SELECT mpc5200.gpiosido |= GPIO_PSC3_8
64
#define DISABLE_CHIP_SELECT mpc5200.gpiosido &= ~GPIO_PSC3_8
65
#define SET_DATA_BIT_HIGH mpc5200.gpiosdo |= GPIO_PSC3_6
66
#define SET_DATA_BIT_LOW mpc5200.gpiosdo &= ~GPIO_PSC3_6
67
68
#ifdef M93CXX_MODE_BYTE
69
#define GET_DATA_BYTE_SHIFT(val) ((val) |= ((mpc5200.gpiosdi & GPIO_PSC3_7) >> 13)); \
70
((val) <<= 1)
71
#define SET_DATA_BYTE_SHIFT(val) (((val) & 0x80) ? (mpc5200.gpiosdo |= GPIO_PSC3_6) : (mpc5200.gpiosdo &= ~GPIO_PSC3_6)); \
72
((val) <<= 1)
73
#else
74
#define GET_DATA_WORD_SHIFT(val) ((val) |= ((mpc5200.gpiosdi & GPIO_PSC3_7) >> 13)); \
75
((val) <<= 1)
76
#define SET_DATA_WORD_SHIFT(val) (((val) & 0x8000) ? (mpc5200.gpiosdo |= GPIO_PSC3_6) : (mpc5200.gpiosdo &= ~GPIO_PSC3_6)); \
77
((val) <<= 1)
78
#endif
79
80
#define MASK_HEAD_SHIFT(head) ((((head) & 0x80000000) >> 31) ? (mpc5200.gpiosdo |= GPIO_PSC3_6) : (mpc5200.gpiosdo &= ~GPIO_PSC3_6)); \
81
((head) <<= 1)
82
#define DO_CLOCK_CYCLE mpc5200.gpiowdo |= GPIO_PSC3_9; \
83
WAIT(1000); \
84
mpc5200.gpiowdo &= ~GPIO_PSC3_9
85
#define CHECK_WRITE_BUSY while(!(mpc5200.gpiosdi & GPIO_PSC3_7))
86
87
88
#ifdef M93CXX_MODE_BYTE
89
#ifdef M93C46
90
#define M93C46_EWDS ((START_BIT << 31) | (EWDS_OPCODE << 27))
91
#define M93C46_WRAL ((START_BIT << 31) | (WRAL_OPCODE << 27))
92
#define M93C46_ERAL ((START_BIT << 31) | (ERAL_OPCODE << 27))
93
#define M93C46_EWEN ((START_BIT << 31) | (EWEN_OPCODE << 27))
94
#define M93C46_READ(addr) ((START_BIT << 31) | (READ_OPCODE << 27) | ((addr) << 22))
95
#define M93C46_WRITE(addr) ((START_BIT << 31) | (WRITE_OPCODE << 27) | ((addr) << 22))
96
#define M93C46_ERASE(addr) ((START_BIT << 31) | (ERASE_OPCODE << 27) | ((addr) << 22))
97
#define M93C46_CLOCK_CYCLES 10
98
#endif
99
#else
100
#ifdef M93C46
101
#define M93C46_EWDS ((START_BIT << 31) | (EWDS_OPCODE << 27))
102
#define M93C46_WRAL ((START_BIT << 31) | (WRAL_OPCODE << 27))
103
#define M93C46_ERAL ((START_BIT << 31) | (ERAL_OPCODE << 27))
104
#define M93C46_EWEN ((START_BIT << 31) | (EWEN_OPCODE << 27))
105
#define M93C46_READ(addr) ((START_BIT << 31) | (READ_OPCODE << 27) | ((addr) << 23))
106
#define M93C46_WRITE(addr) ((START_BIT << 31) | (WRITE_OPCODE << 27) | ((addr) << 23))
107
#define M93C46_ERASE(addr) ((START_BIT << 31) | (ERASE_OPCODE << 27) | ((addr) << 23))
108
#define M93C46_CLOCK_CYCLES 9
109
#endif
110
#endif
111
112
#ifdef __cplusplus
113
}
114
#endif
115
116
#endif
/* __M93CXX_H__ */
Generated by
1.9.4
1.9.4