RTEMS 6.1-rc1
lpc-timer.h
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1/* SPDX-License-Identifier: BSD-2-Clause */
2
11/*
12 * Copyright (c) 2009 embedded brains GmbH & Co. KG
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the distribution.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
27 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 * POSSIBILITY OF SUCH DAMAGE.
34 */
35
36#ifndef LIBBSP_ARM_SHARED_LPC_TIMER_H
37#define LIBBSP_ARM_SHARED_LPC_TIMER_H
38
39#include <stdint.h>
40
41#ifdef __cplusplus
42extern "C" {
43#endif
44
62#define LPC_TIMER_IR_MR0 0x1U
63#define LPC_TIMER_IR_MR1 0x2U
64#define LPC_TIMER_IR_MR2 0x4U
65#define LPC_TIMER_IR_MR3 0x8U
66#define LPC_TIMER_IR_CR0 0x10U
67#define LPC_TIMER_IR_CR1 0x20U
68#define LPC_TIMER_IR_CR2 0x40U
69#define LPC_TIMER_IR_CR3 0x80U
70#define LPC_TIMER_IR_ALL 0xffU
71
80#define LPC_TIMER_TCR_EN 0x1U
81#define LPC_TIMER_TCR_RST 0x2U
82
91#define LPC_TIMER_MCR_MR0_INTR 0x1U
92#define LPC_TIMER_MCR_MR0_RST 0x2U
93#define LPC_TIMER_MCR_MR0_STOP 0x4U
94#define LPC_TIMER_MCR_MR1_INTR 0x8U
95#define LPC_TIMER_MCR_MR1_RST 0x10U
96#define LPC_TIMER_MCR_MR1_STOP 0x20U
97#define LPC_TIMER_MCR_MR2_INTR 0x40U
98#define LPC_TIMER_MCR_MR2_RST 0x80U
99#define LPC_TIMER_MCR_MR2_STOP 0x100U
100#define LPC_TIMER_MCR_MR3_INTR 0x200U
101#define LPC_TIMER_MCR_MR3_RST 0x400U
102#define LPC_TIMER_MCR_MR3_STOP 0x800U
103
112#define LPC_TIMER_CCR_CAP0_RE 0x1U
113#define LPC_TIMER_CCR_CAP0_FE 0x2U
114#define LPC_TIMER_CCR_CAP0_INTR 0x4U
115#define LPC_TIMER_CCR_CAP1_RE 0x8U
116#define LPC_TIMER_CCR_CAP1_FE 0x10U
117#define LPC_TIMER_CCR_CAP1_INTR 0x20U
118#define LPC_TIMER_CCR_CAP2_RE 0x40U
119#define LPC_TIMER_CCR_CAP2_FE 0x80U
120#define LPC_TIMER_CCR_CAP2_INTR 0x100U
121#define LPC_TIMER_CCR_CAP3_RE 0x200U
122#define LPC_TIMER_CCR_CAP3_FE 0x400U
123#define LPC_TIMER_CCR_CAP3_INTR 0x800U
124
133#define LPC_TIMER_EMR_EM0_RE 0x1U
134#define LPC_TIMER_EMR_EM1_FE 0x2U
135#define LPC_TIMER_EMR_EM2_INTR 0x4U
136#define LPC_TIMER_EMR_EM3_RE 0x8U
137#define LPC_TIMER_EMR_EMC0_FE 0x10U
138#define LPC_TIMER_EMR_EMC1_INTR 0x20U
139#define LPC_TIMER_EMR_EMC2_RE 0x40U
140#define LPC_TIMER_EMR_EMC3_FE 0x80U
141
147typedef struct {
148 uint32_t ir;
149 uint32_t tcr;
150 uint32_t tc;
151 uint32_t pr;
152 uint32_t pc;
153 uint32_t mcr;
154 uint32_t mr0;
155 uint32_t mr1;
156 uint32_t mr2;
157 uint32_t mr3;
158 uint32_t ccr;
159 uint32_t cr0;
160 uint32_t cr1;
161 uint32_t cr2;
162 uint32_t cr3;
163 uint32_t emr;
164 uint32_t ctcr;
165} lpc_timer;
166
169#ifdef __cplusplus
170}
171#endif /* __cplusplus */
172
173#endif /* LIBBSP_ARM_SHARED_LPC_TIMER_H */
#define pc
pc, used on mips16 *‍/
Definition: regs.h:67
Timer control block.
Definition: lpc-timer.h:147
unsigned pr
Definition: tlb.h:15