RTEMS
6.1-rc1
bsps
arm
include
bsp
lpc-timer.h
Go to the documentation of this file.
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/* SPDX-License-Identifier: BSD-2-Clause */
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/*
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* Copyright (c) 2009 embedded brains GmbH & Co. KG
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef LIBBSP_ARM_SHARED_LPC_TIMER_H
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#define LIBBSP_ARM_SHARED_LPC_TIMER_H
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#include <stdint.h>
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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#define LPC_TIMER_IR_MR0 0x1U
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#define LPC_TIMER_IR_MR1 0x2U
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#define LPC_TIMER_IR_MR2 0x4U
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#define LPC_TIMER_IR_MR3 0x8U
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#define LPC_TIMER_IR_CR0 0x10U
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#define LPC_TIMER_IR_CR1 0x20U
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#define LPC_TIMER_IR_CR2 0x40U
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#define LPC_TIMER_IR_CR3 0x80U
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#define LPC_TIMER_IR_ALL 0xffU
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#define LPC_TIMER_TCR_EN 0x1U
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#define LPC_TIMER_TCR_RST 0x2U
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#define LPC_TIMER_MCR_MR0_INTR 0x1U
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#define LPC_TIMER_MCR_MR0_RST 0x2U
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#define LPC_TIMER_MCR_MR0_STOP 0x4U
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#define LPC_TIMER_MCR_MR1_INTR 0x8U
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#define LPC_TIMER_MCR_MR1_RST 0x10U
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#define LPC_TIMER_MCR_MR1_STOP 0x20U
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#define LPC_TIMER_MCR_MR2_INTR 0x40U
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#define LPC_TIMER_MCR_MR2_RST 0x80U
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#define LPC_TIMER_MCR_MR2_STOP 0x100U
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#define LPC_TIMER_MCR_MR3_INTR 0x200U
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#define LPC_TIMER_MCR_MR3_RST 0x400U
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#define LPC_TIMER_MCR_MR3_STOP 0x800U
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#define LPC_TIMER_CCR_CAP0_RE 0x1U
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#define LPC_TIMER_CCR_CAP0_FE 0x2U
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#define LPC_TIMER_CCR_CAP0_INTR 0x4U
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#define LPC_TIMER_CCR_CAP1_RE 0x8U
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#define LPC_TIMER_CCR_CAP1_FE 0x10U
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#define LPC_TIMER_CCR_CAP1_INTR 0x20U
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#define LPC_TIMER_CCR_CAP2_RE 0x40U
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#define LPC_TIMER_CCR_CAP2_FE 0x80U
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#define LPC_TIMER_CCR_CAP2_INTR 0x100U
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#define LPC_TIMER_CCR_CAP3_RE 0x200U
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#define LPC_TIMER_CCR_CAP3_FE 0x400U
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#define LPC_TIMER_CCR_CAP3_INTR 0x800U
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#define LPC_TIMER_EMR_EM0_RE 0x1U
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#define LPC_TIMER_EMR_EM1_FE 0x2U
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#define LPC_TIMER_EMR_EM2_INTR 0x4U
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#define LPC_TIMER_EMR_EM3_RE 0x8U
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#define LPC_TIMER_EMR_EMC0_FE 0x10U
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#define LPC_TIMER_EMR_EMC1_INTR 0x20U
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#define LPC_TIMER_EMR_EMC2_RE 0x40U
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#define LPC_TIMER_EMR_EMC3_FE 0x80U
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typedef
struct
{
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uint32_t ir;
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uint32_t tcr;
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uint32_t tc;
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uint32_t
pr
;
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uint32_t
pc
;
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uint32_t mcr;
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uint32_t mr0;
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uint32_t mr1;
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uint32_t mr2;
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uint32_t mr3;
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uint32_t ccr;
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uint32_t cr0;
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uint32_t cr1;
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uint32_t cr2;
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uint32_t cr3;
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uint32_t emr;
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uint32_t ctcr;
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}
lpc_timer
;
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#ifdef __cplusplus
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}
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#endif
/* __cplusplus */
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#endif
/* LIBBSP_ARM_SHARED_LPC_TIMER_H */
pc
#define pc
pc, used on mips16 */
Definition:
regs.h:67
lpc_timer
Timer control block.
Definition:
lpc-timer.h:147
pr
unsigned pr
Definition:
tlb.h:15
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