RTEMS 6.1-rc1
grtm.h
1/* SPDX-License-Identifier: BSD-2-Clause */
2
3/* GRTM Telemetry (TM) driver interface
4 *
5 * COPYRIGHT (c) 2007.
6 * Cobham Gaisler AB.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
21 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 * POSSIBILITY OF SUCH DAMAGE.
28 */
29
30#ifndef __GRTM_H__
31#define __GRTM_H__
32
33#include <rtems.h>
34
35#ifdef __cplusplus
36extern "C" {
37#endif
38
39#define GRTM_IOC_UNUSED 0
40
41/* Driver operation controlling commands */
42#define GRTM_IOC_START 1
43#define GRTM_IOC_STOP 2
44#define GRTM_IOC_ISSTARTED 3
45#define GRTM_IOC_SET_BLOCKING_MODE 4
46#define GRTM_IOC_SET_TIMEOUT 5
47
48/* Available only in STOPPED mode */
49#define GRTM_IOC_SET_CONFIG 32
50
51/* Available in both running and stopped mode */
52#define GRTM_IOC_RECLAIM 64
53#define GRTM_IOC_GET_CONFIG 65
54#define GRTM_IOC_GET_HW_IMPL 66
55#define GRTM_IOC_GET_HW_STATUS 67 /* Not implemented */
56#define GRTM_IOC_GET_OCFREG 68
57#define GRTM_IOC_GET_STATS 69
58#define GRTM_IOC_CLR_STATS 70
59
60/* Available only in RUNNING mode */
61#define GRTM_IOC_SEND 96
62
63/* Args to GRTC_IOC_SET_BLOCKING_MODE */
64enum {
65 GRTM_BLKMODE_POLL = 0, /* Never block (polling mode) */
66 GRTM_BLKMODE_BLK = 1, /* Block until at least 1 byte can be read */
67};
68
69/* Reed Solomon Encoder implemented */
70enum {
71 GRTM_RS_IMPL_NONE = 0,
72 GRTM_RS_IMPL_E16 = 1, /* E16 */
73 GRTM_RS_IMPL_E8 = 2, /* E8 */
74 GRTM_RS_IMPL_BOTH = 3 /* Both E8 and E16 */
75
76};
77
79 char cs; /* Sub Carrier */
80 char sp; /* Split-Phase Level */
81 char ce;
82 char nrz;
83 char psr;
84 char te;
85 unsigned char rsdep;
86 unsigned char rs;
87 char aasm;
88 char fecf;
89 char ocf;
90 char evc;
91 char idle;
92 char fsh;
93 char mcg;
94 char iz;
95 char fhec;
96 char aos;
97 char cif;
98 char ocfb;
99
100 unsigned short blk_size; /* Block Size */
101 unsigned short fifo_size; /* FIFO Size */
102
103};
104
105/* Driver Mode */
106enum {
107 GRTM_MODE_TM = 0, /* TM */
108 GRTM_MODE_AOS = 1 /* AOS */
109};
110
111/* Physical layer Options */
112#define GRTM_IOC_PHY_SCF (1<<15) /* Sub Carrier Fall */
113#define GRTM_IOC_PHY_SF (1<<31) /* Symbol Fall */
114
115/* Coding Sub-layer Options */
116#define GRTM_IOC_CODE_SC (1<<0) /* Enable Sub Carrier modulation */
117#define GRTM_IOC_CODE_SP (1<<1) /* Enable Split-Phase (SP) level modulation */
118#define GRTM_IOC_CODE_CE (1<<5) /* Enable Convolutional Encoding */
119#define GRTM_IOC_CODE_NRZ (1<<6) /* Enable Non-Return-to-Zero mark encoding */
120#define GRTM_IOC_CODE_PSR (1<<7) /* Enable Pseudo-Randomizer */
121#define GRTM_IOC_CODE_RS8 (1<<11) /* Reed-solomon Encoder to use: 0=E16, 1=E8 */
122#define GRTM_IOC_CODE_RS (1<<15) /* Enable Reed-Solomon Encoder */
123#define GRTM_IOC_CODE_AASM (1<<16) /* Enable Alternative attached synchronization marker */
124#define GRTM_IOC_CODE_ALL (GRTM_IOC_CODE_SC|GRTM_IOC_CODE_SP|GRTM_IOC_CODE_CE| \
125 GRTM_IOC_CODE_NRZ|GRTM_IOC_CODE_PSR|GRTM_IOC_CODE_RS8|\
126 GRTM_IOC_CODE_RS|GRTM_IOC_CODE_AASM)
127
128enum {
129 GRTM_CERATE_00 = 0, /* Rate 1/2, no puncturing */
130 GRTM_CERATE_02 = 2, /* Rate 1/2, punctured */
131 GRTM_CERATE_04 = 4, /* Rate 2/3, punctured */
132 GRTM_CERATE_05 = 5, /* Rate 3/4, punctured */
133 GRTM_CERATE_06 = 6, /* Rate 5/6, punctured */
134 GRTM_CERATE_07 = 7, /* Rate 7/8, punctured */
135};
136
137/* Options for Generating all frames */
138#define GRTM_IOC_ALL_FHEC 0x01 /* Enable Frame Header Error Control (Only AOS) */
139#define GRTM_IOC_ALL_FECF 0x02 /* Enable Transfer Frame CRC */
140#define GRTM_IOC_ALL_IZ 0x04 /* Enable Insert Zone */
141#define GRTM_IOC_ALL_ALL (GRTM_IOC_ALL_FHEC|GRTM_IOC_ALL_FECF|GRTM_IOC_ALL_IZ)
142
143/* Master Frame Generation Options */
144#define GRTM_IOC_MF_OW 0x01 /* Over Write OCF bits 16 and 17 */
145#define GRTM_IOC_MF_OCF 0x02 /* Enable Operation Control Field (OCF) for master channel */
146#define GRTM_IOC_MF_FSH 0x04 /* Enable MC_FSH for master channel */
147#define GRTM_IOC_MF_MC 0x08 /* Enable Master channel counter generation */
148#define GRTM_IOC_MF_ALL (GRTM_IOC_MF_OW|GRTM_IOC_MF_OCF|GRTM_IOC_MF_FSH|GRTM_IOC_MF_MC)
149
150/* Idle Frames Generation Options */
151#define GRTM_IOC_IDLE_MC 0x01 /* Enable Master Channel (MC) counter generation (TM Only) */
152#define GRTM_IOC_IDLE_VCC 0x02 /* Enable Virtual Channel counter cycle generation (AOS Only)*/
153#define GRTM_IOC_IDLE_FSH 0x04 /* Enable Frame Secondary Header (FSH) for idle frames (TM Only) */
154#define GRTM_IOC_IDLE_EVC 0x08 /* Enable Extended Virtual Channel Counter Generation */
155#define GRTM_IOC_IDLE_OCF 0x10 /* Enable OCF/CLCW in idle frame */
156#define GRTM_IOC_IDLE_EN 0x20 /* Enable Idle frame generation */
157#define GRTM_IOC_IDLE_ALL (GRTM_IOC_IDLE_MC|GRTM_IOC_IDLE_VCC|GRTM_IOC_IDLE_FSH| \
158 GRTM_IOC_IDLE_EVC|GRTM_IOC_IDLE_OCF|GRTM_IOC_IDLE_EN)
159
160/* Argument of GRTM_IOC_SET_CONFIG and GRTM_IOC_GET_CONFIG.
161 * Driver and Hardware configuration.
162 *
163 * Pointer to:
164 */
166
167 /* Mode AOS or TM */
168 unsigned char mode; /* 0=TM, 1=AOS */
169
170 unsigned short frame_length; /* Length of every frame transmitted */
171 unsigned short limit; /* Number of data bytes fetched by DMA before transmission starts */
172 unsigned int as_marker; /* Attached Synchronization Marker */
173
174 /* Physical layer options */
175 unsigned short phy_subrate; /* Sub Carrier rate - sub carrier devision factor - 1 */
176 unsigned short phy_symbolrate; /* Symbol Rate division factor - 1 */
177 unsigned char phy_opts; /* Mask of GRTM_IOC_PHY_XXXX */
178
179 /* Coding sub-layer Options */
180 unsigned char code_rsdep; /* Coding sub-layer Reed-Solomon interleave depth (3-bit) */
181 unsigned char code_ce_rate; /* Convolutional encoding rate, select one of GRTM_CERATE_00 ... GRTM_CERATE_07 */
182 unsigned char code_csel; /* */
183 unsigned int code_opts; /* Mask of GRTM_IOC_CODE_XXXX */
184
185 /* All Frames Generation */
186 unsigned char all_izlen; /* FSH/IZ Length (5-bit) */
187 unsigned char all_opts; /* Mask of GRTM_IOC_ALL_XXXX */
188
189 /* Master Frame Generation */
190 unsigned char mf_opts; /* Mask of GRTM_IOC_MF_XXXX */
191
192 /* Idle frame Generation */
193 unsigned short idle_scid;
194 unsigned char idle_vcid;
195 unsigned char idle_opts; /* Mask of GRTM_IOC_IDLE_XXXX */
196
197 /* Interrupt options */
198 unsigned int enable_cnt; /* Number of frames in between Interrupt is generated, Zero disables interrupt */
199 int isr_desc_proc; /* Enable ISR to process descriptors */
200 int blocking; /* Blocking mode select (POLL,BLK..) */
201 rtems_interval timeout; /* Blocking mode timeout */
202};
203
204struct grtm_frame;
205
206struct grtm_list {
207 struct grtm_frame *head; /* First Frame in list */
208 struct grtm_frame *tail; /* Last Frame in list */
209};
210
211#define GRTM_FLAGS_SENT 0x01
212#define GRRM_FLAGS_ERR 0x02
213
214#define GRTM_FLAGS_TRANSLATE (1<<31) /* Translate frame payload address from CPU address to remote bus (the bus GRTM is resident on) */
215#define GRTM_FLAGS_TRANSLATE_AND_REMEMBER (1<<30) /* As GRTM_FLAGS_TRANSLATE, however if the translated payload address equals the payload address
216 * the GRTM_FLAGS_TRANSLATE_AND_REMEMBER bit is cleared and the GRTM_FLAGS_TRANSLATE bit is set */
217#define GRTM_FLAGS_COPY_DATA (1<<29) /* Where available: Transfer Frame payload to target, may be used for SpaceWire, where the GRTM driver transfer
218 * the payload to a buffer on the SpaceWire target.
219 */
220
221#define GRTM_FLAGS_TS (1<<14)
222#define GRTM_FLAGS_VCE (1<<9)
223#define GRTM_FLAGS_MCB (1<<8)
224#define GRTM_FLAGS_FSHB (1<<7)
225#define GRTM_FLAGS_OCFB (1<<6)
226#define GRTM_FLAGS_FHECB (1<<5)
227#define GRTM_FLAGS_IZB (1<<4)
228#define GRTM_FLAGS_FECFB (1<<3)
229
230#define GRTM_FLAGS_MASK (GRTM_FLAGS_TS|GRTM_FLAGS_VCE|GRTM_FLAGS_MCB|\
231 GRTM_FLAGS_FSHB|GRTM_FLAGS_OCFB|GRTM_FLAGS_FHECB|\
232 GRTM_FLAGS_IZB|GRTM_FLAGS_FECFB)
233
234/* The GRTM software representation of a Frame */
235struct grtm_frame {
236 /* Options and status */
237 unsigned int flags; /* bypass options, and sent/error status */
238
239 struct grtm_frame *next; /* Next packet in chain */
240
241 unsigned int *payload; /* The Headers and Payload, Frame data and header must be word aligned */
242};
244#define FRAME_SIZE(payloadlen) (sizeof(struct grtm_frame)+payloadlen)
245
246struct grtm_ioc_stats {
247 unsigned long long frames_sent;
248 unsigned int err_underrun;
249 unsigned int err_tx;
250 unsigned int err_ahb;
251 unsigned int err_transfer_frame;
252};
253
254/* Register GRTM driver at driver manager */
255void grtm_register_drv(void);
256
257/* Register GRTM RMAP driver at driver manager */
258void grtm_rmap_register_drv (void);
259
260#ifdef __cplusplus
261}
262#endif
263
264#endif /* __GRTM_H__ */
Watchdog_Interval rtems_interval
This type represents clock tick intervals.
Definition: types.h:114
This header file defines the RTEMS Classic API.
Definition: grtm.h:232
Definition: grtm.h:165
Definition: grtm.h:78
Definition: grtm.h:243
Definition: grtm.h:206