RTEMS 6.1-rc1
ftmctrl-regs.h
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1/* SPDX-License-Identifier: BSD-2-Clause */
2
11/*
12 * Copyright (C) 2021 embedded brains GmbH & Co. KG
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the distribution.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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34 */
35
36/*
37 * This file is part of the RTEMS quality process and was automatically
38 * generated. If you find something that needs to be fixed or
39 * worded better please post a report or patch to an RTEMS mailing list
40 * or raise a bug report:
41 *
42 * https://www.rtems.org/bugs.html
43 *
44 * For information on updating and regenerating please refer to the How-To
45 * section in the Software Requirements Engineering chapter of the
46 * RTEMS Software Engineering manual. The manual is provided as a part of
47 * a release. For development sources please refer to the online
48 * documentation at:
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50 * https://docs.rtems.org
51 */
52
53/* Generated from spec:/dev/grlib/if/ftmctrl-header */
54
55#ifndef _GRLIB_FTMCTRL_REGS_H
56#define _GRLIB_FTMCTRL_REGS_H
57
58#include <stdint.h>
59
60#ifdef __cplusplus
61extern "C" {
62#endif
63
64/* Generated from spec:/dev/grlib/if/ftmctrl */
65
85#define FTMCTRL_MCFG1_PBRDY 0x40000000U
86
87#define FTMCTRL_MCFG1_ABRDY 0x20000000U
88
89#define FTMCTRL_MCFG1_IOBUSW_SHIFT 27
90#define FTMCTRL_MCFG1_IOBUSW_MASK 0x18000000U
91#define FTMCTRL_MCFG1_IOBUSW_GET( _reg ) \
92 ( ( ( _reg ) & FTMCTRL_MCFG1_IOBUSW_MASK ) >> \
93 FTMCTRL_MCFG1_IOBUSW_SHIFT )
94#define FTMCTRL_MCFG1_IOBUSW_SET( _reg, _val ) \
95 ( ( ( _reg ) & ~FTMCTRL_MCFG1_IOBUSW_MASK ) | \
96 ( ( ( _val ) << FTMCTRL_MCFG1_IOBUSW_SHIFT ) & \
97 FTMCTRL_MCFG1_IOBUSW_MASK ) )
98#define FTMCTRL_MCFG1_IOBUSW( _val ) \
99 ( ( ( _val ) << FTMCTRL_MCFG1_IOBUSW_SHIFT ) & \
100 FTMCTRL_MCFG1_IOBUSW_MASK )
101
102#define FTMCTRL_MCFG1_IBRDY 0x4000000U
103
104#define FTMCTRL_MCFG1_BEXCN 0x2000000U
105
106#define FTMCTRL_MCFG1_IO_WAITSTATES_SHIFT 20
107#define FTMCTRL_MCFG1_IO_WAITSTATES_MASK 0xf00000U
108#define FTMCTRL_MCFG1_IO_WAITSTATES_GET( _reg ) \
109 ( ( ( _reg ) & FTMCTRL_MCFG1_IO_WAITSTATES_MASK ) >> \
110 FTMCTRL_MCFG1_IO_WAITSTATES_SHIFT )
111#define FTMCTRL_MCFG1_IO_WAITSTATES_SET( _reg, _val ) \
112 ( ( ( _reg ) & ~FTMCTRL_MCFG1_IO_WAITSTATES_MASK ) | \
113 ( ( ( _val ) << FTMCTRL_MCFG1_IO_WAITSTATES_SHIFT ) & \
114 FTMCTRL_MCFG1_IO_WAITSTATES_MASK ) )
115#define FTMCTRL_MCFG1_IO_WAITSTATES( _val ) \
116 ( ( ( _val ) << FTMCTRL_MCFG1_IO_WAITSTATES_SHIFT ) & \
117 FTMCTRL_MCFG1_IO_WAITSTATES_MASK )
118
119#define FTMCTRL_MCFG1_IOEN 0x80000U
120
121#define FTMCTRL_MCFG1_R 0x40000U
122
123#define FTMCTRL_MCFG1_ROMBANKSZ_SHIFT 14
124#define FTMCTRL_MCFG1_ROMBANKSZ_MASK 0x3c000U
125#define FTMCTRL_MCFG1_ROMBANKSZ_GET( _reg ) \
126 ( ( ( _reg ) & FTMCTRL_MCFG1_ROMBANKSZ_MASK ) >> \
127 FTMCTRL_MCFG1_ROMBANKSZ_SHIFT )
128#define FTMCTRL_MCFG1_ROMBANKSZ_SET( _reg, _val ) \
129 ( ( ( _reg ) & ~FTMCTRL_MCFG1_ROMBANKSZ_MASK ) | \
130 ( ( ( _val ) << FTMCTRL_MCFG1_ROMBANKSZ_SHIFT ) & \
131 FTMCTRL_MCFG1_ROMBANKSZ_MASK ) )
132#define FTMCTRL_MCFG1_ROMBANKSZ( _val ) \
133 ( ( ( _val ) << FTMCTRL_MCFG1_ROMBANKSZ_SHIFT ) & \
134 FTMCTRL_MCFG1_ROMBANKSZ_MASK )
135
136#define FTMCTRL_MCFG1_PWEN 0x800U
137
138#define FTMCTRL_MCFG1_PROM_WIDTH_SHIFT 8
139#define FTMCTRL_MCFG1_PROM_WIDTH_MASK 0x300U
140#define FTMCTRL_MCFG1_PROM_WIDTH_GET( _reg ) \
141 ( ( ( _reg ) & FTMCTRL_MCFG1_PROM_WIDTH_MASK ) >> \
142 FTMCTRL_MCFG1_PROM_WIDTH_SHIFT )
143#define FTMCTRL_MCFG1_PROM_WIDTH_SET( _reg, _val ) \
144 ( ( ( _reg ) & ~FTMCTRL_MCFG1_PROM_WIDTH_MASK ) | \
145 ( ( ( _val ) << FTMCTRL_MCFG1_PROM_WIDTH_SHIFT ) & \
146 FTMCTRL_MCFG1_PROM_WIDTH_MASK ) )
147#define FTMCTRL_MCFG1_PROM_WIDTH( _val ) \
148 ( ( ( _val ) << FTMCTRL_MCFG1_PROM_WIDTH_SHIFT ) & \
149 FTMCTRL_MCFG1_PROM_WIDTH_MASK )
150
151#define FTMCTRL_MCFG1_PROM_WRITE_WS_SHIFT 4
152#define FTMCTRL_MCFG1_PROM_WRITE_WS_MASK 0xf0U
153#define FTMCTRL_MCFG1_PROM_WRITE_WS_GET( _reg ) \
154 ( ( ( _reg ) & FTMCTRL_MCFG1_PROM_WRITE_WS_MASK ) >> \
155 FTMCTRL_MCFG1_PROM_WRITE_WS_SHIFT )
156#define FTMCTRL_MCFG1_PROM_WRITE_WS_SET( _reg, _val ) \
157 ( ( ( _reg ) & ~FTMCTRL_MCFG1_PROM_WRITE_WS_MASK ) | \
158 ( ( ( _val ) << FTMCTRL_MCFG1_PROM_WRITE_WS_SHIFT ) & \
159 FTMCTRL_MCFG1_PROM_WRITE_WS_MASK ) )
160#define FTMCTRL_MCFG1_PROM_WRITE_WS( _val ) \
161 ( ( ( _val ) << FTMCTRL_MCFG1_PROM_WRITE_WS_SHIFT ) & \
162 FTMCTRL_MCFG1_PROM_WRITE_WS_MASK )
163
164#define FTMCTRL_MCFG1_PROM_READ_WS_SHIFT 0
165#define FTMCTRL_MCFG1_PROM_READ_WS_MASK 0xfU
166#define FTMCTRL_MCFG1_PROM_READ_WS_GET( _reg ) \
167 ( ( ( _reg ) & FTMCTRL_MCFG1_PROM_READ_WS_MASK ) >> \
168 FTMCTRL_MCFG1_PROM_READ_WS_SHIFT )
169#define FTMCTRL_MCFG1_PROM_READ_WS_SET( _reg, _val ) \
170 ( ( ( _reg ) & ~FTMCTRL_MCFG1_PROM_READ_WS_MASK ) | \
171 ( ( ( _val ) << FTMCTRL_MCFG1_PROM_READ_WS_SHIFT ) & \
172 FTMCTRL_MCFG1_PROM_READ_WS_MASK ) )
173#define FTMCTRL_MCFG1_PROM_READ_WS( _val ) \
174 ( ( ( _val ) << FTMCTRL_MCFG1_PROM_READ_WS_SHIFT ) & \
175 FTMCTRL_MCFG1_PROM_READ_WS_MASK )
176
188#define FTMCTRL_MCFG3_ME 0x8000000U
189
190#define FTMCTRL_MCFG3_WB 0x800U
191
192#define FTMCTRL_MCFG3_RB 0x400U
193
194#define FTMCTRL_MCFG3_PE 0x100U
195
196#define FTMCTRL_MCFG3_TCB_SHIFT 0
197#define FTMCTRL_MCFG3_TCB_MASK 0xffU
198#define FTMCTRL_MCFG3_TCB_GET( _reg ) \
199 ( ( ( _reg ) & FTMCTRL_MCFG3_TCB_MASK ) >> \
200 FTMCTRL_MCFG3_TCB_SHIFT )
201#define FTMCTRL_MCFG3_TCB_SET( _reg, _val ) \
202 ( ( ( _reg ) & ~FTMCTRL_MCFG3_TCB_MASK ) | \
203 ( ( ( _val ) << FTMCTRL_MCFG3_TCB_SHIFT ) & \
204 FTMCTRL_MCFG3_TCB_MASK ) )
205#define FTMCTRL_MCFG3_TCB( _val ) \
206 ( ( ( _val ) << FTMCTRL_MCFG3_TCB_SHIFT ) & \
207 FTMCTRL_MCFG3_TCB_MASK )
208
220#define FTMCTRL_MCFG5_IOHWS_SHIFT 23
221#define FTMCTRL_MCFG5_IOHWS_MASK 0x3f800000U
222#define FTMCTRL_MCFG5_IOHWS_GET( _reg ) \
223 ( ( ( _reg ) & FTMCTRL_MCFG5_IOHWS_MASK ) >> \
224 FTMCTRL_MCFG5_IOHWS_SHIFT )
225#define FTMCTRL_MCFG5_IOHWS_SET( _reg, _val ) \
226 ( ( ( _reg ) & ~FTMCTRL_MCFG5_IOHWS_MASK ) | \
227 ( ( ( _val ) << FTMCTRL_MCFG5_IOHWS_SHIFT ) & \
228 FTMCTRL_MCFG5_IOHWS_MASK ) )
229#define FTMCTRL_MCFG5_IOHWS( _val ) \
230 ( ( ( _val ) << FTMCTRL_MCFG5_IOHWS_SHIFT ) & \
231 FTMCTRL_MCFG5_IOHWS_MASK )
232
233#define FTMCTRL_MCFG5_ROMHWS_SHIFT 7
234#define FTMCTRL_MCFG5_ROMHWS_MASK 0x3f80U
235#define FTMCTRL_MCFG5_ROMHWS_GET( _reg ) \
236 ( ( ( _reg ) & FTMCTRL_MCFG5_ROMHWS_MASK ) >> \
237 FTMCTRL_MCFG5_ROMHWS_SHIFT )
238#define FTMCTRL_MCFG5_ROMHWS_SET( _reg, _val ) \
239 ( ( ( _reg ) & ~FTMCTRL_MCFG5_ROMHWS_MASK ) | \
240 ( ( ( _val ) << FTMCTRL_MCFG5_ROMHWS_SHIFT ) & \
241 FTMCTRL_MCFG5_ROMHWS_MASK ) )
242#define FTMCTRL_MCFG5_ROMHWS( _val ) \
243 ( ( ( _val ) << FTMCTRL_MCFG5_ROMHWS_SHIFT ) & \
244 FTMCTRL_MCFG5_ROMHWS_MASK )
245
257#define FTMCTRL_MCFG7_BRDYNCNT_SHIFT 16
258#define FTMCTRL_MCFG7_BRDYNCNT_MASK 0xffff0000U
259#define FTMCTRL_MCFG7_BRDYNCNT_GET( _reg ) \
260 ( ( ( _reg ) & FTMCTRL_MCFG7_BRDYNCNT_MASK ) >> \
261 FTMCTRL_MCFG7_BRDYNCNT_SHIFT )
262#define FTMCTRL_MCFG7_BRDYNCNT_SET( _reg, _val ) \
263 ( ( ( _reg ) & ~FTMCTRL_MCFG7_BRDYNCNT_MASK ) | \
264 ( ( ( _val ) << FTMCTRL_MCFG7_BRDYNCNT_SHIFT ) & \
265 FTMCTRL_MCFG7_BRDYNCNT_MASK ) )
266#define FTMCTRL_MCFG7_BRDYNCNT( _val ) \
267 ( ( ( _val ) << FTMCTRL_MCFG7_BRDYNCNT_SHIFT ) & \
268 FTMCTRL_MCFG7_BRDYNCNT_MASK )
269
270#define FTMCTRL_MCFG7_BRDYNRLD_SHIFT 0
271#define FTMCTRL_MCFG7_BRDYNRLD_MASK 0xffffU
272#define FTMCTRL_MCFG7_BRDYNRLD_GET( _reg ) \
273 ( ( ( _reg ) & FTMCTRL_MCFG7_BRDYNRLD_MASK ) >> \
274 FTMCTRL_MCFG7_BRDYNRLD_SHIFT )
275#define FTMCTRL_MCFG7_BRDYNRLD_SET( _reg, _val ) \
276 ( ( ( _reg ) & ~FTMCTRL_MCFG7_BRDYNRLD_MASK ) | \
277 ( ( ( _val ) << FTMCTRL_MCFG7_BRDYNRLD_SHIFT ) & \
278 FTMCTRL_MCFG7_BRDYNRLD_MASK ) )
279#define FTMCTRL_MCFG7_BRDYNRLD( _val ) \
280 ( ( ( _val ) << FTMCTRL_MCFG7_BRDYNRLD_SHIFT ) & \
281 FTMCTRL_MCFG7_BRDYNRLD_MASK )
282
288typedef struct ftmctrl {
292 uint32_t mcfg1;
293
294 uint32_t reserved_4_8;
295
299 uint32_t mcfg3;
300
301 uint32_t reserved_c_10;
302
306 uint32_t mcfg5;
307
308 uint32_t reserved_14_18;
309
313 uint32_t mcfg7;
314} ftmctrl;
315
318#ifdef __cplusplus
319}
320#endif
321
322#endif /* _GRLIB_FTMCTRL_REGS_H */
ftmctrl
struct ftmctrl ftmctrl
This structure defines the FTMCTRL register block memory map.
ftmctrl
This structure defines the FTMCTRL register block memory map.
Definition: ftmctrl-regs.h:288
ftmctrl::mcfg7
uint32_t mcfg7
See Memory configuration register 7 (MCFG7).
Definition: ftmctrl-regs.h:313
ftmctrl::mcfg1
uint32_t mcfg1
See Memory configuration register 1 (MCFG1).
Definition: ftmctrl-regs.h:292
ftmctrl::mcfg3
uint32_t mcfg3
See Memory configuration register 3 (MCFG3).
Definition: ftmctrl-regs.h:299
ftmctrl::mcfg5
uint32_t mcfg5
See Memory configuration register 5 (MCFG5).
Definition: ftmctrl-regs.h:306
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