RTEMS 6.1-rc1
fsl_soc_src.h
1/*
2 * Copyright 2019-2021 NXP
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7#ifndef _FSL_SRC_H_
8#define _FSL_SRC_H_
9
10#include "fsl_common.h"
11
15/*******************************************************************************
16 * Definitions
17 ******************************************************************************/
18
22#define FSL_SRC_DRIVER_VERSION (MAKE_VERSION(2, 1, 1))
25#define SRC_SLICE_ADDRESS_OFFSET (0x200U)
26
27#define SRC_SLICE_AUTHENTICATION_REGISTER_OFFSET (0x0U)
28#define SRC_SLICE_CONTROL_REGISTER_OFFSET (0x4U)
29#define SRC_SLICE_SETPOINT_CONFIG_REGISTER_OFFSET (0x8U)
30#define SRC_SLICE_DOMAIN_CONFIG_REGISTER_OFFSET (0x0CU)
31#define SRC_SLICE_STATUS_REGISTER_OFFSET (0x10U)
32
33#define SRC_GET_SLICE_REGISTER_ADDRESS(base, sliceName, registerOffset) \
34 (((uint32_t)base) + SRC_SLICE_ADDRESS_OFFSET + ((uint32_t)(sliceName) << 5UL) + (registerOffset))
35
36#define SRC_SLICE_STAT_UNDER_RST_MASK (0x1U)
37#define SRC_SLICE_STAT_RST_BY_HW_MASK (0x4U)
38#define SRC_SLICE_STAT_RST_BY_SW_MASK (0x8U)
39
40#define SRC_WHITE_LIST_VALUE(coreName) (1UL << (uint32_t)(coreName))
41#define SRC_ASSIGN_LIST_VALUE(coreName) (1UL << (uint32_t)(coreName))
42
43#define SRC_SLICE_AUTHEN_DOMAIN_MODE_MASK (0x1U)
44#define SRC_SLICE_AUTHEN_SETPOINT_MODE_MASK (0x2U)
45
46#define SRC_SLICE_AUTHEN_LOCK_MODE_MASK (0x80U)
47#define SRC_SLICE_AUTHEN_LOCK_MODE_SHIFT (7U)
48#define SRC_SLICE_AUTHEN_LOCK_MODE(x) \
49 (((uint32_t)(((uint32_t)(x)) << SRC_SLICE_AUTHEN_LOCK_MODE_SHIFT)) & SRC_SLICE_AUTHEN_LOCK_MODE_MASK)
50
51#define SRC_SLICE_AUTHEN_ASSIGN_LIST_MASK (0xF00U)
52#define SRC_SLICE_AUTHEN_ASSIGN_LIST_SHIFT (8U)
53#define SRC_SLICE_AUTHEN_ASSIGN_LIST(x) \
54 (((uint32_t)(((uint32_t)(x)) << SRC_SLICE_AUTHEN_ASSIGN_LIST_SHIFT)) & SRC_SLICE_AUTHEN_ASSIGN_LIST_MASK)
55
56#define SRC_SLICE_AUTHEN_LOCK_ASSIGN_MASK (0x8000U)
57#define SRC_SLICE_AUTHEN_LOCK_ASSIGN_SHIFT (15)
58#define SRC_SLICE_AUTHEN_LOCK_ASSIGN(x) \
59 (((uint32_t)(((uint32_t)(x)) << SRC_SLICE_AUTHEN_LOCK_ASSIGN_SHIFT)) & SRC_SLICE_AUTHEN_LOCK_ASSIGN_MASK)
60
61#define SRC_SLICE_AUTHEN_WHITE_LIST_MASK (0xF0000U)
62#define SRC_SLICE_AUTHEN_WHITE_LIST_SHIFT (16U)
63#define SRC_SLICE_AUTHEN_WHITE_LIST(x) \
64 (((uint32_t)(((uint32_t)(x)) << SRC_SLICE_AUTHEN_WHITE_LIST_SHIFT)) & SRC_SLICE_AUTHEN_WHITE_LIST_MASK)
65
66#define SRC_SLICE_AUTHEN_LOCK_LIST_MASK (0x800000U)
67#define SRC_SLICE_AUTHEN_LOCK_LIST_SHIFT (23U)
68#define SRC_SLICE_AUTHEN_LOCK_LIST(x) \
69 (((uint32_t)(((uint32_t)(x)) << SRC_SLICE_AUTHEN_LOCK_LIST_SHIFT)) & SRC_SLICE_AUTHEN_LOCK_LIST_MASK)
70
71#define SRC_SLICE_AUTHEN_USER_MASK (0x1000000U)
72#define SRC_SLICE_AUTHEN_USER_SHIFT (24U)
73#define SRC_SLICE_AUTHEN_USER(x) \
74 (((uint32_t)(((uint32_t)(x)) << SRC_SLICE_AUTHEN_USER_SHIFT)) & SRC_SLICE_AUTHEN_USER_MASK)
75
76#define SRC_SLICE_AUTHEN_NONSECURE_MASK (0x2000000U)
77#define SRC_SLICE_AUTHEN_NONSECURE_SHIFT (25U)
78#define SRC_SLICE_AUTHEN_NONSECURE(x) \
79 (((uint32_t)(((uint32_t)(x)) << SRC_SLICE_AUTHEN_NONSECURE_SHIFT)) & SRC_SLICE_AUTHEN_NONSECURE_MASK)
80
81#define SRC_SLICE_AUTHEN_LOCK_SETTING_MASK (0x80000000U)
82#define SRC_SLICE_AUTHEN_LOCK_SETTING_SHIFT (31U)
83#define SRC_SLICE_AUTHEN_LOCK_SETTING(x) \
84 (((uint32_t)(((uint32_t)(x)) << SRC_SLICE_AUTHEN_LOCK_SETTING_SHIFT)) & SRC_SLICE_AUTHEN_LOCK_SETTING_MASK)
85
89typedef enum _src_core_name
90{
91 kSRC_CM7Core = 0x1U,
92 kSRC_CM4Core = 0x2U,
94
99{
103
108{
121
126{
131 kSRC_M7CoreIppUserResetFlag = 1UL << 4UL,
148 kSRC_M4CoreIppUserResetFlag = 1UL << 20UL,
160};
161
166{
170
175{
187
192{
201};
202
207{
224};
225
230{
252
257{
262 uint32_t whiteList;
269
274{
279 uint32_t assignList;
283
288{
289 kSRC_SoftwareReset = SRC_SLICE_STAT_RST_BY_SW_MASK,
290 kSRC_PowerModeTransferReset = SRC_SLICE_STAT_RST_BY_HW_MASK,
291};
292
297{
301
302/*******************************************************************************
303 * API
304 ******************************************************************************/
305
306#if defined(__cplusplus)
307extern "C" {
308#endif
309
323void SRC_ReleaseCoreReset(SRC_Type *base, src_core_name_t coreName);
324
338static inline uint32_t SRC_GetBootConfig(SRC_Type *base)
339{
340 return base->SBMR1;
341}
342
349static inline uint8_t SRC_GetBootMode(SRC_Type *base)
350{
351 return (uint8_t)((base->SBMR2 & SRC_SBMR2_BMOD_MASK) >> SRC_SBMR2_BMOD_SHIFT);
352}
353
360static inline src_boot_fuse_selection_t SRC_GetBootFuseSelection(SRC_Type *base)
361{
362 return (src_boot_fuse_selection_t)(uint32_t)((base->SBMR2 & SRC_SBMR2_BT_FUSE_SEL_MASK) >>
363 SRC_SBMR2_BT_FUSE_SEL_SHIFT);
364}
365
372static inline uint8_t SRC_GetSECConfigFuseState(SRC_Type *base)
373{
374 return (uint8_t)((base->SBMR2 & SRC_SBMR2_SEC_CONFIG_MASK) >> SRC_SBMR2_SEC_CONFIG_SHIFT);
375}
376
377/* ! @} */
378
396
403static inline uint32_t SRC_GetResetStatusFlags(SRC_Type *base)
404{
405 return base->SRSR;
406}
407
414static inline void SRC_ClearGlobalSystemResetStatus(SRC_Type *base, uint32_t mask)
415{
416 base->SRSR = mask;
417}
418
435
452static inline void SRC_AllowUserModeAccess(SRC_Type *base, src_reset_slice_name_t sliceName, bool enable)
453{
454 uint32_t authRegAddr;
455
456 authRegAddr = SRC_GET_SLICE_REGISTER_ADDRESS(base, sliceName, SRC_SLICE_AUTHENTICATION_REGISTER_OFFSET);
457
458 if (enable)
459 {
460 *(volatile uint32_t *)authRegAddr |= SRC_SLICE_AUTHEN_USER_MASK;
461 }
462 else
463 {
464 *(volatile uint32_t *)authRegAddr &= ~SRC_SLICE_AUTHEN_USER_MASK;
465 }
466}
467
477static inline void SRC_AllowNonSecureModeAccess(SRC_Type *base, src_reset_slice_name_t sliceName, bool enable)
478{
479 uint32_t authRegAddr;
480
481 authRegAddr = SRC_GET_SLICE_REGISTER_ADDRESS(base, sliceName, SRC_SLICE_AUTHENTICATION_REGISTER_OFFSET);
482
483 if (enable)
484 {
485 *(volatile uint32_t *)authRegAddr |= SRC_SLICE_AUTHEN_NONSECURE_MASK;
486 }
487 else
488 {
489 *(volatile uint32_t *)authRegAddr &= ~SRC_SLICE_AUTHEN_NONSECURE_MASK;
490 }
491}
492
501static inline void SRC_LockAccessSetting(SRC_Type *base, src_reset_slice_name_t sliceName)
502{
503 uint32_t authRegAddr;
504
505 authRegAddr = SRC_GET_SLICE_REGISTER_ADDRESS(base, sliceName, SRC_SLICE_AUTHENTICATION_REGISTER_OFFSET);
506
507 *(volatile uint32_t *)authRegAddr |= SRC_SLICE_AUTHEN_LOCK_SETTING_MASK;
508}
509
517static inline void SRC_SetDomainIdWhiteList(SRC_Type *base, src_reset_slice_name_t sliceName, uint8_t domainId)
518{
519 uint32_t authRegAddr;
520
521 authRegAddr = SRC_GET_SLICE_REGISTER_ADDRESS(base, sliceName, SRC_SLICE_AUTHENTICATION_REGISTER_OFFSET);
522
523 *(volatile uint32_t *)authRegAddr = ((*(volatile uint32_t *)authRegAddr) & (~SRC_SLICE_AUTHEN_WHITE_LIST_MASK)) |
524 SRC_SLICE_AUTHEN_WHITE_LIST(domainId);
525}
526
535static inline void SRC_LockDomainIdWhiteList(SRC_Type *base, src_reset_slice_name_t sliceName)
536{
537 uint32_t authRegAddr;
538
539 authRegAddr = SRC_GET_SLICE_REGISTER_ADDRESS(base, sliceName, SRC_SLICE_AUTHENTICATION_REGISTER_OFFSET);
540
541 *(volatile uint32_t *)authRegAddr |= SRC_SLICE_AUTHEN_LOCK_LIST_MASK;
542}
543
552static inline void SRC_SetAssignList(SRC_Type *base, src_reset_slice_name_t sliceName, uint32_t assignList)
553{
554 uint32_t authRegAddr;
555
556 authRegAddr = SRC_GET_SLICE_REGISTER_ADDRESS(base, sliceName, SRC_SLICE_AUTHENTICATION_REGISTER_OFFSET);
557
558 *(volatile uint32_t *)authRegAddr = ((*(volatile uint32_t *)authRegAddr) & (~SRC_SLICE_AUTHEN_ASSIGN_LIST_MASK)) |
559 SRC_SLICE_AUTHEN_ASSIGN_LIST(assignList);
560}
561
570static inline void SRC_LockAssignList(SRC_Type *base, src_reset_slice_name_t sliceName)
571{
572 uint32_t authRegAddr;
573
574 authRegAddr = SRC_GET_SLICE_REGISTER_ADDRESS(base, sliceName, SRC_SLICE_AUTHENTICATION_REGISTER_OFFSET);
575
576 *(volatile uint32_t *)authRegAddr |= SRC_SLICE_AUTHEN_LOCK_ASSIGN_MASK;
577}
578
588static inline void SRC_EnableSetPointTransferReset(SRC_Type *base, src_reset_slice_name_t sliceName, bool enable)
589{
590 uint32_t authRegAddr;
591
592 authRegAddr = SRC_GET_SLICE_REGISTER_ADDRESS(base, sliceName, SRC_SLICE_AUTHENTICATION_REGISTER_OFFSET);
593
594 if (enable)
595 {
596 /* If the setpoint mode transfer reset is enabled, domain mode transfer reset should be disabled. */
597 *(volatile uint32_t *)authRegAddr =
598 ((*(volatile uint32_t *)authRegAddr) & (~SRC_SLICE_AUTHEN_DOMAIN_MODE_MASK)) |
599 SRC_SLICE_AUTHEN_SETPOINT_MODE_MASK;
600 }
601 else
602 {
603 *(volatile uint32_t *)authRegAddr &= ~SRC_SLICE_AUTHEN_SETPOINT_MODE_MASK;
604 }
605}
606
616static inline void SRC_EnableDomainModeTransferReset(SRC_Type *base, src_reset_slice_name_t sliceName, bool enable)
617{
618 uint32_t authRegAddr;
619
620 authRegAddr = SRC_GET_SLICE_REGISTER_ADDRESS(base, sliceName, SRC_SLICE_AUTHENTICATION_REGISTER_OFFSET);
621
622 if (enable)
623 {
624 /* If the domain mode transfer reset is enabled, setpoint mode transfer reset should be disabled. */
625 *(volatile uint32_t *)authRegAddr =
626 ((*(volatile uint32_t *)authRegAddr) & (~SRC_SLICE_AUTHEN_SETPOINT_MODE_MASK)) |
627 SRC_SLICE_AUTHEN_DOMAIN_MODE_MASK;
628 }
629 else
630 {
631 *(volatile uint32_t *)authRegAddr &= ~SRC_SLICE_AUTHEN_DOMAIN_MODE_MASK;
632 }
633}
634
643void SRC_SetSliceSetPointConfig(SRC_Type *base, src_reset_slice_name_t sliceName, uint32_t setpointConfig);
644
652void SRC_SetSliceDomainModeConfig(SRC_Type *base, src_reset_slice_name_t sliceName, uint32_t domainConfig);
653
661
676static inline uint32_t SRC_GetSliceResetStatusFlags(SRC_Type *base, src_reset_slice_name_t sliceName)
677{
678 return (*(volatile uint32_t *)(SRC_GET_SLICE_REGISTER_ADDRESS(base, sliceName, SRC_SLICE_STATUS_REGISTER_OFFSET)) &
679 (SRC_SLICE_STAT_RST_BY_HW_MASK | SRC_SLICE_STAT_RST_BY_SW_MASK));
680}
681
689static inline void SRC_ClearSliceResetStatusFlags(SRC_Type *base, src_reset_slice_name_t sliceName, uint32_t mask)
690{
691 *(volatile uint32_t *)SRC_GET_SLICE_REGISTER_ADDRESS(base, sliceName, SRC_SLICE_STATUS_REGISTER_OFFSET) = mask;
692}
693
694/* @} */
695
710
725static inline void SRC_SetGeneralPurposeRegister(SRC_Type *base,
727 uint32_t value)
728{
729 base->GPR[index] = value;
730}
731
739static inline uint32_t SRC_GetGeneralPurposeRegister(SRC_Type *base, src_general_purpose_register_index_t index)
740{
741 assert((uint8_t)index < (uint8_t)SRC_GPR_COUNT);
742
743 return base->GPR[index];
744}
745
748#if defined(__cplusplus)
749}
750#endif /* __cplusplus */
751
754#endif /* _FSL_SRC_H_ */
enum _src_global_system_reset_mode src_global_system_reset_mode_t
The enumeration of global system reset mode.
enum _src_boot_fuse_selection src_boot_fuse_selection_t
The enumeration of the boot fuse selection.
struct _src_setpoint_authentication src_setpoint_authentication_t
The structure of setpoint authentication.
_src_core_name
System core.
Definition: fsl_soc_src.h:90
void SRC_LockSliceMode(SRC_Type *base, src_reset_slice_name_t sliceName)
Locks the value of SETPOINT_MODE and DOMAIN_MODE for the selected reset slice.
Definition: fsl_soc_src.c:108
_src_setpoint_selection
The enumeration of setpoint.
Definition: fsl_soc_src.h:207
_src_boot_fuse_selection
The enumeration of the boot fuse selection.
Definition: fsl_soc_src.h:99
enum _src_reset_slice_name src_reset_slice_name_t
The enumeration of the slice name.
struct _src_domain_mode_authentication src_domain_mode_authentication_t
The stucture of domain mode authentication.
_src_slice_reset_source
The enumeration of the reset source of each slice.
Definition: fsl_soc_src.h:288
_src_slice_reset_state
The enumeration of the reset state of each slice.
Definition: fsl_soc_src.h:297
_src_global_system_reset_status_flags
The enumeration of reset status flags.
Definition: fsl_soc_src.h:126
_src_reset_slice_name
The enumeration of the slice name.
Definition: fsl_soc_src.h:175
_src_global_system_reset_source
The enumeration of global system reset sources.
Definition: fsl_soc_src.h:108
void SRC_AssertSliceSoftwareReset(SRC_Type *base, src_reset_slice_name_t sliceName)
Asserts software reset for the selected slice.
Definition: fsl_soc_src.c:86
enum _src_core_name src_core_name_t
System core.
void SRC_SetSliceDomainModeConfig(SRC_Type *base, src_reset_slice_name_t sliceName, uint32_t domainConfig)
Sets domain mode configuration for the selected reset slice.
Definition: fsl_soc_src.c:146
enum _src_global_system_reset_source src_global_system_reset_source_t
The enumeration of global system reset sources.
src_slice_reset_state_t SRC_GetSliceResetState(SRC_Type *base, src_reset_slice_name_t sliceName)
Gets the reset state of the selected slice.
Definition: fsl_soc_src.c:166
_src_domain_mode_selection
The enumeration of the domain mode.
Definition: fsl_soc_src.h:192
_src_global_system_reset_mode
The enumeration of global system reset mode.
Definition: fsl_soc_src.h:166
void SRC_SetGlobalSystemResetMode(SRC_Type *base, src_global_system_reset_source_t resetSource, src_global_system_reset_mode_t resetMode)
Sets the reset mode of global system reset source.
Definition: fsl_soc_src.c:67
void SRC_SetSliceSetPointConfig(SRC_Type *base, src_reset_slice_name_t sliceName, uint32_t setpointConfig)
Sets setpoint configuration for the selected reset slice.
Definition: fsl_soc_src.c:126
enum _src_slice_reset_state src_slice_reset_state_t
The enumeration of the reset state of each slice.
void SRC_ReleaseCoreReset(SRC_Type *base, src_core_name_t coreName)
Releases related core reset operation.
Definition: fsl_soc_src.c:44
enum _src_general_purpose_register_index src_general_purpose_register_index_t
The index of each general purpose register.
_src_general_purpose_register_index
The index of each general purpose register.
Definition: fsl_soc_src.h:230
@ kSRC_CM7Core
Definition: fsl_soc_src.h:91
@ kSRC_CM4Core
Definition: fsl_soc_src.h:92
@ kSRC_SetPoint12AssertReset
Definition: fsl_soc_src.h:220
@ kSRC_SetPoint10AssertReset
Definition: fsl_soc_src.h:218
@ kSRC_SetPoint15AssertReset
Definition: fsl_soc_src.h:223
@ kSRC_SetPoint9AssertReset
Definition: fsl_soc_src.h:217
@ kSRC_SetPoint8AssertReset
Definition: fsl_soc_src.h:216
@ kSRC_SetPoint6AssertReset
Definition: fsl_soc_src.h:214
@ kSRC_SetPoint3AssertReset
Definition: fsl_soc_src.h:211
@ kSRC_SetPoint13AssertReset
Definition: fsl_soc_src.h:221
@ kSRC_SetPoint0AssertReset
Definition: fsl_soc_src.h:208
@ kSRC_SetPoint11AssertReset
Definition: fsl_soc_src.h:219
@ kSRC_SetPoint2AssertReset
Definition: fsl_soc_src.h:210
@ kSRC_SetPoint5AssertReset
Definition: fsl_soc_src.h:213
@ kSRC_SetPoint7AssertReset
Definition: fsl_soc_src.h:215
@ kSRC_SetPoint14AssertReset
Definition: fsl_soc_src.h:222
@ kSRC_SetPoint1AssertReset
Definition: fsl_soc_src.h:209
@ kSRC_SetPoint4AssertReset
Definition: fsl_soc_src.h:212
@ kSRC_SerialDownloaderBootFlow
Definition: fsl_soc_src.h:100
@ kSRC_NormalBootFlow
Definition: fsl_soc_src.h:101
@ kSRC_SoftwareReset
Definition: fsl_soc_src.h:289
@ kSRC_PowerModeTransferReset
Definition: fsl_soc_src.h:290
@ kSRC_SliceResetInProcess
Definition: fsl_soc_src.h:299
@ kSRC_SliceResetFinished
Definition: fsl_soc_src.h:298
@ kSRC_M4CoreM7LockUpResetFlag
Definition: fsl_soc_src.h:157
@ kSRC_M4CoreCSUResetFlag
Definition: fsl_soc_src.h:147
@ kSRC_M7CoreOverVoltageResetFlag
Definition: fsl_soc_src.h:141
@ kSRC_M4CoreM7RequestResetFlag
Definition: fsl_soc_src.h:156
@ kSRC_M7CoreM4LockUpResetFlag
Definition: fsl_soc_src.h:140
@ kSRC_M7CoreM7LockUpResetFlag
Definition: fsl_soc_src.h:129
@ kSRC_M4CoreOverVoltageResetFlag
Definition: fsl_soc_src.h:158
@ kSRC_M7CoreIppUserResetFlag
Definition: fsl_soc_src.h:131
@ kSRC_M7CoreIppResetFlag
Definition: fsl_soc_src.h:127
@ kSRC_M7CoreTempsenseResetFlag
Definition: fsl_soc_src.h:138
@ kSRC_M4CoreIppUserResetFlag
Definition: fsl_soc_src.h:148
@ kSRC_M4CoreM4RequestResetFlag
Definition: fsl_soc_src.h:145
@ kSRC_M7CoreJtagResetFlag
Definition: fsl_soc_src.h:134
@ kSRC_M4CoreCdogResetFlag
Definition: fsl_soc_src.h:159
@ kSRC_M4CoreJtagSWResetFlag
Definition: fsl_soc_src.h:152
@ kSRC_M4CoreIppResetFlag
Definition: fsl_soc_src.h:144
@ kSRC_M4CoreWdogResetFlag
Definition: fsl_soc_src.h:150
@ kSRC_M7CoreCdogResetFlag
Definition: fsl_soc_src.h:142
@ kSRC_M7CoreM4RequestResetFlag
Definition: fsl_soc_src.h:139
@ kSRC_M4CoreWdog4ResetFlag
Definition: fsl_soc_src.h:154
@ kSRC_M7CoreCSUResetFlag
Definition: fsl_soc_src.h:130
@ kSRC_M7CoreWdogResetFlag
Definition: fsl_soc_src.h:133
@ kSRC_M4CoreWdog3ResetFlag
Definition: fsl_soc_src.h:153
@ kSRC_M4CoreM4LockUpResetFlag
Definition: fsl_soc_src.h:146
@ kSRC_M4CoreTempsenseResetFlag
Definition: fsl_soc_src.h:155
@ kSRC_M7CoreJtagSWResetFlag
Definition: fsl_soc_src.h:135
@ kSRC_M4CoreJtagResetFlag
Definition: fsl_soc_src.h:151
@ kSRC_M7CoreWdog3ResetFlag
Definition: fsl_soc_src.h:136
@ kSRC_M7CoreM7RequestResetFlag
Definition: fsl_soc_src.h:128
@ kSRC_M7CoreWdog4ResetFlag
Definition: fsl_soc_src.h:137
@ kSRC_MegaSlice
Definition: fsl_soc_src.h:176
@ kSRC_M4DebugSlice
Definition: fsl_soc_src.h:182
@ kSRC_Usbphy1Slice
Definition: fsl_soc_src.h:184
@ kSRC_WakeUpSlice
Definition: fsl_soc_src.h:178
@ kSRC_M7DebugSlice
Definition: fsl_soc_src.h:183
@ kSRC_M4CoreSlice
Definition: fsl_soc_src.h:180
@ kSRC_LpsrSlice
Definition: fsl_soc_src.h:179
@ kSRC_Usbphy2Slice
Definition: fsl_soc_src.h:185
@ kSRC_DisplaySlice
Definition: fsl_soc_src.h:177
@ kSRC_M7CoreSlice
Definition: fsl_soc_src.h:181
@ kSRC_JageSoftwareReset
Definition: fsl_soc_src.h:118
@ kSRC_M4RequestReset
Definition: fsl_soc_src.h:114
@ kSRC_WdogReset
Definition: fsl_soc_src.h:109
@ kSRC_Wdog4Reset
Definition: fsl_soc_src.h:111
@ kSRC_TempsenseReset
Definition: fsl_soc_src.h:116
@ kSRC_M7RequestReset
Definition: fsl_soc_src.h:115
@ kSRC_CSUReset
Definition: fsl_soc_src.h:117
@ kSRC_M4LockUpReset
Definition: fsl_soc_src.h:112
@ kSRC_Wdog3Reset
Definition: fsl_soc_src.h:110
@ kSRC_OverVoltageReset
Definition: fsl_soc_src.h:119
@ kSRC_M7LockUpReset
Definition: fsl_soc_src.h:113
@ kSRC_Cpu0StopModeAssertReset
Definition: fsl_soc_src.h:195
@ kSRC_Cpu1StopModeAssertReset
Definition: fsl_soc_src.h:199
@ kSRC_Cpu1RunModeAssertReset
Definition: fsl_soc_src.h:197
@ kSRC_Cpu1SuspendModeAssertReset
Definition: fsl_soc_src.h:200
@ kSRC_Cpu0SuspendModeAssertReset
Definition: fsl_soc_src.h:196
@ kSRC_Cpu1WaitModeAssertReset
Definition: fsl_soc_src.h:198
@ kSRC_Cpu0RunModeAssertReset
Definition: fsl_soc_src.h:193
@ kSRC_Cpu0WaitModeAssertReset
Definition: fsl_soc_src.h:194
@ kSRC_DoNotResetSystem
Definition: fsl_soc_src.h:168
@ kSRC_ResetSystem
Definition: fsl_soc_src.h:167
@ kSRC_GeneralPurposeRegister18
Definition: fsl_soc_src.h:248
@ kSRC_GeneralPurposeRegister15
Definition: fsl_soc_src.h:245
@ kSRC_GeneralPurposeRegister6
Definition: fsl_soc_src.h:236
@ kSRC_GeneralPurposeRegister16
Definition: fsl_soc_src.h:246
@ kSRC_GeneralPurposeRegister13
Definition: fsl_soc_src.h:243
@ kSRC_GeneralPurposeRegister12
Definition: fsl_soc_src.h:242
@ kSRC_GeneralPurposeRegister4
Definition: fsl_soc_src.h:234
@ kSRC_GeneralPurposeRegister5
Definition: fsl_soc_src.h:235
@ kSRC_GeneralPurposeRegister1
Definition: fsl_soc_src.h:231
@ kSRC_GeneralPurposeRegister2
Definition: fsl_soc_src.h:232
@ kSRC_GeneralPurposeRegister17
Definition: fsl_soc_src.h:247
@ kSRC_GeneralPurposeRegister10
Definition: fsl_soc_src.h:240
@ kSRC_GeneralPurposeRegister19
Definition: fsl_soc_src.h:249
@ kSRC_GeneralPurposeRegister20
Definition: fsl_soc_src.h:250
@ kSRC_GeneralPurposeRegister7
Definition: fsl_soc_src.h:237
@ kSRC_GeneralPurposeRegister3
Definition: fsl_soc_src.h:233
@ kSRC_GeneralPurposeRegister9
Definition: fsl_soc_src.h:239
@ kSRC_GeneralPurposeRegister14
Definition: fsl_soc_src.h:244
@ kSRC_GeneralPurposeRegister8
Definition: fsl_soc_src.h:238
@ kSRC_GeneralPurposeRegister11
Definition: fsl_soc_src.h:241
Definition: MIMXRT1052.h:42848
The stucture of domain mode authentication.
Definition: fsl_soc_src.h:274
bool enableDomainModeTransferReset
Definition: fsl_soc_src.h:275
uint32_t assignList
Definition: fsl_soc_src.h:279
bool lockAssignList
Definition: fsl_soc_src.h:281
The structure of setpoint authentication.
Definition: fsl_soc_src.h:257
uint32_t whiteList
Definition: fsl_soc_src.h:262
bool lockWhiteList
Definition: fsl_soc_src.h:264
bool lockSetting
Definition: fsl_soc_src.h:265
bool allowNonSecureModeAccess
Definition: fsl_soc_src.h:266
bool allowUserModeAccess
Definition: fsl_soc_src.h:267
bool enableSetpointTranferReset
Definition: fsl_soc_src.h:258