RTEMS 6.1-rc1
fsl_rdc.h
1/*
2 * Copyright 2017-2021 NXP
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8#ifndef _FSL_RDC_H_
9#define _FSL_RDC_H_
10
11#include "fsl_common.h"
12
18/******************************************************************************
19 * Definitions
20 *****************************************************************************/
21#define FSL_RDC_DRIVER_VERSION (MAKE_VERSION(2, 2, 0))
22
23#define RDC_ACCESS_POLICY(domainID, policy) (uint16_t)((uint16_t)(policy) << ((domainID)*2U))
24
29{
30 uint32_t domainNumber : 4;
31 uint32_t masterNumber : 8;
32 uint32_t periphNumber : 8;
33 uint32_t memNumber : 8;
34 uint32_t : 4;
36
41{
42 kRDC_RestoreCompleteInterrupt = RDC_INTCTRL_RCI_EN_MASK,
44};
45
50{
51 kRDC_PowerDownDomainOn = RDC_STAT_PDS_MASK,
52};
53
58{
59 uint32_t domainId : 2U;
60 uint32_t : 29U;
61 uint32_t lock : 1U;
63
68{
73};
74
79{
80 rdc_periph_t periph;
81 bool lock;
85 uint16_t policy;
87
96{
97 rdc_mem_t mem;
99 bool lock;
100 uint64_t baseAddress;
101 uint64_t endAddress;
102 uint16_t policy;
104
108typedef struct _rdc_mem_status
109{
111 uint8_t domainID;
112 uint64_t address;
114
115/*******************************************************************************
116 * API
117 ******************************************************************************/
118
119#if defined(__cplusplus)
120extern "C" {
121#endif
122
130void RDC_Init(RDC_Type *base);
131
139void RDC_Deinit(RDC_Type *base);
140
151
158static inline void RDC_EnableInterrupts(RDC_Type *base, uint32_t mask)
159{
160 base->INTCTRL |= mask;
161}
162
169static inline void RDC_DisableInterrupts(RDC_Type *base, uint32_t mask)
170{
171 base->INTCTRL &= ~mask;
172}
173
180static inline uint32_t RDC_GetInterruptStatus(RDC_Type *base)
181{
182 return base->INTSTAT;
183}
184
191static inline void RDC_ClearInterruptStatus(RDC_Type *base, uint32_t mask)
192{
193 base->INTSTAT = mask;
194}
195
202static inline uint32_t RDC_GetStatus(RDC_Type *base)
203{
204 return base->STAT;
205}
206
213static inline void RDC_ClearStatus(RDC_Type *base, uint32_t mask)
214{
215 base->STAT = mask;
216}
217
226 rdc_master_t master,
227 const rdc_domain_assignment_t *domainAssignment);
228
241
250static inline void RDC_LockMasterDomainAssignment(RDC_Type *base, rdc_master_t master)
251{
252 assert((uint32_t)master < RDC_MDA_COUNT);
253
254 base->MDA[master] |= RDC_MDA_LCK_MASK;
255 __DSB();
256}
257
265
282
291static inline void RDC_LockPeriphAccessConfig(RDC_Type *base, rdc_periph_t periph)
292{
293 assert((uint32_t)periph < RDC_PDAP_COUNT);
294
295 base->PDAP[periph] |= RDC_PDAP_LCK_MASK;
296 __DSB();
297}
298
307static inline uint8_t RDC_GetPeriphAccessPolicy(RDC_Type *base, rdc_periph_t periph, uint8_t domainId)
308{
309 assert((uint32_t)periph < RDC_PDAP_COUNT);
310
311 return (uint8_t)((base->PDAP[periph] >> (domainId * 2U)) & 0x03U);
312}
313
325
343
354static inline void RDC_LockMemAccessConfig(RDC_Type *base, rdc_mem_t mem)
355{
356 assert((uint32_t)mem < RDC_MRC_COUNT);
357
358 base->MR[mem].MRC |= RDC_MRC_LCK_MASK;
359 __DSB();
360}
361
369static inline void RDC_SetMemAccessValid(RDC_Type *base, rdc_mem_t mem, bool valid)
370{
371 assert((uint32_t)mem < RDC_MRC_COUNT);
372
373 if (valid)
374 {
375 base->MR[mem].MRC |= RDC_MRC_ENA_MASK;
376 }
377 else
378 {
379 base->MR[mem].MRC &= ~RDC_MRC_ENA_MASK;
380 }
381 __DSB();
382}
383
396void RDC_GetMemViolationStatus(RDC_Type *base, rdc_mem_t mem, rdc_mem_status_t *status);
397
404static inline void RDC_ClearMemViolationFlag(RDC_Type *base, rdc_mem_t mem)
405{
406 assert((uint32_t)mem < RDC_MRC_COUNT);
407
408 base->MR[mem].MRVS = RDC_MRVS_AD_MASK;
409}
410
419static inline uint8_t RDC_GetMemAccessPolicy(RDC_Type *base, rdc_mem_t mem, uint8_t domainId)
420{
421 assert((uint32_t)mem < RDC_MRC_COUNT);
422
423 return (uint8_t)((base->MR[mem].MRC >> (domainId * 2U)) & 0x03U);
424}
425
434static inline uint8_t RDC_GetCurrentMasterDomainId(RDC_Type *base)
435{
436 return (uint8_t)((base->STAT & RDC_STAT_DID_MASK) >> RDC_STAT_DID_SHIFT);
437}
438
439#if defined(__cplusplus)
440}
441#endif
442
447#endif /* _FSL_RDC_H_ */
__STATIC_FORCEINLINE void __DSB(void)
Data Synchronization Barrier.
Definition: cmsis_gcc.h:286
enum _rdc_master rdc_master_t
Structure for the RDC mapping.
struct _rdc_hardware_config rdc_hardware_config_t
RDC hardware configuration.
_rdc_flags
RDC status.
Definition: fsl_rdc.h:50
void RDC_GetDefaultPeriphAccessConfig(rdc_periph_access_config_t *config)
Get default peripheral access policy.
Definition: fsl_rdc.c:205
_rdc_interrupts
RDC interrupts.
Definition: fsl_rdc.h:41
void RDC_GetDefaultMasterDomainAssignment(rdc_domain_assignment_t *domainAssignment)
Get default master domain assignment.
Definition: fsl_rdc.c:152
void RDC_Init(RDC_Type *base)
Initializes the RDC module.
Definition: fsl_rdc.c:83
struct _rdc_mem_status rdc_mem_status_t
Memory region access violation status.
void RDC_GetHardwareConfig(RDC_Type *base, rdc_hardware_config_t *config)
Gets the RDC hardware configuration.
Definition: fsl_rdc.c:113
void RDC_GetMemViolationStatus(RDC_Type *base, rdc_mem_t mem, rdc_mem_status_t *status)
Get the memory region violation status.
Definition: fsl_rdc.c:295
void RDC_SetMemAccessConfig(RDC_Type *base, const rdc_mem_access_config_t *config)
Set memory region access policy.
Definition: fsl_rdc.c:228
struct _rdc_mem_access_config rdc_mem_access_config_t
Memory region domain access control configuration.
struct _rdc_periph_access_config rdc_periph_access_config_t
Peripheral domain access permission configuration.
void RDC_SetMasterDomainAssignment(RDC_Type *base, rdc_master_t master, const rdc_domain_assignment_t *domainAssignment)
Set master domain assignment.
Definition: fsl_rdc.c:130
_rdc_access_policy
Access permission policy.
Definition: fsl_rdc.h:68
void RDC_GetDefaultMemAccessConfig(rdc_mem_access_config_t *config)
Get default memory region access policy.
Definition: fsl_rdc.c:269
void RDC_Deinit(RDC_Type *base)
De-initializes the RDC module.
Definition: fsl_rdc.c:97
void RDC_SetPeriphAccessConfig(RDC_Type *base, const rdc_periph_access_config_t *config)
Set peripheral access policy.
Definition: fsl_rdc.c:168
struct _rdc_domain_assignment rdc_domain_assignment_t
Master domain assignment.
@ kRDC_PowerDownDomainOn
Definition: fsl_rdc.h:51
@ kRDC_RestoreCompleteInterrupt
Definition: fsl_rdc.h:42
@ kRDC_NoAccess
Definition: fsl_rdc.h:69
@ kRDC_ReadWrite
Definition: fsl_rdc.h:72
@ kRDC_ReadOnly
Definition: fsl_rdc.h:71
@ kRDC_WriteOnly
Definition: fsl_rdc.h:70
Definition: MIMXRT1166_cm4.h:72217
Master domain assignment.
Definition: fsl_rdc.h:58
uint32_t lock
Definition: fsl_rdc.h:61
uint32_t domainId
Definition: fsl_rdc.h:59
RDC hardware configuration.
Definition: fsl_rdc.h:29
uint32_t domainNumber
Definition: fsl_rdc.h:30
uint32_t masterNumber
Definition: fsl_rdc.h:31
uint32_t periphNumber
Definition: fsl_rdc.h:32
uint32_t memNumber
Definition: fsl_rdc.h:33
Memory region domain access control configuration.
Definition: fsl_rdc.h:96
uint64_t endAddress
Definition: fsl_rdc.h:101
rdc_mem_t mem
Definition: fsl_rdc.h:97
uint16_t policy
Definition: fsl_rdc.h:102
bool lock
Definition: fsl_rdc.h:99
uint64_t baseAddress
Definition: fsl_rdc.h:100
Memory region access violation status.
Definition: fsl_rdc.h:109
uint8_t domainID
Definition: fsl_rdc.h:111
uint64_t address
Definition: fsl_rdc.h:112
bool hasViolation
Definition: fsl_rdc.h:110
Peripheral domain access permission configuration.
Definition: fsl_rdc.h:79
rdc_periph_t periph
Definition: fsl_rdc.h:80
uint16_t policy
Definition: fsl_rdc.h:85
bool enableSema
Definition: fsl_rdc.h:82
bool lock
Definition: fsl_rdc.h:81
Definition: deflate.c:114