RTEMS 6.1-rc1
fsl_flexio_spi.h
1/*
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * Copyright 2016-2020, 2022 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9#ifndef _FSL_FLEXIO_SPI_H_
10#define _FSL_FLEXIO_SPI_H_
11
12#include "fsl_common.h"
13#include "fsl_flexio.h"
14
20/*******************************************************************************
21 * Definitions
22 ******************************************************************************/
23
27#define FSL_FLEXIO_SPI_DRIVER_VERSION (MAKE_VERSION(2, 3, 0))
30#ifndef FLEXIO_SPI_DUMMYDATA
32#define FLEXIO_SPI_DUMMYDATA (0xFFFFFFFFU)
33#endif
34
36#ifndef SPI_RETRY_TIMES
37#define SPI_RETRY_TIMES 0U /* Define to zero means keep waiting until the flag is assert/deassert. */
38#endif
39
41#define FLEXIO_SPI_XFER_DATA_FORMAT(flag) ((flag) & (0x7U))
42
44enum
45{
51};
52
55{
61
64{
68
71{
76
79{
82};
83
86{
89};
90
93{
97};
98
102{
110};
111
113typedef struct _flexio_spi_type
114{
116 uint8_t SDOPinIndex;
118 uint8_t SDIPinIndex;
119 uint8_t SCKPinIndex;
120 uint8_t CSnPinIndex;
121 uint8_t shifterIndex[2];
122 uint8_t timerIndex[2];
124
127{
134 uint32_t baudRate_Bps;
138
141{
151
154{
155 uint8_t *txData;
156 uint8_t *rxData;
157 size_t dataSize;
158 uint8_t flags;
160
163
166
170 status_t status,
171 void *userData);
172
176 status_t status,
177 void *userData);
178
181{
182 uint8_t *txData;
183 uint8_t *rxData;
185 volatile size_t txRemainingBytes;
186 volatile size_t rxRemainingBytes;
187 volatile uint32_t state;
188 uint8_t bytePerFrame;
191 void *userData;
192};
193
194/*******************************************************************************
195 * API
196 ******************************************************************************/
197
198#if defined(__cplusplus)
199extern "C" {
200#endif /*_cplusplus*/
201
247void FLEXIO_SPI_MasterInit(FLEXIO_SPI_Type *base, flexio_spi_master_config_t *masterConfig, uint32_t srcClock_Hz);
248
255
267
306
313
325
343
354void FLEXIO_SPI_ClearStatusFlags(FLEXIO_SPI_Type *base, uint32_t mask);
355
373void FLEXIO_SPI_EnableInterrupts(FLEXIO_SPI_Type *base, uint32_t mask);
374
385void FLEXIO_SPI_DisableInterrupts(FLEXIO_SPI_Type *base, uint32_t mask);
386
402void FLEXIO_SPI_EnableDMA(FLEXIO_SPI_Type *base, uint32_t mask, bool enable);
403
413static inline uint32_t FLEXIO_SPI_GetTxDataRegisterAddress(FLEXIO_SPI_Type *base,
415{
416 if (direction == kFLEXIO_SPI_MsbFirst)
417 {
419 base->shifterIndex[0]) +
420 3U;
421 }
422 else
423 {
424 return FLEXIO_GetShifterBufferAddress(base->flexioBase, kFLEXIO_ShifterBuffer, base->shifterIndex[0]);
425 }
426}
427
437static inline uint32_t FLEXIO_SPI_GetRxDataRegisterAddress(FLEXIO_SPI_Type *base,
439{
440 if (direction == kFLEXIO_SPI_MsbFirst)
441 {
442 return FLEXIO_GetShifterBufferAddress(base->flexioBase, kFLEXIO_ShifterBufferBitSwapped, base->shifterIndex[1]);
443 }
444 else
445 {
446 return FLEXIO_GetShifterBufferAddress(base->flexioBase, kFLEXIO_ShifterBuffer, base->shifterIndex[1]) + 3U;
447 }
448}
449
463static inline void FLEXIO_SPI_Enable(FLEXIO_SPI_Type *base, bool enable)
464{
465 if (enable)
466 {
467 base->flexioBase->CTRL |= FLEXIO_CTRL_FLEXEN_MASK;
468 }
469}
470
478void FLEXIO_SPI_MasterSetBaudRate(FLEXIO_SPI_Type *base, uint32_t baudRate_Bps, uint32_t srcClockHz);
479
491static inline void FLEXIO_SPI_WriteData(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction, uint32_t data)
492{
493 if (direction == kFLEXIO_SPI_MsbFirst)
494 {
495 base->flexioBase->SHIFTBUFBBS[base->shifterIndex[0]] = data;
496 }
497 else
498 {
499 base->flexioBase->SHIFTBUF[base->shifterIndex[0]] = data;
500 }
501}
502
513static inline uint32_t FLEXIO_SPI_ReadData(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction)
514{
515 if (direction == kFLEXIO_SPI_MsbFirst)
516 {
517 return (uint32_t)(base->flexioBase->SHIFTBUFBIS[base->shifterIndex[1]]);
518 }
519 else
520 {
521 return (uint32_t)(base->flexioBase->SHIFTBUFBYS[base->shifterIndex[1]]);
522 }
523}
524
539 const uint8_t *buffer,
540 size_t size);
541
557 uint8_t *buffer,
558 size_t size);
559
571
580/*Transactional APIs*/
581
600 void *userData);
601
618
626
637
644void FLEXIO_SPI_MasterTransferHandleIRQ(void *spiType, void *spiHandle);
645
659 void *userData);
660
677
684static inline void FLEXIO_SPI_SlaveTransferAbort(FLEXIO_SPI_Type *base, flexio_spi_slave_handle_t *handle)
685{
686 FLEXIO_SPI_MasterTransferAbort(base, handle);
687}
697static inline status_t FLEXIO_SPI_SlaveTransferGetCount(FLEXIO_SPI_Type *base,
699 size_t *count)
700{
701 return FLEXIO_SPI_MasterTransferGetCount(base, handle, count);
702}
703
710void FLEXIO_SPI_SlaveTransferHandleIRQ(void *spiType, void *spiHandle);
711
714#if defined(__cplusplus)
715}
716#endif /*_cplusplus*/
719#endif /*_FSL_FLEXIO_SPI_H_*/
uint32_t FLEXIO_GetShifterBufferAddress(FLEXIO_Type *base, flexio_shifter_buffer_type_t type, uint8_t index)
Gets the shifter buffer address for the DMA transfer usage.
Definition: fsl_flexio.c:173
@ kFLEXIO_ShifterBufferBitSwapped
Definition: fsl_flexio.h:224
@ kFLEXIO_ShifterBuffer
Definition: fsl_flexio.h:223
status_t FLEXIO_SPI_MasterTransferCreateHandle(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle, flexio_spi_master_transfer_callback_t callback, void *userData)
Initializes the FlexIO SPI Master handle, which is used in transactional functions.
Definition: fsl_flexio_spi.c:1036
uint8_t flags
Definition: fsl_flexio_spi.h:158
size_t transferSize
Definition: fsl_flexio_spi.h:184
uint32_t baudRate_Bps
Definition: fsl_flexio_spi.h:134
status_t FLEXIO_SPI_WriteBlocking(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction, const uint8_t *buffer, size_t size)
Sends a buffer of data bytes.
Definition: fsl_flexio_spi.c:710
uint8_t SDOPinIndex
Definition: fsl_flexio_spi.h:116
enum _flexio_spi_data_bitcount_mode flexio_spi_data_bitcount_mode_t
FlexIO SPI data length mode options.
bool enableFastAccess
Definition: fsl_flexio_spi.h:131
flexio_spi_master_handle_t flexio_spi_slave_handle_t
Slave handle is the same with master handle.
Definition: fsl_flexio_spi.h:165
uint32_t FLEXIO_SPI_GetStatusFlags(FLEXIO_SPI_Type *base)
Gets FlexIO SPI status flags.
Definition: fsl_flexio_spi.c:641
flexio_spi_clock_phase_t phase
Definition: fsl_flexio_spi.h:135
_flexio_spi_interrupt_enable
Define FlexIO SPI interrupt mask.
Definition: fsl_flexio_spi.h:79
uint8_t timerIndex[2]
Definition: fsl_flexio_spi.h:122
uint8_t * txData
Definition: fsl_flexio_spi.h:155
uint8_t SDIPinIndex
Definition: fsl_flexio_spi.h:118
void FLEXIO_SPI_MasterGetDefaultConfig(flexio_spi_master_config_t *masterConfig)
Gets the default configuration to configure the FlexIO SPI master. The configuration can be used dire...
Definition: fsl_flexio_spi.c:374
flexio_spi_shift_direction_t direction
Definition: fsl_flexio_spi.h:189
flexio_spi_data_bitcount_mode_t dataMode
Definition: fsl_flexio_spi.h:149
struct _flexio_spi_type FLEXIO_SPI_Type
Define FlexIO SPI access structure typedef.
void FLEXIO_SPI_MasterTransferHandleIRQ(void *spiType, void *spiHandle)
FlexIO SPI master IRQ handler function.
Definition: fsl_flexio_spi.c:1294
bool enableInDebug
Definition: fsl_flexio_spi.h:130
void * userData
Definition: fsl_flexio_spi.h:191
FLEXIO_Type * flexioBase
Definition: fsl_flexio_spi.h:115
void FLEXIO_SPI_FlushShifters(FLEXIO_SPI_Type *base)
Flush tx/rx shifters.
Definition: fsl_flexio_spi.c:1546
volatile size_t txRemainingBytes
Definition: fsl_flexio_spi.h:185
void FLEXIO_SPI_ClearStatusFlags(FLEXIO_SPI_Type *base, uint32_t mask)
Clears FlexIO SPI status flags.
Definition: fsl_flexio_spi.c:662
bool enableMaster
Definition: fsl_flexio_spi.h:128
uint8_t * rxData
Definition: fsl_flexio_spi.h:156
void FLEXIO_SPI_EnableDMA(FLEXIO_SPI_Type *base, uint32_t mask, bool enable)
Enables/disables the FlexIO SPI transmit DMA. This function enables/disables the FlexIO SPI Tx DMA,...
Definition: fsl_flexio_spi.c:619
enum _flexio_spi_shift_direction flexio_spi_shift_direction_t
FlexIO SPI data shifter direction options.
_flexio_spi_status_flags
Define FlexIO SPI status mask.
Definition: fsl_flexio_spi.h:86
size_t dataSize
Definition: fsl_flexio_spi.h:157
status_t FLEXIO_SPI_MasterTransferGetCount(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle, size_t *count)
Gets the data transfer status which used IRQ.
Definition: fsl_flexio_spi.c:1245
uint8_t * rxData
Definition: fsl_flexio_spi.h:183
enum _flexio_spi_clock_phase flexio_spi_clock_phase_t
FlexIO SPI clock phase configuration.
volatile uint32_t state
Definition: fsl_flexio_spi.h:187
flexio_spi_data_bitcount_mode_t dataMode
Definition: fsl_flexio_spi.h:136
_flexio_spi_dma_enable
Define FlexIO SPI DMA mask.
Definition: fsl_flexio_spi.h:93
flexio_spi_clock_phase_t phase
Definition: fsl_flexio_spi.h:148
status_t FLEXIO_SPI_SlaveTransferCreateHandle(FLEXIO_SPI_Type *base, flexio_spi_slave_handle_t *handle, flexio_spi_slave_transfer_callback_t callback, void *userData)
Initializes the FlexIO SPI Slave handle, which is used in transactional functions.
Definition: fsl_flexio_spi.c:1343
uint8_t * txData
Definition: fsl_flexio_spi.h:182
void(* flexio_spi_master_transfer_callback_t)(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle, status_t status, void *userData)
FlexIO SPI master callback for finished transmit.
Definition: fsl_flexio_spi.h:168
void FLEXIO_SPI_MasterTransferAbort(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle)
Aborts the master data transfer, which used IRQ.
Definition: fsl_flexio_spi.c:1273
_flexio_spi_clock_phase
FlexIO SPI clock phase configuration.
Definition: fsl_flexio_spi.h:55
void FLEXIO_SPI_EnableInterrupts(FLEXIO_SPI_Type *base, uint32_t mask)
Enables the FlexIO SPI interrupt.
Definition: fsl_flexio_spi.c:577
uint8_t shifterIndex[2]
Definition: fsl_flexio_spi.h:121
bool enableInDebug
Definition: fsl_flexio_spi.h:144
_flexio_spi_shift_direction
FlexIO SPI data shifter direction options.
Definition: fsl_flexio_spi.h:64
volatile size_t rxRemainingBytes
Definition: fsl_flexio_spi.h:186
status_t FLEXIO_SPI_SlaveTransferNonBlocking(FLEXIO_SPI_Type *base, flexio_spi_slave_handle_t *handle, flexio_spi_transfer_t *xfer)
Slave transfer data using IRQ.
Definition: fsl_flexio_spi.c:1381
void(* flexio_spi_slave_transfer_callback_t)(FLEXIO_SPI_Type *base, flexio_spi_slave_handle_t *handle, status_t status, void *userData)
FlexIO SPI slave callback for finished transmit.
Definition: fsl_flexio_spi.h:174
struct _flexio_spi_slave_config flexio_spi_slave_config_t
Define FlexIO SPI slave configuration structure.
void FLEXIO_SPI_SlaveGetDefaultConfig(flexio_spi_slave_config_t *slaveConfig)
Gets the default configuration to configure the FlexIO SPI slave. The configuration can be used direc...
Definition: fsl_flexio_spi.c:550
void FLEXIO_SPI_MasterSetBaudRate(FLEXIO_SPI_Type *base, uint32_t baudRate_Bps, uint32_t srcClockHz)
Sets baud rate for the FlexIO SPI transfer, which is only used for the master.
Definition: fsl_flexio_spi.c:681
bool enableInDoze
Definition: fsl_flexio_spi.h:143
struct _flexio_spi_transfer flexio_spi_transfer_t
Define FlexIO SPI transfer structure.
void FLEXIO_SPI_SlaveDeinit(FLEXIO_SPI_Type *base)
Gates the FlexIO clock.
Definition: fsl_flexio_spi.c:535
uint8_t SCKPinIndex
Definition: fsl_flexio_spi.h:119
status_t FLEXIO_SPI_MasterTransferNonBlocking(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle, flexio_spi_transfer_t *xfer)
Master transfer data using IRQ.
Definition: fsl_flexio_spi.c:1074
_flexio_spi_transfer_flags
Define FlexIO SPI transfer flags.
Definition: fsl_flexio_spi.h:102
bool enableInDoze
Definition: fsl_flexio_spi.h:129
void FLEXIO_SPI_DisableInterrupts(FLEXIO_SPI_Type *base, uint32_t mask)
Disables the FlexIO SPI interrupt.
Definition: fsl_flexio_spi.c:599
_flexio_spi_data_bitcount_mode
FlexIO SPI data length mode options.
Definition: fsl_flexio_spi.h:71
void FLEXIO_SPI_MasterInit(FLEXIO_SPI_Type *base, flexio_spi_master_config_t *masterConfig, uint32_t srcClock_Hz)
Ungates the FlexIO clock, resets the FlexIO module, configures the FlexIO SPI master hardware,...
Definition: fsl_flexio_spi.c:223
bool enableFastAccess
Definition: fsl_flexio_spi.h:145
struct _flexio_spi_master_config flexio_spi_master_config_t
Define FlexIO SPI master configuration structure.
flexio_spi_master_transfer_callback_t callback
Definition: fsl_flexio_spi.h:190
status_t FLEXIO_SPI_MasterTransferBlocking(FLEXIO_SPI_Type *base, flexio_spi_transfer_t *xfer)
Receives a buffer of bytes.
Definition: fsl_flexio_spi.c:805
void FLEXIO_SPI_SlaveInit(FLEXIO_SPI_Type *base, flexio_spi_slave_config_t *slaveConfig)
Ungates the FlexIO clock, resets the FlexIO module, configures the FlexIO SPI slave hardware configur...
Definition: fsl_flexio_spi.c:430
uint8_t bytePerFrame
Definition: fsl_flexio_spi.h:188
void FLEXIO_SPI_MasterDeinit(FLEXIO_SPI_Type *base)
Resets the FlexIO SPI timer and shifter config.
Definition: fsl_flexio_spi.c:350
bool enableSlave
Definition: fsl_flexio_spi.h:142
uint8_t CSnPinIndex
Definition: fsl_flexio_spi.h:120
status_t FLEXIO_SPI_ReadBlocking(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction, uint8_t *buffer, size_t size)
Receives a buffer of bytes.
Definition: fsl_flexio_spi.c:759
void FLEXIO_SPI_SlaveTransferHandleIRQ(void *spiType, void *spiHandle)
FlexIO SPI slave IRQ handler function.
Definition: fsl_flexio_spi.c:1502
@ kStatus_FLEXIO_SPI_Error
Definition: fsl_flexio_spi.h:48
@ kStatus_FLEXIO_SPI_Idle
Definition: fsl_flexio_spi.h:47
@ kStatus_FLEXIO_SPI_Busy
Definition: fsl_flexio_spi.h:46
@ kStatus_FLEXIO_SPI_Timeout
Definition: fsl_flexio_spi.h:49
@ kFLEXIO_SPI_RxFullInterruptEnable
Definition: fsl_flexio_spi.h:81
@ kFLEXIO_SPI_TxEmptyInterruptEnable
Definition: fsl_flexio_spi.h:80
@ kFLEXIO_SPI_TxBufferEmptyFlag
Definition: fsl_flexio_spi.h:87
@ kFLEXIO_SPI_RxBufferFullFlag
Definition: fsl_flexio_spi.h:88
@ kFLEXIO_SPI_RxDmaEnable
Definition: fsl_flexio_spi.h:95
@ kFLEXIO_SPI_TxDmaEnable
Definition: fsl_flexio_spi.h:94
@ kFLEXIO_SPI_DmaAllEnable
Definition: fsl_flexio_spi.h:96
@ kFLEXIO_SPI_ClockPhaseSecondEdge
Definition: fsl_flexio_spi.h:58
@ kFLEXIO_SPI_ClockPhaseFirstEdge
Definition: fsl_flexio_spi.h:56
@ kFLEXIO_SPI_LsbFirst
Definition: fsl_flexio_spi.h:66
@ kFLEXIO_SPI_MsbFirst
Definition: fsl_flexio_spi.h:65
@ kFLEXIO_SPI_8bitLsb
Definition: fsl_flexio_spi.h:104
@ kFLEXIO_SPI_8bitMsb
Definition: fsl_flexio_spi.h:103
@ kFLEXIO_SPI_32bitMsb
Definition: fsl_flexio_spi.h:107
@ kFLEXIO_SPI_csContinuous
Definition: fsl_flexio_spi.h:109
@ kFLEXIO_SPI_16bitMsb
Definition: fsl_flexio_spi.h:105
@ kFLEXIO_SPI_32bitLsb
Definition: fsl_flexio_spi.h:108
@ kFLEXIO_SPI_16bitLsb
Definition: fsl_flexio_spi.h:106
@ kFLEXIO_SPI_16BitMode
Definition: fsl_flexio_spi.h:73
@ kFLEXIO_SPI_32BitMode
Definition: fsl_flexio_spi.h:74
@ kFLEXIO_SPI_8BitMode
Definition: fsl_flexio_spi.h:72
int32_t status_t
Type used for all status and error return values.
Definition: fsl_common.h:225
#define MAKE_STATUS(group, code)
Construct a status code value from a group and code number.
Definition: fsl_common.h:47
@ kStatusGroup_FLEXIO_SPI
Definition: fsl_common.h:88
Definition: MIMXRT1052.h:20511
Define FlexIO SPI master configuration structure.
Definition: fsl_flexio_spi.h:127
Define FlexIO SPI handle structure.
Definition: fsl_flexio_spi.h:181
Define FlexIO SPI slave configuration structure.
Definition: fsl_flexio_spi.h:141
Define FlexIO SPI transfer structure.
Definition: fsl_flexio_spi.h:154
Define FlexIO SPI access structure typedef.
Definition: fsl_flexio_spi.h:114
unsigned size
Definition: tte.h:1