RTEMS 6.1-rc1
fsl_cdog.h
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1/*
2 * Copyright 2020 NXP
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7#ifndef _FSL_CDOG_H_
8#define _FSL_CDOG_H_
9
10#include "fsl_common.h"
11
19/*******************************************************************************
20 * Definitions
21 *******************************************************************************/
22
39#define FSL_CDOG_DRIVER_VERSION (MAKE_VERSION(2, 1, 1))
42typedef struct
43{
44 uint8_t lock : 2;
45 uint8_t timeout : 3;
46 uint8_t miscompare : 3;
47 uint8_t sequence : 3;
48 uint8_t state : 3;
49 uint8_t address : 3;
50 uint8_t reserved : 8;
51 uint8_t irq_pause : 2;
52 uint8_t debug_halt : 2;
54
55enum __cdog_debug_Action_ctrl_enum
56{
57 kCDOG_DebugHaltCtrl_Run = 0x1,
58 kCDOG_DebugHaltCtrl_Pause = 0x2,
59};
60
61enum __cdog_irq_pause_ctrl_enum
62{
63 kCDOG_IrqPauseCtrl_Run = 0x1,
64 kCDOG_IrqPauseCtrl_Pause = 0x2,
65};
66
67enum __cdog_fault_ctrl_enum
68{
69 kCDOG_FaultCtrl_EnableReset = 0x1U,
70 kCDOG_FaultCtrl_EnableInterrupt = 0x2U,
71 kCDOG_FaultCtrl_NoAction = 0x4U,
72};
73
74enum __code_lock_ctrl_enum
75{
76 kCDOG_LockCtrl_Lock = 0x1,
77 kCDOG_LockCtrl_Unlock = 0x2,
78};
79
80typedef uint32_t secure_counter_t;
81
82#define SC_ADD(add) \
83 do \
84 { \
85 CDOG->ADD = (secure_counter_t)(add); \
86 } while (0)
87
88#define SC_ADD1 \
89 do \
90 { \
91 CDOG->ADD1 = (secure_counter_t)0x1U; \
92 } while (0)
93
94#define SC_ADD16 \
95 do \
96 { \
97 CDOG->ADD16 = (secure_counter_t)0x1U; \
98 } while (0)
99
100#define SC_ADD256 \
101 do \
102 { \
103 CDOG->ADD256 = (secure_counter_t)0x1U; \
104 } while (0)
105
106#define SC_SUB(sub) \
107 do \
108 { \
109 CDOG->SUB = (secure_counter_t)(sub); \
110 } while (0)
111
112#define SC_SUB1 \
113 do \
114 { \
115 CDOG->SUB1 = (secure_counter_t)0x1U; \
116 } while (0)
117
118#define SC_SUB16 \
119 do \
120 { \
121 CDOG->SUB16 = (secure_counter_t)0x1U; \
122 } while (0)
123
124#define SC_SUB256 \
125 do \
126 { \
127 CDOG->SUB256 = (secure_counter_t)0x1U; \
128 } while (0)
129
130#define SC_CHECK(val) \
131 do \
132 { \
133 CDOG->RESTART = (secure_counter_t)val; \
134 } while (0)
135
136/*******************************************************************************
137 * API
138 *******************************************************************************/
139
140extern void CDOG_DriverIRQHandler(void);
141
142#if defined(__cplusplus)
143extern "C" {
144#endif /* __cplusplus */
145
161
169void CDOG_Deinit(CDOG_Type *base);
170
179
189void CDOG_Stop(CDOG_Type *base, uint32_t stop);
190
201void CDOG_Start(CDOG_Type *base, uint32_t reload, uint32_t start);
202
212void CDOG_Check(CDOG_Type *base, uint32_t check);
213
225void CDOG_Set(CDOG_Type *base, uint32_t stop, uint32_t reload, uint32_t start);
226
235void CDOG_Add(CDOG_Type *base, uint32_t add);
236
244void CDOG_Add1(CDOG_Type *base);
245
253void CDOG_Add16(CDOG_Type *base);
254
262void CDOG_Add256(CDOG_Type *base);
263
272void CDOG_Sub(CDOG_Type *base, uint32_t sub);
273
281void CDOG_Sub1(CDOG_Type *base);
282
290void CDOG_Sub16(CDOG_Type *base);
291
299void CDOG_Sub256(CDOG_Type *base);
300
307void CDOG_WritePersistent(CDOG_Type *base, uint32_t value);
308
315uint32_t CDOG_ReadPersistent(CDOG_Type *base);
316
319#if defined(__cplusplus)
320}
321#endif /* __cplusplus */
322 /* end of group cdog */
324
325#endif /* _FSL_CDOG_H_ */
void CDOG_Set(CDOG_Type *base, uint32_t stop, uint32_t reload, uint32_t start)
Sets secure counter and instruction timer values.
Definition: fsl_cdog.c:88
void CDOG_Add1(CDOG_Type *base)
Add 1 to secure counter.
Definition: fsl_cdog.c:116
void CDOG_Sub1(CDOG_Type *base)
Substract 1 from secure counter.
Definition: fsl_cdog.c:167
void CDOG_Deinit(CDOG_Type *base)
Deinitialize CDOG.
Definition: fsl_cdog.c:301
void CDOG_Check(CDOG_Type *base, uint32_t check)
Checks secure counter.
Definition: fsl_cdog.c:205
void CDOG_GetDefaultConfig(cdog_config_t *conf)
Sets the default configuration of CDOG.
Definition: fsl_cdog.c:34
void CDOG_Add16(CDOG_Type *base)
Add 16 to secure counter.
Definition: fsl_cdog.c:129
void CDOG_Start(CDOG_Type *base, uint32_t reload, uint32_t start)
Sets secure counter and instruction timer values.
Definition: fsl_cdog.c:57
void CDOG_Stop(CDOG_Type *base, uint32_t stop)
Stops secure counter and instruction timer.
Definition: fsl_cdog.c:72
void CDOG_WritePersistent(CDOG_Type *base, uint32_t value)
Set the CDOG persistent word.
Definition: fsl_cdog.c:216
void CDOG_Sub256(CDOG_Type *base)
Substract 256 from secure counter.
Definition: fsl_cdog.c:191
void CDOG_Add256(CDOG_Type *base)
Add 256 to secure counter.
Definition: fsl_cdog.c:142
uint32_t CDOG_ReadPersistent(CDOG_Type *base)
Get the CDOG persistent word.
Definition: fsl_cdog.c:227
status_t CDOG_Init(CDOG_Type *base, cdog_config_t *conf)
Initialize CDOG.
Definition: fsl_cdog.c:241
void CDOG_Sub16(CDOG_Type *base)
Substract 16 from secure counter.
Definition: fsl_cdog.c:179
void CDOG_Sub(CDOG_Type *base, uint32_t sub)
Definition: fsl_cdog.c:155
void CDOG_Add(CDOG_Type *base, uint32_t add)
Add value to secure counter.
Definition: fsl_cdog.c:103
int32_t status_t
Type used for all status and error return values.
Definition: fsl_common.h:225
Definition: MIMXRT1166_cm4.h:24992
Definition: fsl_cdog.h:43