36#ifndef LIBBSP_ARM_SHARED_ARM_GIC_IRQ_H
37#define LIBBSP_ARM_SHARED_ARM_GIC_IRQ_H
47#define ARM_GIC_IRQ_SGI_0 0
48#define ARM_GIC_IRQ_SGI_1 1
49#define ARM_GIC_IRQ_SGI_2 2
50#define ARM_GIC_IRQ_SGI_3 3
51#define ARM_GIC_IRQ_SGI_5 5
52#define ARM_GIC_IRQ_SGI_6 6
53#define ARM_GIC_IRQ_SGI_7 7
54#define ARM_GIC_IRQ_SGI_8 8
55#define ARM_GIC_IRQ_SGI_9 9
56#define ARM_GIC_IRQ_SGI_10 10
57#define ARM_GIC_IRQ_SGI_11 11
58#define ARM_GIC_IRQ_SGI_12 12
59#define ARM_GIC_IRQ_SGI_13 13
60#define ARM_GIC_IRQ_SGI_14 14
61#define ARM_GIC_IRQ_SGI_15 15
62#define ARM_GIC_IRQ_SGI_LAST 15
64#define ARM_GIC_IRQ_PPI_LAST 31
66#define ARM_GIC_DIST ((volatile gic_dist *) BSP_ARM_GIC_DIST_BASE)
90 const Processor_mask *affinity
95 Processor_mask *affinity
107 if (vector <= ARM_GIC_IRQ_SGI_15) {
108 arm_gic_trigger_sgi(vector, targets);
116uint32_t arm_gic_irq_processor_count(
void);
118void arm_gic_irq_initialize_secondary_cpu(
void);
ISR_Vector_number rtems_vector_number
This integer type represents interrupt vector numbers.
Definition: intr.h:102
rtems_status_code
This enumeration provides status codes for directives of the Classic API.
Definition: status.h:85
@ RTEMS_SUCCESSFUL
This status code indicates successful completion of a requested operation.
Definition: status.h:90
@ RTEMS_INVALID_ID
This status code indicates that an object identifier was invalid.
Definition: status.h:110
This header file provides the interfaces of the Processor Mask.