ALT_CLK_GROUP_RAW_CFG_s::ALT_CLK_GROUP_RAW_CFG_u Union Reference

#include <alt_clock_group.h>

Data Structures
union	[union].mainpllgrp
union	[union].perpllgrp
union	[union].sdrpllgrp

Data Fields
union	mainpllgrp
union	perpllgrp
union	sdrpllgrp

Detailed Description

This union holds the register values for configuration of the set of possible clock groups on the SoC FPGA. The clkgrpsel discriminator identifies the valid clock group union data member.

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The documentation for this union was generated from the following file:

• bsps/arm/altera-cyclone-v/include/bsp/alt_clock_group.h