RTEMS 6.3
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Data Fields

__IO uint32_t SRAM0
__IO uint32_t SRAM1
__IO uint32_t SRAM2
uint8_t RESERVED_0 [4]
__IO uint32_t SRAM0
__IO uint32_t SRAM1
__IO uint32_t SRAM2
uint8_t RESERVED_0 [4]

Field Documentation

◆ SRAM0 [1/2]

__IO uint32_t SSARC_HP_Type::[struct].DESC SRAM0

Description Address Register, array offset: 0x0, array step: 0x10

◆ SRAM0 [2/2]

__IO uint32_t SSARC_HP_Type::[struct].DESC SRAM0

Description Address Register, array offset: 0x0, array step: 0x10

◆ SRAM1 [1/2]

__IO uint32_t SSARC_HP_Type::[struct].DESC SRAM1

Description Data Register, array offset: 0x4, array step: 0x10

◆ SRAM1 [2/2]

__IO uint32_t SSARC_HP_Type::[struct].DESC SRAM1

Description Data Register, array offset: 0x4, array step: 0x10

◆ SRAM2 [1/2]

__IO uint32_t SSARC_HP_Type::[struct].DESC SRAM2

Description Control Register, array offset: 0x8, array step: 0x10

◆ SRAM2 [2/2]

__IO uint32_t SSARC_HP_Type::[struct].DESC SRAM2

Description Control Register, array offset: 0x8, array step: 0x10


The documentation for this struct was generated from the following files: