CCM_Type::[struct].CLOCK_ROOT Struct Reference

Data Fields
__IO uint32_t	CONTROL
__IO uint32_t	CONTROL_SET
__IO uint32_t	CONTROL_CLR
__IO uint32_t	CONTROL_TOG
uint8_t	RESERVED_0 [16]
__I uint32_t	STATUS0
__I uint32_t	STATUS1
uint8_t	RESERVED_1 [4]
__I uint32_t	CONFIG
__IO uint32_t	AUTHEN
__IO uint32_t	AUTHEN_SET
__IO uint32_t	AUTHEN_CLR
__IO uint32_t	AUTHEN_TOG
__IO uint32_t	SETPOINT [16]
__IO uint32_t	CONTROL
__IO uint32_t	CONTROL_SET
__IO uint32_t	CONTROL_CLR
__IO uint32_t	CONTROL_TOG
uint8_t	RESERVED_0 [16]
__I uint32_t	STATUS0
__I uint32_t	STATUS1
uint8_t	RESERVED_1 [4]
__I uint32_t	CONFIG
__IO uint32_t	AUTHEN
__IO uint32_t	AUTHEN_SET
__IO uint32_t	AUTHEN_CLR
__IO uint32_t	AUTHEN_TOG
__IO uint32_t	SETPOINT [16]

Field Documentation

AUTHEN [1/2]

__IO uint32_t CCM_Type::[struct].CLOCK_ROOT AUTHEN

Clock root access control, array offset: 0x30, array step: 0x80

AUTHEN [2/2]

__IO uint32_t CCM_Type::[struct].CLOCK_ROOT AUTHEN

Clock root access control, array offset: 0x30, array step: 0x80

AUTHEN_CLR [1/2]

__IO uint32_t CCM_Type::[struct].CLOCK_ROOT AUTHEN_CLR

Clock root access control, array offset: 0x38, array step: 0x80

AUTHEN_CLR [2/2]

__IO uint32_t CCM_Type::[struct].CLOCK_ROOT AUTHEN_CLR

Clock root access control, array offset: 0x38, array step: 0x80

AUTHEN_SET [1/2]

__IO uint32_t CCM_Type::[struct].CLOCK_ROOT AUTHEN_SET

Clock root access control, array offset: 0x34, array step: 0x80

AUTHEN_SET [2/2]

__IO uint32_t CCM_Type::[struct].CLOCK_ROOT AUTHEN_SET

Clock root access control, array offset: 0x34, array step: 0x80

AUTHEN_TOG [1/2]

__IO uint32_t CCM_Type::[struct].CLOCK_ROOT AUTHEN_TOG

Clock root access control, array offset: 0x3C, array step: 0x80

AUTHEN_TOG [2/2]

__IO uint32_t CCM_Type::[struct].CLOCK_ROOT AUTHEN_TOG

Clock root access control, array offset: 0x3C, array step: 0x80

CONFIG [1/2]

__I uint32_t CCM_Type::[struct].CLOCK_ROOT CONFIG

Clock root configuration, array offset: 0x2C, array step: 0x80

CONFIG [2/2]

__I uint32_t CCM_Type::[struct].CLOCK_ROOT CONFIG

Clock root configuration, array offset: 0x2C, array step: 0x80

CONTROL [1/2]

__IO uint32_t CCM_Type::[struct].CLOCK_ROOT CONTROL

Clock root control, array offset: 0x0, array step: 0x80

CONTROL [2/2]

__IO uint32_t CCM_Type::[struct].CLOCK_ROOT CONTROL

Clock root control, array offset: 0x0, array step: 0x80

CONTROL_CLR [1/2]

__IO uint32_t CCM_Type::[struct].CLOCK_ROOT CONTROL_CLR

Clock root control, array offset: 0x8, array step: 0x80

CONTROL_CLR [2/2]

__IO uint32_t CCM_Type::[struct].CLOCK_ROOT CONTROL_CLR

Clock root control, array offset: 0x8, array step: 0x80

CONTROL_SET [1/2]

__IO uint32_t CCM_Type::[struct].CLOCK_ROOT CONTROL_SET

Clock root control, array offset: 0x4, array step: 0x80

CONTROL_SET [2/2]

__IO uint32_t CCM_Type::[struct].CLOCK_ROOT CONTROL_SET

Clock root control, array offset: 0x4, array step: 0x80

CONTROL_TOG [1/2]

__IO uint32_t CCM_Type::[struct].CLOCK_ROOT CONTROL_TOG

Clock root control, array offset: 0xC, array step: 0x80

CONTROL_TOG [2/2]

__IO uint32_t CCM_Type::[struct].CLOCK_ROOT CONTROL_TOG

Clock root control, array offset: 0xC, array step: 0x80

SETPOINT [1/2]

__IO uint32_t CCM_Type::[struct].CLOCK_ROOT[16]

Setpoint setting, array offset: 0x40, array step: index*0x80, index2*0x4

SETPOINT [2/2]

__IO uint32_t CCM_Type::[struct].CLOCK_ROOT[16]

Setpoint setting, array offset: 0x40, array step: index*0x80, index2*0x4

STATUS0 [1/2]

__I uint32_t CCM_Type::[struct].CLOCK_ROOT STATUS0

Clock root working status, array offset: 0x20, array step: 0x80

STATUS0 [2/2]

__I uint32_t CCM_Type::[struct].CLOCK_ROOT STATUS0

Clock root working status, array offset: 0x20, array step: 0x80

STATUS1 [1/2]

__I uint32_t CCM_Type::[struct].CLOCK_ROOT STATUS1

Clock root low power status, array offset: 0x24, array step: 0x80

STATUS1 [2/2]

__I uint32_t CCM_Type::[struct].CLOCK_ROOT STATUS1

Clock root low power status, array offset: 0x24, array step: 0x80

---

The documentation for this struct was generated from the following files: