RTEMS 6.3
Loading...
Searching...
No Matches

Data Fields

__IO uint32_t CONTROL
__IO uint32_t CONTROL_SET
__IO uint32_t CONTROL_CLR
__IO uint32_t CONTROL_TOG
uint8_t RESERVED_0 [16]
__IO uint32_t STATUS0
__I uint32_t STATUS1
uint8_t RESERVED_1 [4]
__I uint32_t CONFIG
__IO uint32_t AUTHEN
__IO uint32_t AUTHEN_SET
__IO uint32_t AUTHEN_CLR
__IO uint32_t AUTHEN_TOG
__IO uint32_t SETPOINT [16]
__IO uint32_t CONTROL
__IO uint32_t CONTROL_SET
__IO uint32_t CONTROL_CLR
__IO uint32_t CONTROL_TOG
uint8_t RESERVED_0 [16]
__IO uint32_t STATUS0
__I uint32_t STATUS1
uint8_t RESERVED_1 [4]
__I uint32_t CONFIG
__IO uint32_t AUTHEN
__IO uint32_t AUTHEN_SET
__IO uint32_t AUTHEN_CLR
__IO uint32_t AUTHEN_TOG
__IO uint32_t SETPOINT [16]

Field Documentation

◆ AUTHEN [1/2]

__IO uint32_t CCM_Type::[struct].CLOCK_GROUP AUTHEN

Clock group access control, array offset: 0x4030, array step: 0x80

◆ AUTHEN [2/2]

__IO uint32_t CCM_Type::[struct].CLOCK_GROUP AUTHEN

Clock group access control, array offset: 0x4030, array step: 0x80

◆ AUTHEN_CLR [1/2]

__IO uint32_t CCM_Type::[struct].CLOCK_GROUP AUTHEN_CLR

Clock group access control, array offset: 0x4038, array step: 0x80

◆ AUTHEN_CLR [2/2]

__IO uint32_t CCM_Type::[struct].CLOCK_GROUP AUTHEN_CLR

Clock group access control, array offset: 0x4038, array step: 0x80

◆ AUTHEN_SET [1/2]

__IO uint32_t CCM_Type::[struct].CLOCK_GROUP AUTHEN_SET

Clock group access control, array offset: 0x4034, array step: 0x80

◆ AUTHEN_SET [2/2]

__IO uint32_t CCM_Type::[struct].CLOCK_GROUP AUTHEN_SET

Clock group access control, array offset: 0x4034, array step: 0x80

◆ AUTHEN_TOG [1/2]

__IO uint32_t CCM_Type::[struct].CLOCK_GROUP AUTHEN_TOG

Clock group access control, array offset: 0x403C, array step: 0x80

◆ AUTHEN_TOG [2/2]

__IO uint32_t CCM_Type::[struct].CLOCK_GROUP AUTHEN_TOG

Clock group access control, array offset: 0x403C, array step: 0x80

◆ CONFIG [1/2]

__I uint32_t CCM_Type::[struct].CLOCK_GROUP CONFIG

Clock group configuration, array offset: 0x402C, array step: 0x80

◆ CONFIG [2/2]

__I uint32_t CCM_Type::[struct].CLOCK_GROUP CONFIG

Clock group configuration, array offset: 0x402C, array step: 0x80

◆ CONTROL [1/2]

__IO uint32_t CCM_Type::[struct].CLOCK_GROUP CONTROL

Clock group control, array offset: 0x4000, array step: 0x80

◆ CONTROL [2/2]

__IO uint32_t CCM_Type::[struct].CLOCK_GROUP CONTROL

Clock group control, array offset: 0x4000, array step: 0x80

◆ CONTROL_CLR [1/2]

__IO uint32_t CCM_Type::[struct].CLOCK_GROUP CONTROL_CLR

Clock group control, array offset: 0x4008, array step: 0x80

◆ CONTROL_CLR [2/2]

__IO uint32_t CCM_Type::[struct].CLOCK_GROUP CONTROL_CLR

Clock group control, array offset: 0x4008, array step: 0x80

◆ CONTROL_SET [1/2]

__IO uint32_t CCM_Type::[struct].CLOCK_GROUP CONTROL_SET

Clock group control, array offset: 0x4004, array step: 0x80

◆ CONTROL_SET [2/2]

__IO uint32_t CCM_Type::[struct].CLOCK_GROUP CONTROL_SET

Clock group control, array offset: 0x4004, array step: 0x80

◆ CONTROL_TOG [1/2]

__IO uint32_t CCM_Type::[struct].CLOCK_GROUP CONTROL_TOG

Clock group control, array offset: 0x400C, array step: 0x80

◆ CONTROL_TOG [2/2]

__IO uint32_t CCM_Type::[struct].CLOCK_GROUP CONTROL_TOG

Clock group control, array offset: 0x400C, array step: 0x80

◆ SETPOINT [1/2]

__IO uint32_t CCM_Type::[struct].CLOCK_GROUP[16]

Setpoint setting, array offset: 0x4040, array step: index*0x80, index2*0x4

◆ SETPOINT [2/2]

__IO uint32_t CCM_Type::[struct].CLOCK_GROUP[16]

Setpoint setting, array offset: 0x4040, array step: index*0x80, index2*0x4

◆ STATUS0 [1/2]

__IO uint32_t CCM_Type::[struct].CLOCK_GROUP STATUS0

Clock group working status, array offset: 0x4020, array step: 0x80

◆ STATUS0 [2/2]

__IO uint32_t CCM_Type::[struct].CLOCK_GROUP STATUS0

Clock group working status, array offset: 0x4020, array step: 0x80

◆ STATUS1 [1/2]

__I uint32_t CCM_Type::[struct].CLOCK_GROUP STATUS1

Clock group low power/extend status, array offset: 0x4024, array step: 0x80

◆ STATUS1 [2/2]

__I uint32_t CCM_Type::[struct].CLOCK_GROUP STATUS1

Clock group low power/extend status, array offset: 0x4024, array step: 0x80


The documentation for this struct was generated from the following files: