CAAM_Type::[struct].HTA Struct Reference

Data Fields
__I uint64_t	HT_JD_ADDR
__I uint64_t	HT_SD_ADDR
__I uint32_t	HT_JQ_CTRL_MS
__I uint32_t	HT_JQ_CTRL_LS
uint8_t	RESERVED_0 [4]
__I uint32_t	HT_STATUS
__I uint64_t	HT_JD_ADDR
__I uint64_t	HT_SD_ADDR
__I uint32_t	HT_JQ_CTRL_MS
__I uint32_t	HT_JQ_CTRL_LS
uint8_t	RESERVED_0 [4]
__I uint32_t	HT_STATUS

Field Documentation

HT_JD_ADDR [1/2]

__I uint64_t CAAM_Type::[struct].HTA HT_JD_ADDR

Holding Tank 0 Job Descriptor Address, array offset: 0xC00, array step: 0x20

HT_JD_ADDR [2/2]

__I uint64_t CAAM_Type::[struct].HTA HT_JD_ADDR

Holding Tank 0 Job Descriptor Address, array offset: 0xC00, array step: 0x20

HT_JQ_CTRL_LS [1/2]

__I uint32_t CAAM_Type::[struct].HTA HT_JQ_CTRL_LS

Holding Tank 0 Job Queue Control, least-significant half, array offset: 0xC14, array step: 0x20

HT_JQ_CTRL_LS [2/2]

__I uint32_t CAAM_Type::[struct].HTA HT_JQ_CTRL_LS

Holding Tank 0 Job Queue Control, least-significant half, array offset: 0xC14, array step: 0x20

HT_JQ_CTRL_MS [1/2]

__I uint32_t CAAM_Type::[struct].HTA HT_JQ_CTRL_MS

Holding Tank 0 Job Queue Control, most-significant half, array offset: 0xC10, array step: 0x20

HT_JQ_CTRL_MS [2/2]

__I uint32_t CAAM_Type::[struct].HTA HT_JQ_CTRL_MS

Holding Tank 0 Job Queue Control, most-significant half, array offset: 0xC10, array step: 0x20

HT_SD_ADDR [1/2]

__I uint64_t CAAM_Type::[struct].HTA HT_SD_ADDR

Holding Tank 0 Shared Descriptor Address, array offset: 0xC08, array step: 0x20

HT_SD_ADDR [2/2]

__I uint64_t CAAM_Type::[struct].HTA HT_SD_ADDR

Holding Tank 0 Shared Descriptor Address, array offset: 0xC08, array step: 0x20

HT_STATUS [1/2]

__I uint32_t CAAM_Type::[struct].HTA HT_STATUS

Holding Tank Status, array offset: 0xC1C, array step: 0x20

HT_STATUS [2/2]

__I uint32_t CAAM_Type::[struct].HTA HT_STATUS

Holding Tank Status, array offset: 0xC1C, array step: 0x20

---

The documentation for this struct was generated from the following files: