RTEMS 6.3
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Data Structures | Data Fields
CAAM_Type Struct Reference
Mapping Information » Iomuxc_pads » Device Peripheral Access Layer » CAAM Peripheral Access Layer

#include <MIMXRT1166_cm4.h>

Data Structures

struct  [struct].JRADID
struct  [struct].RTICADID
struct  [struct].DECONDID
struct  [struct].JRNSMVBAR
struct  [struct].AID_CNTS
union  [union].__unnamed0__
union  [union].__unnamed1__
union  [union].__unnamed2__
struct  [struct].PX_PG0
struct  [struct].HTA
struct  [struct].JOBRING
struct  [struct].RM
struct  [struct].DC
union  [union].__unnamed3__
union  [union].__unnamed4__
union  [union].__unnamed5__

Data Fields

uint8_t RESERVED_0 [4]
__IO uint32_t MCFGR
__IO uint32_t PAGE0_SDID
__IO uint32_t SCFGR
struct  JRADID [4]
uint8_t RESERVED_1 [40]
__IO uint32_t DEBUGCTL
__IO uint32_t JRSTARTR
__IO uint32_t RTIC_OWN
struct  RTICADID [4]
uint8_t RESERVED_2 [16]
__IO uint32_t DECORSR
uint8_t RESERVED_3 [4]
__IO uint32_t DECORR
struct  DECONDID [1]
uint8_t RESERVED_4 [120]
__IO uint32_t DAR
__O uint32_t DRR
uint8_t RESERVED_5 [92]
struct  JRNSMVBAR [4]
uint8_t RESERVED_6 [124]
__IO uint32_t PBSL
uint8_t RESERVED_7 [28]
struct  AID_CNTS [1]
__I uint32_t DMA0_AID_ENB
uint8_t RESERVED_8 [12]
__IO uint64_t DMA0_ARD_TC
uint8_t RESERVED_9 [4]
__IO uint32_t DMA0_ARD_LAT
__IO uint64_t DMA0_AWR_TC
uint8_t RESERVED_10 [4]
__IO uint32_t DMA0_AWR_LAT
uint8_t RESERVED_11 [128]
__IO uint8_t MPPKR [64]
uint8_t RESERVED_12 [64]
__IO uint8_t MPMR [32]
uint8_t RESERVED_13 [32]
__I uint8_t MPTESTR [32]
uint8_t RESERVED_14 [24]
__I uint32_t MPECC
uint8_t RESERVED_15 [4]
__IO uint32_t JDKEKR [8]
__IO uint32_t TDKEKR [8]
__IO uint32_t TDSKR [8]
uint8_t RESERVED_16 [128]
__IO uint64_t SKNR
uint8_t RESERVED_17 [36]
__I uint32_t DMA_STA
__I uint32_t DMA_X_AID_7_4_MAP
__I uint32_t DMA_X_AID_3_0_MAP
__I uint32_t DMA_X_AID_15_12_MAP
__I uint32_t DMA_X_AID_11_8_MAP
uint8_t RESERVED_18 [4]
__I uint32_t DMA_X_AID_15_0_EN
uint8_t RESERVED_19 [8]
__IO uint32_t DMA_X_ARTC_CTL
__IO uint32_t DMA_X_ARTC_LC
__IO uint32_t DMA_X_ARTC_SC
__IO uint32_t DMA_X_ARTC_LAT
__IO uint32_t DMA_X_AWTC_CTL
__IO uint32_t DMA_X_AWTC_LC
__IO uint32_t DMA_X_AWTC_SC
__IO uint32_t DMA_X_AWTC_LAT
uint8_t RESERVED_20 [176]
__IO uint32_t RTMCTL
__IO uint32_t RTSCMISC
__IO uint32_t RTPKRRNG
union  
__IO uint32_t RTSDCTL
union  
__IO uint32_t RTFRQMIN
union  
__I uint32_t RTSTATUS
__I uint32_t RTENT [16]
__I uint32_t RTPKRCNT10
__I uint32_t RTPKRCNT32
__I uint32_t RTPKRCNT54
__I uint32_t RTPKRCNT76
__I uint32_t RTPKRCNT98
__I uint32_t RTPKRCNTBA
__I uint32_t RTPKRCNTDC
__I uint32_t RTPKRCNTFE
uint8_t RESERVED_21 [32]
__I uint32_t RDSTA
uint8_t RESERVED_22 [12]
__I uint32_t RDINT0
__I uint32_t RDINT1
uint8_t RESERVED_23 [8]
__IO uint32_t RDHCNTL
__I uint32_t RDHDIG
__O uint32_t RDHBUF
uint8_t RESERVED_24 [788]
struct  PX_PG0 [16]
__IO uint32_t REIS
__IO uint32_t REIE
__I uint32_t REIF
__IO uint32_t REIH
uint8_t RESERVED_25 [192]
__IO uint32_t SMWPJRR [4]
uint8_t RESERVED_26 [4]
__O uint32_t SMCR_PG0
uint8_t RESERVED_27 [4]
__I uint32_t SMCSR_PG0
uint8_t RESERVED_28 [8]
__I uint32_t CAAMVID_MS_TRAD
__I uint32_t CAAMVID_LS_TRAD
struct  HTA [1]
uint8_t RESERVED_29 [4]
__IO uint32_t JQ_DEBUG_SEL
uint8_t RESERVED_30 [404]
__I uint32_t JRJIDU_LS
__I uint32_t JRJDJIFBC
__I uint32_t JRJDJIF
uint8_t RESERVED_31 [28]
__I uint32_t JRJDS1
uint8_t RESERVED_32 [24]
__I uint64_t JRJDDA [1]
uint8_t RESERVED_33 [408]
__I uint32_t CRNR_MS
__I uint32_t CRNR_LS
__I uint32_t CTPR_MS
__I uint32_t CTPR_LS
uint8_t RESERVED_34 [4]
__I uint32_t SMSTA
uint8_t RESERVED_35 [4]
__I uint32_t SMPO
__I uint64_t FAR
__I uint32_t FADID
__I uint32_t FADR
uint8_t RESERVED_36 [4]
__I uint32_t CSTA
__I uint32_t SMVID_MS
__I uint32_t SMVID_LS
__I uint32_t RVID
__I uint32_t CCBVID
__I uint32_t CHAVID_MS
__I uint32_t CHAVID_LS
__I uint32_t CHANUM_MS
__I uint32_t CHANUM_LS
__I uint32_t CAAMVID_MS
__I uint32_t CAAMVID_LS
uint8_t RESERVED_37 [61440]
struct  JOBRING [4]
uint8_t RESERVED_38 [65540]
__I uint32_t RSTA
uint8_t RESERVED_39 [4]
__IO uint32_t RCMD
uint8_t RESERVED_40 [4]
__IO uint32_t RCTL
uint8_t RESERVED_41 [4]
__IO uint32_t RTHR
uint8_t RESERVED_42 [8]
__IO uint64_t RWDOG
uint8_t RESERVED_43 [4]
__IO uint32_t REND
uint8_t RESERVED_44 [200]
struct  RM [4][2]
uint8_t RESERVED_45 [128]
__IO uint32_t RMD [4][2][32]
uint8_t RESERVED_46 [2048]
__I uint32_t REIR0RTIC
uint8_t RESERVED_47 [4]
__I uint64_t REIR2RTIC
__I uint32_t REIR4RTIC
__I uint32_t REIR5RTIC
uint8_t RESERVED_48 [392]
__I uint32_t CRNR_MS_RTIC
__I uint32_t CRNR_LS_RTIC
__I uint32_t CTPR_MS_RTIC
__I uint32_t CTPR_LS_RTIC
uint8_t RESERVED_49 [4]
__I uint32_t SMSTA_RTIC
uint8_t RESERVED_50 [8]
__I uint64_t FAR_RTIC
__I uint32_t FADID_RTIC
__I uint32_t FADR_RTIC
uint8_t RESERVED_51 [4]
__I uint32_t CSTA_RTIC
__I uint32_t SMVID_MS_RTIC
__I uint32_t SMVID_LS_RTIC
__I uint32_t RVID_RTIC
__I uint32_t CCBVID_RTIC
__I uint32_t CHAVID_MS_RTIC
__I uint32_t CHAVID_LS_RTIC
__I uint32_t CHANUM_MS_RTIC
__I uint32_t CHANUM_LS_RTIC
__I uint32_t CAAMVID_MS_RTIC
__I uint32_t CAAMVID_LS_RTIC
uint8_t RESERVED_52 [126976]
struct  DC [1]
uint8_t RESERVED_53 [356]
__I uint32_t CRNR_MS_DC01
__I uint32_t CRNR_LS_DC01
__I uint32_t CTPR_MS_DC01
__I uint32_t CTPR_LS_DC01
uint8_t RESERVED_54 [4]
__I uint32_t SMSTA_DC01
uint8_t RESERVED_55 [8]
__I uint64_t FAR_DC01
__I uint32_t FADID_DC01
__I uint32_t FADR_DC01
uint8_t RESERVED_56 [4]
__I uint32_t CSTA_DC01
__I uint32_t SMVID_MS_DC01
__I uint32_t SMVID_LS_DC01
__I uint32_t RVID_DC01
__I uint32_t CCBVID_DC01
__I uint32_t CHAVID_MS_DC01
__I uint32_t CHAVID_LS_DC01
__I uint32_t CHANUM_MS_DC01
__I uint32_t CHANUM_LS_DC01
__I uint32_t CAAMVID_MS_DC01
__I uint32_t CAAMVID_LS_DC01
struct  JRADID [4]
struct  RTICADID [4]
struct  DECONDID [1]
struct  JRNSMVBAR [4]
struct  AID_CNTS [1]
union  
union  
union  
struct  PX_PG0 [16]
struct  HTA [1]
struct  JOBRING [4]
struct  RM [4][2]
struct  DC [1]

Detailed Description

CAAM - Register Layout Typedef

The documentation for this struct was generated from the following files:
Generated by doxygen 1.18.0