ALT_CLK_GROUP_RAW_CFG_s Struct Reference

#include <alt_clock_group.h>

Data Structures
union	ALT_CLK_GROUP_RAW_CFG_u

Data Fields
uint32_t	verid
uint32_t	siliid2
ALT_CLK_GRP_t	clkgrpsel
union ALT_CLK_GROUP_RAW_CFG_s::ALT_CLK_GROUP_RAW_CFG_u	clkgrp

Detailed Description

This type definition defines an opaque data structure for holding the configuration settings for a complete clock group.

Field Documentation

clkgrpsel

ALT_CLK_GRP_t ALT_CLK_GROUP_RAW_CFG_s::clkgrpsel

Clock group union discriminator.

siliid2

uint32_t ALT_CLK_GROUP_RAW_CFG_s::siliid2

Reserved register - reserved for future device IDs or capability flags.

verid

uint32_t ALT_CLK_GROUP_RAW_CFG_s::verid

SoC FPGA version identifier. This field encapsulates the silicon identifier and version information associated with this clock group configuration. It is used to assert that this clock group configuration is valid for this device.

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The documentation for this struct was generated from the following file:

• bsps/arm/altera-cyclone-v/include/bsp/alt_clock_group.h