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bsps
arm
stm32h7
include
stm32h7xx_hal_cortex.h
Go to the documentation of this file.
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef STM32H7xx_HAL_CORTEX_H
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#define STM32H7xx_HAL_CORTEX_H
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "
stm32h7xx_hal_def.h
"
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/* Exported types ------------------------------------------------------------*/
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#if (__MPU_PRESENT == 1)
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typedef
struct
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{
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uint8_t Enable;
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uint8_t Number;
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uint32_t BaseAddress;
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uint8_t Size;
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uint8_t SubRegionDisable;
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uint8_t TypeExtField;
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uint8_t AccessPermission;
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uint8_t DisableExec;
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uint8_t IsShareable;
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uint8_t IsCacheable;
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uint8_t IsBufferable;
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}MPU_Region_InitTypeDef;
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#endif
/* __MPU_PRESENT */
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/* Exported constants --------------------------------------------------------*/
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#define NVIC_PRIORITYGROUP_0 ((uint32_t)0x00000007)
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#define NVIC_PRIORITYGROUP_1 ((uint32_t)0x00000006)
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#define NVIC_PRIORITYGROUP_2 ((uint32_t)0x00000005)
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#define NVIC_PRIORITYGROUP_3 ((uint32_t)0x00000004)
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#define NVIC_PRIORITYGROUP_4 ((uint32_t)0x00000003)
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#define SYSTICK_CLKSOURCE_HCLK_DIV8 ((uint32_t)0x00000000)
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#define SYSTICK_CLKSOURCE_HCLK ((uint32_t)0x00000004)
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#if (__MPU_PRESENT == 1)
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#define MPU_HFNMI_PRIVDEF_NONE ((uint32_t)0x00000000)
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#define MPU_HARDFAULT_NMI ((uint32_t)0x00000002)
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#define MPU_PRIVILEGED_DEFAULT ((uint32_t)0x00000004)
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#define MPU_HFNMI_PRIVDEF ((uint32_t)0x00000006)
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#define MPU_REGION_ENABLE ((uint8_t)0x01)
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#define MPU_REGION_DISABLE ((uint8_t)0x00)
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#define MPU_INSTRUCTION_ACCESS_ENABLE ((uint8_t)0x00)
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#define MPU_INSTRUCTION_ACCESS_DISABLE ((uint8_t)0x01)
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#define MPU_ACCESS_SHAREABLE ((uint8_t)0x01)
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#define MPU_ACCESS_NOT_SHAREABLE ((uint8_t)0x00)
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#define MPU_ACCESS_CACHEABLE ((uint8_t)0x01)
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#define MPU_ACCESS_NOT_CACHEABLE ((uint8_t)0x00)
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#define MPU_ACCESS_BUFFERABLE ((uint8_t)0x01)
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#define MPU_ACCESS_NOT_BUFFERABLE ((uint8_t)0x00)
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#define MPU_TEX_LEVEL0 ((uint8_t)0x00)
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#define MPU_TEX_LEVEL1 ((uint8_t)0x01)
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#define MPU_TEX_LEVEL2 ((uint8_t)0x02)
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#define MPU_REGION_SIZE_32B ((uint8_t)0x04)
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#define MPU_REGION_SIZE_64B ((uint8_t)0x05)
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#define MPU_REGION_SIZE_128B ((uint8_t)0x06)
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#define MPU_REGION_SIZE_256B ((uint8_t)0x07)
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#define MPU_REGION_SIZE_512B ((uint8_t)0x08)
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#define MPU_REGION_SIZE_1KB ((uint8_t)0x09)
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#define MPU_REGION_SIZE_2KB ((uint8_t)0x0A)
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#define MPU_REGION_SIZE_4KB ((uint8_t)0x0B)
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#define MPU_REGION_SIZE_8KB ((uint8_t)0x0C)
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#define MPU_REGION_SIZE_16KB ((uint8_t)0x0D)
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#define MPU_REGION_SIZE_32KB ((uint8_t)0x0E)
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#define MPU_REGION_SIZE_64KB ((uint8_t)0x0F)
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#define MPU_REGION_SIZE_128KB ((uint8_t)0x10)
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#define MPU_REGION_SIZE_256KB ((uint8_t)0x11)
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#define MPU_REGION_SIZE_512KB ((uint8_t)0x12)
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#define MPU_REGION_SIZE_1MB ((uint8_t)0x13)
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#define MPU_REGION_SIZE_2MB ((uint8_t)0x14)
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#define MPU_REGION_SIZE_4MB ((uint8_t)0x15)
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#define MPU_REGION_SIZE_8MB ((uint8_t)0x16)
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#define MPU_REGION_SIZE_16MB ((uint8_t)0x17)
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#define MPU_REGION_SIZE_32MB ((uint8_t)0x18)
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#define MPU_REGION_SIZE_64MB ((uint8_t)0x19)
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#define MPU_REGION_SIZE_128MB ((uint8_t)0x1A)
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#define MPU_REGION_SIZE_256MB ((uint8_t)0x1B)
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#define MPU_REGION_SIZE_512MB ((uint8_t)0x1C)
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#define MPU_REGION_SIZE_1GB ((uint8_t)0x1D)
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#define MPU_REGION_SIZE_2GB ((uint8_t)0x1E)
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#define MPU_REGION_SIZE_4GB ((uint8_t)0x1F)
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#define MPU_REGION_NO_ACCESS ((uint8_t)0x00)
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#define MPU_REGION_PRIV_RW ((uint8_t)0x01)
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#define MPU_REGION_PRIV_RW_URO ((uint8_t)0x02)
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#define MPU_REGION_FULL_ACCESS ((uint8_t)0x03)
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#define MPU_REGION_PRIV_RO ((uint8_t)0x05)
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#define MPU_REGION_PRIV_RO_URO ((uint8_t)0x06)
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#define MPU_REGION_NUMBER0 ((uint8_t)0x00)
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#define MPU_REGION_NUMBER1 ((uint8_t)0x01)
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#define MPU_REGION_NUMBER2 ((uint8_t)0x02)
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#define MPU_REGION_NUMBER3 ((uint8_t)0x03)
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#define MPU_REGION_NUMBER4 ((uint8_t)0x04)
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#define MPU_REGION_NUMBER5 ((uint8_t)0x05)
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#define MPU_REGION_NUMBER6 ((uint8_t)0x06)
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#define MPU_REGION_NUMBER7 ((uint8_t)0x07)
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#if !defined(CORE_CM4)
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#define MPU_REGION_NUMBER8 ((uint8_t)0x08)
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#define MPU_REGION_NUMBER9 ((uint8_t)0x09)
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#define MPU_REGION_NUMBER10 ((uint8_t)0x0A)
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#define MPU_REGION_NUMBER11 ((uint8_t)0x0B)
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#define MPU_REGION_NUMBER12 ((uint8_t)0x0C)
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#define MPU_REGION_NUMBER13 ((uint8_t)0x0D)
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#define MPU_REGION_NUMBER14 ((uint8_t)0x0E)
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#define MPU_REGION_NUMBER15 ((uint8_t)0x0F)
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#endif
/* !defined(CORE_CM4) */
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#endif
/* __MPU_PRESENT */
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/* Exported Macros -----------------------------------------------------------*/
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#define CM7_CPUID ((uint32_t)0x00000003)
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#if defined(DUAL_CORE)
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#define CM4_CPUID ((uint32_t)0x00000001)
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#endif
/*DUAL_CORE*/
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/* Exported functions --------------------------------------------------------*/
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/* Initialization and de-initialization functions *****************************/
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void
HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup);
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void
HAL_NVIC_SetPriority(
IRQn_Type
IRQn, uint32_t PreemptPriority, uint32_t SubPriority);
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void
HAL_NVIC_EnableIRQ(
IRQn_Type
IRQn);
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void
HAL_NVIC_DisableIRQ(
IRQn_Type
IRQn);
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void
HAL_NVIC_SystemReset(
void
);
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uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb);
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/* Peripheral Control functions ***********************************************/
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#if (__MPU_PRESENT == 1)
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void
HAL_MPU_Enable(uint32_t MPU_Control);
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void
HAL_MPU_Disable(
void
);
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void
HAL_MPU_EnableRegion(uint32_t RegionNumber);
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void
HAL_MPU_DisableRegion(uint32_t RegionNumber);
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void
HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init);
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#endif
/* __MPU_PRESENT */
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uint32_t HAL_NVIC_GetPriorityGrouping(
void
);
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void
HAL_NVIC_GetPriority(
IRQn_Type
IRQn, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority);
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uint32_t HAL_NVIC_GetPendingIRQ(
IRQn_Type
IRQn);
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void
HAL_NVIC_SetPendingIRQ(
IRQn_Type
IRQn);
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void
HAL_NVIC_ClearPendingIRQ(
IRQn_Type
IRQn);
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uint32_t HAL_NVIC_GetActive(
IRQn_Type
IRQn);
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void
HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource);
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void
HAL_SYSTICK_IRQHandler(
void
);
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void
HAL_SYSTICK_Callback(
void
);
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uint32_t HAL_GetCurrentCPUID(
void
);
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/* Private types -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private constants ---------------------------------------------------------*/
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/* Private macros ------------------------------------------------------------*/
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#define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PRIORITYGROUP_0) || \
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((GROUP) == NVIC_PRIORITYGROUP_1) || \
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((GROUP) == NVIC_PRIORITYGROUP_2) || \
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((GROUP) == NVIC_PRIORITYGROUP_3) || \
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((GROUP) == NVIC_PRIORITYGROUP_4))
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#define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10UL)
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#define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10UL)
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#define IS_NVIC_DEVICE_IRQ(IRQ) (((int32_t)IRQ) >= 0x00)
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#define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SYSTICK_CLKSOURCE_HCLK) || \
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((SOURCE) == SYSTICK_CLKSOURCE_HCLK_DIV8))
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#if (__MPU_PRESENT == 1)
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#define IS_MPU_REGION_ENABLE(STATE) (((STATE) == MPU_REGION_ENABLE) || \
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((STATE) == MPU_REGION_DISABLE))
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#define IS_MPU_INSTRUCTION_ACCESS(STATE) (((STATE) == MPU_INSTRUCTION_ACCESS_ENABLE) || \
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((STATE) == MPU_INSTRUCTION_ACCESS_DISABLE))
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#define IS_MPU_ACCESS_SHAREABLE(STATE) (((STATE) == MPU_ACCESS_SHAREABLE) || \
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((STATE) == MPU_ACCESS_NOT_SHAREABLE))
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#define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \
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((STATE) == MPU_ACCESS_NOT_CACHEABLE))
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#define IS_MPU_ACCESS_BUFFERABLE(STATE) (((STATE) == MPU_ACCESS_BUFFERABLE) || \
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((STATE) == MPU_ACCESS_NOT_BUFFERABLE))
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#define IS_MPU_TEX_LEVEL(TYPE) (((TYPE) == MPU_TEX_LEVEL0) || \
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((TYPE) == MPU_TEX_LEVEL1) || \
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((TYPE) == MPU_TEX_LEVEL2))
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#define IS_MPU_REGION_PERMISSION_ATTRIBUTE(TYPE) (((TYPE) == MPU_REGION_NO_ACCESS) || \
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((TYPE) == MPU_REGION_PRIV_RW) || \
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((TYPE) == MPU_REGION_PRIV_RW_URO) || \
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((TYPE) == MPU_REGION_FULL_ACCESS) || \
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((TYPE) == MPU_REGION_PRIV_RO) || \
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((TYPE) == MPU_REGION_PRIV_RO_URO))
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#if !defined(CORE_CM4)
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#define IS_MPU_REGION_NUMBER(NUMBER) (((NUMBER) == MPU_REGION_NUMBER0) || \
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((NUMBER) == MPU_REGION_NUMBER1) || \
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((NUMBER) == MPU_REGION_NUMBER2) || \
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((NUMBER) == MPU_REGION_NUMBER3) || \
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((NUMBER) == MPU_REGION_NUMBER4) || \
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((NUMBER) == MPU_REGION_NUMBER5) || \
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((NUMBER) == MPU_REGION_NUMBER6) || \
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((NUMBER) == MPU_REGION_NUMBER7) || \
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((NUMBER) == MPU_REGION_NUMBER8) || \
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((NUMBER) == MPU_REGION_NUMBER9) || \
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((NUMBER) == MPU_REGION_NUMBER10) || \
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((NUMBER) == MPU_REGION_NUMBER11) || \
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((NUMBER) == MPU_REGION_NUMBER12) || \
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((NUMBER) == MPU_REGION_NUMBER13) || \
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((NUMBER) == MPU_REGION_NUMBER14) || \
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((NUMBER) == MPU_REGION_NUMBER15))
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#else
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#define IS_MPU_REGION_NUMBER(NUMBER) (((NUMBER) == MPU_REGION_NUMBER0) || \
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((NUMBER) == MPU_REGION_NUMBER1) || \
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((NUMBER) == MPU_REGION_NUMBER2) || \
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((NUMBER) == MPU_REGION_NUMBER3) || \
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((NUMBER) == MPU_REGION_NUMBER4) || \
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((NUMBER) == MPU_REGION_NUMBER5) || \
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((NUMBER) == MPU_REGION_NUMBER6) || \
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((NUMBER) == MPU_REGION_NUMBER7))
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#endif
/* !defined(CORE_CM4) */
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#define IS_MPU_REGION_SIZE(SIZE) (((SIZE) == MPU_REGION_SIZE_32B) || \
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((SIZE) == MPU_REGION_SIZE_64B) || \
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((SIZE) == MPU_REGION_SIZE_128B) || \
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((SIZE) == MPU_REGION_SIZE_256B) || \
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((SIZE) == MPU_REGION_SIZE_512B) || \
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((SIZE) == MPU_REGION_SIZE_1KB) || \
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((SIZE) == MPU_REGION_SIZE_2KB) || \
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((SIZE) == MPU_REGION_SIZE_4KB) || \
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((SIZE) == MPU_REGION_SIZE_8KB) || \
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((SIZE) == MPU_REGION_SIZE_16KB) || \
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((SIZE) == MPU_REGION_SIZE_32KB) || \
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((SIZE) == MPU_REGION_SIZE_64KB) || \
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((SIZE) == MPU_REGION_SIZE_128KB) || \
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((SIZE) == MPU_REGION_SIZE_256KB) || \
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((SIZE) == MPU_REGION_SIZE_512KB) || \
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((SIZE) == MPU_REGION_SIZE_1MB) || \
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((SIZE) == MPU_REGION_SIZE_2MB) || \
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((SIZE) == MPU_REGION_SIZE_4MB) || \
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((SIZE) == MPU_REGION_SIZE_8MB) || \
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((SIZE) == MPU_REGION_SIZE_16MB) || \
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((SIZE) == MPU_REGION_SIZE_32MB) || \
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((SIZE) == MPU_REGION_SIZE_64MB) || \
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((SIZE) == MPU_REGION_SIZE_128MB) || \
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((SIZE) == MPU_REGION_SIZE_256MB) || \
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((SIZE) == MPU_REGION_SIZE_512MB) || \
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((SIZE) == MPU_REGION_SIZE_1GB) || \
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((SIZE) == MPU_REGION_SIZE_2GB) || \
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((SIZE) == MPU_REGION_SIZE_4GB))
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#define IS_MPU_SUB_REGION_DISABLE(SUBREGION) ((SUBREGION) < (uint16_t)0x00FF)
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#endif
/* __MPU_PRESENT */
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#ifdef __cplusplus
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}
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#endif
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#endif
/* STM32H7xx_HAL_CORTEX_H */
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IRQn_Type
IRQn_Type
STM32H7XX Interrupt Number Definition, according to the selected device in Library_configuration_sect...
Definition
stm32h723xx.h:49
stm32h7xx_hal_def.h
This file contains HAL common defines, enumeration, macros and structures definitions.
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