RTEMS
6.3
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bsps
arm
atsam
include
libchip
include
sdramc.h
Go to the documentation of this file.
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/* ---------------------------------------------------------------------------- */
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/* Atmel Microcontroller Software Support */
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/* SAM Software Package License */
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/* ---------------------------------------------------------------------------- */
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/* Copyright (c) 2015, Atmel Corporation */
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/* */
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/* All rights reserved. */
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/* */
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/* Redistribution and use in source and binary forms, with or without */
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/* modification, are permitted provided that the following condition is met: */
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/* */
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/* - Redistributions of source code must retain the above copyright notice, */
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/* this list of conditions and the disclaimer below. */
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/* */
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/* Atmel's name may not be used to endorse or promote products derived from */
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/* this software without specific prior written permission. */
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/* */
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/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
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/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
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/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
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/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
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/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
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/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
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/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
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/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
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/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
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/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
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/* ---------------------------------------------------------------------------- */
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// ---------------------------------------------------------------------------
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// SDRAM
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// ---------------------------------------------------------------------------
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#define EBI_SDRAMC_ADDR (0x70000000u)
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#define BOARD_SDRAM_BUSWIDTH 16
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typedef
struct
_SSdramc_config
{
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uint32_t dwColumnBits;
// Number of Column Bits
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uint32_t dwRowBits;
// Number of Row Bits
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uint32_t dwBanks;
// Number of Banks
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uint32_t dwCAS;
// CAS Latency
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uint32_t dwDataBusWidth;
// Data Bus Width
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uint32_t dwWriteRecoveryDelay;
// Write Recovery Delay
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uint32_t dwRowCycleDelay_RowRefreshCycle;
// Row Cycle Delay and Row Refresh Cycle
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uint32_t dwRowPrechargeDelay;
// Row Precharge Delay
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uint32_t dwRowColumnDelay;
// Row to Column Delay
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uint32_t dwActivePrechargeDelay;
// Active to Precharge Delay
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uint32_t dwExitSelfRefreshActiveDelay;
// Exit Self Refresh to Active Delay
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uint32_t dwBK1;
// bk1 addr
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} SSdramc_config;
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typedef
struct
_SSdramc_Memory
{
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SSdramc_config cfg;
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} SSdramc_Memory;
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extern
void
SDRAMC_Configure
(SSdramc_Memory *pMemory,
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uint32_t dwClockFrequency);
SDRAMC_Configure
void SDRAMC_Configure(SSdramc_Memory *pMemory, uint32_t dwClockFrequency)
Configure and initialize the SDRAM controller.
Definition
sdramc.c:106
_SSdramc_Memory
Definition
sdramc.h:62
_SSdramc_config
Definition
sdramc.h:46
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