RTEMS
6.3
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bsps
powerpc
motorola_powerpc
include
bsp
VMEConfig.h
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#ifndef RTEMS_BSP_VME_CONFIG_H
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#define RTEMS_BSP_VME_CONFIG_H
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/* BSP specific address space configuration parameters */
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/*
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* Authorship
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* ----------
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* This software was created by
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* Till Straumann <strauman@slac.stanford.edu>, 2002,
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* Stanford Linear Accelerator Center, Stanford University.
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*
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* Acknowledgement of sponsorship
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* ------------------------------
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* This software was produced by
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* the Stanford Linear Accelerator Center, Stanford University,
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* under Contract DE-AC03-76SFO0515 with the Department of Energy.
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*
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* Government disclaimer of liability
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* ----------------------------------
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* Neither the United States nor the United States Department of Energy,
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* nor any of their employees, makes any warranty, express or implied, or
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* assumes any legal liability or responsibility for the accuracy,
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* completeness, or usefulness of any data, apparatus, product, or process
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* disclosed, or represents that its use would not infringe privately owned
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* rights.
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*
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* Stanford disclaimer of liability
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* --------------------------------
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* Stanford University makes no representations or warranties, express or
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* implied, nor assumes any liability for the use of this software.
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*
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* Stanford disclaimer of copyright
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* --------------------------------
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* Stanford University, owner of the copyright, hereby disclaims its
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* copyright and all other rights in this software. Hence, anyone may
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* freely use it for any purpose without restriction.
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*
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* Maintenance of notices
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* ----------------------
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* In the interest of clarity regarding the origin and status of this
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* SLAC software, this and all the preceding Stanford University notices
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* are to remain affixed to any copy or derivative of this software made
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* or distributed by the recipient and are to be affixed to any copy of
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* software made or distributed by the recipient that contains a copy or
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* derivative of this software.
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*
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* ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
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*/
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/*
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* The BSP maps VME address ranges into
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* one BAT.
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* NOTE: the BSP (startup/bspstart.c) uses
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* hardcoded window lengths that match this
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* layout:
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*
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* BSP_VME_BAT_IDX defines
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* which BAT to use for mapping the VME bus.
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* If this is undefined, no extra BAT will be
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* configured and VME has to share the available
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* PCI address space with PCI devices.
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*
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* If you do define BSP_VME_BAT_IDX you must
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* make sure the corresponding BAT is really
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* available and unused!
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*/
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#if defined(mot_ppc_mvme2100)
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#define _VME_A32_WIN0_ON_PCI 0x90000000
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#define _VME_A24_ON_PCI 0x9f000000
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#define _VME_A16_ON_PCI 0x9fff0000
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#define BSP_VME_BAT_IDX 1
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#elif defined(mot_ppc_mvme5100)
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#define _VME_A32_WIN0_ON_PCI 0xa0000000
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#define _VME_A32_WIN0_SIZE 0x1e000000
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#define _VME_CSR_ON_PCI 0xbe000000
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#define _VME_A24_ON_PCI 0xbf000000
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#define _VME_A16_ON_PCI 0xbfff0000
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#else
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#define _VME_A32_WIN0_ON_PCI 0x10000000
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#define _VME_A24_ON_PCI 0x1f000000
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#define _VME_A16_ON_PCI 0x1fff0000
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#define BSP_VME_BAT_IDX 0
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#endif
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/* start of the A32 window on the VME bus
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* TODO: this should perhaps be a run-time configuration option
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*/
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#if defined(mot_ppc_mvme5100)
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#define _VME_A32_WIN0_ON_VME 0xa0000000
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#else
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#define _VME_A32_WIN0_ON_VME 0x20000000
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#endif
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/* if _VME_DRAM_OFFSET is defined, the BSP
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* will map the board RAM onto the VME bus, starting
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* at _VME_DRAM_OFFSET
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*/
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#define _VME_DRAM_OFFSET 0xc0000000
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/* Define BSP_PCI_VME_DRIVER_DOES_EOI to let the vmeUniverse
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* driver (Tsi148 driver doesn't implement this) implement
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* VME IRQ priorities in software.
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*
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* Here's how this works:
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*
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* 1) VME IRQ happens
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* 2) universe propagates IRQ to PCI/PPC/main interrupt
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* controller ('PIC' - programmable interrupt controller).
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* 3) PIC driver dispatches universe driver's ISR
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* 4) universe driver ISR acknowledges IRQ on VME,
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* determines VME vector.
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* ++++++++++++ stuff between ++ signs is related to SW priorities +++++++++
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* 5) universe driver *masks* all VME IRQ levels <= interrupting
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* level.
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* 6) universe driver calls PIC driver's 'EOI' routine.
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* This effectively re-enables PCI and hence higher
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* level VME interrupts.
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* 7) universe driver dispatches user VME ISR.
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*
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* ++>> HIGHER PRIORITY VME IRQ COULD HAPPEN HERE and would be handled <<++
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*
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* 8) user ISR returns, universe driver re-enables lower
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* level VME interrupts, returns.
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* 9) universe driver ISR returns control to PIC driver
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* 10) PIC driver *omits* regular EOI sequence since this
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* was already done by universe driver (step 6).
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* ++++++++++++ end of special handling (SW priorities) ++++++++++++++++++++
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* 11) PIC driver ISR dispatcher returns.
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*
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* Note that the BSP *MUST* provide the following hooks
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* in order for this to work:
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* a) bsp.h must define the symbol BSP_PIC_DO_EOI to
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* a sequence of instructions that terminates an
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* interrupt at the interrupt controller.
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* b) The interrupt controller driver must check the
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* interrupt source and *must omit* running the EOI
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* sequence if the interrupt source is the vmeUniverse
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* (because the universe driver already ran BSP_PIC_DO_EOI)
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* The interrupt controller must define the variable
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*
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* int _BSP_vme_bridge_irq = -1;
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*
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* which is assigned the universe's interrupt line information
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* by vme_universe.c:BSP_VMEIrqMgrInstall(). The interrupt
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* controller driver may use this variable to determine
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* if an IRQ was caused by the universe.
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*
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* c) define BSP_PCI_VME_DRIVER_DOES_EOI
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*
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* NOTE: If a) and b) are not implemented by the BSP
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* BSP_PCI_VME_DRIVER_DOES_EOI must be *undefined*.
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*/
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#define BSP_PCI_VME_DRIVER_DOES_EOI
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#ifdef BSP_PCI_VME_DRIVER_DOES_EOI
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/* don't reference vmeUniverse0PciIrqLine directly from the irq
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* controller driver - leave it up to BSP_VMEIrqMgrInstall() to
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* set _BSP_vme_bridge_irq. That way, we can avoid linking
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* the universe driver if VME is unused...
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*/
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extern
int
_BSP_vme_bridge_irq;
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#endif
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/* If your BSP requires a non-standard way to configure
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* the VME interrupt manager then define the symbol
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*
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* BSP_VME_UNIVERSE_INSTALL_IRQ_MGR
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*
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* to a proper instruction sequence that installs the
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* universe interrupt manager. This requires knowledge
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* of the wiring between the universe and the PIC (main
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* interrupt controller), i.e., which IRQ 'pins' of the
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* universe are wired to which 'lines'/inputs at the PIC.
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* (consult vmeUniverse.h for more information).
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*
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* When installing the universe IRQ manager it is also
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* possible to specify whether it should try to share
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* PIC interrupts with other sources. This might not
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* be supported by all BSPs (but the unverse driver
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* recognizes that).
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*
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* If BSP_VME_UNIVERSE_INSTALL_IRQ_MGR is undefined then
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* the default algorithm is used (vme_universe.c):
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*
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* This default setup uses only a single wire. It reads
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* the PIC 'line' from PCI configuration space and assumes
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* this to be wired to the first (LIRQ0) IRQ input at the
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* universe. The default setup tries to use interrupt
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* sharing.
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*/
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#include <bsp/motorola.h>
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#include <bsp/pci.h>
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#define BSP_VME_UNIVERSE_INSTALL_IRQ_MGR(err) \
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do { \
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int bus, dev, i = 0, j; \
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const struct _int_map *bspmap; \
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/* install the VME interrupt manager; \
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* if there's a bsp route map, use it to \
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* configure additional lines... \
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*/
\
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err = -1; \
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if (0 == pci_find_device(0x10e3, 0x0000, 0, &bus, &dev, &i)){ \
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if ( (bspmap = motorolaIntMap(currentBoard)) ) { \
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for ( i=0; bspmap[i].bus >= 0; i++ ) { \
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if ( bspmap[i].bus == bus && bspmap[i].slot == dev ) { \
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int pins[5], names[4]; \
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/* found it; use info here... */
\
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/* copy up to 4 entries; terminated with -1 pin */
\
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for ( j=0; \
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j<5 && (pins[j]=bspmap[i].pin_route[j].pin-1)>=0; \
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j++) { \
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names[j] = bspmap[i].pin_route[j].int_name[0]; \
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} \
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pins[4] = -1; \
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if ( 0 == vmeUniverseInstallIrqMgrAlt( \
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VMEUNIVERSE_IRQ_MGR_FLAG_SHARED,
/* shared IRQs */
\
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pins[0], names[0], \
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pins[1], names[1], \
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pins[2], names[2], \
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pins[3], names[3], \
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-1) ) { \
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i = -1; \
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break; \
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} \
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} \
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} \
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} \
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if ( i >= 0 ) \
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err = vmeUniverseInstallIrqMgrAlt( \
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VMEUNIVERSE_IRQ_MGR_FLAG_SHARED, \
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0,-1, \
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-1); \
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} \
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} while (0)
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extern
int
BSP_VMEInit(
void
);
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extern
int
BSP_VMEIrqMgrInstall(
void
);
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#endif
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