RTEMS 6.3
Loading...
Searching...
No Matches
cpu.h File Reference

Motorola M68K CPU Dependent Source. More...

Go to the source code of this file.

Data Structures

struct  Context_Control
 Thread register context. More...
struct  Context_Control_fp
 SPARC basic context. More...
struct  CPU_Interrupt_frame
 Interrupt stack frame (ISF). More...
struct  CPU_Exception_frame
 The set of registers that specifies the complete processor state. More...

Macros

#define CPU_SIMPLE_VECTORED_INTERRUPTS   TRUE
#define CPU_ISR_PASSES_FRAME_POINTER   FALSE
#define CPU_HARDWARE_FP   FALSE
#define CPU_SOFTWARE_FP   FALSE
#define CPU_ALL_TASKS_ARE_FP   FALSE
#define CPU_IDLE_TASK_IS_FP   FALSE
#define CPU_USE_DEFERRED_FP_SWITCH   TRUE
#define CPU_ENABLE_ROBUST_THREAD_DISPATCH   FALSE
#define CPU_STACK_GROWS_UP   FALSE
#define CPU_CACHE_LINE_BYTES   16
#define CPU_STRUCTURE_ALIGNMENT   RTEMS_ALIGNED( CPU_CACHE_LINE_BYTES )
#define CPU_MAXIMUM_PROCESSORS   32
#define M68K_FP_STATE_SIZE   216
#define _CPU_Context_Get_SP(_context)
#define _CPU_Context_Initialize_fp(_fp_area)
#define _CPU_Context_Initialize_fp(_fp_area)
#define CPU_MODES_INTERRUPT_MASK   0x00000007
#define CPU_CONTEXT_FP_SIZE   sizeof( Context_Control_fp )
#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK   1024
#define CPU_INTERRUPT_NUMBER_OF_VECTORS   256
#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER   (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
#define CPU_PROVIDES_ISR_IS_IN_PROGRESS   FALSE
#define CPU_STACK_MINIMUM_SIZE   M68K_CPU_STACK_MINIMUM_SIZE
#define CPU_PRIORITY_MAXIMUM   M68K_CPU_PRIORITY_MAXIMUM
#define CPU_SIZEOF_POINTER   4
#define CPU_ALIGNMENT   4
#define CPU_HEAP_ALIGNMENT   CPU_ALIGNMENT
#define CPU_STACK_ALIGNMENT   CPU_ALIGNMENT
#define CPU_INTERRUPT_STACK_ALIGNMENT   CPU_CACHE_LINE_BYTES
#define _CPU_ISR_Disable(_level)
#define _CPU_ISR_Enable(_level)
#define _CPU_ISR_Flash(_level)
#define _CPU_ISR_Set_level(_newlevel)
#define CPU_USE_LIBC_INIT_FINI_ARRAY   FALSE
#define CPU_USE_GENERIC_BITFIELD_CODE   FALSE
#define _CPU_Bitfield_Find_first_bit(_value, _output)
#define _CPU_Priority_Mask(_bit_number)
#define _CPU_Priority_bits_index(_priority)

Functions

uint32_t _CPU_ISR_Get_level (void)
void _CPU_Context_Initialize (Context_Control *the_context, void *stack_area_begin, size_t stack_area_size, uint32_t new_level, void(*entry_point)(void), bool is_fp, void *tls_area)
RTEMS_NO_RETURN void * _CPU_Thread_Idle_body (uintptr_t ignored)
void _CPU_Initialize (void)
 CPU initialization.
void _CPU_ISR_install_raw_handler (uint32_t vector, CPU_ISR_raw_handler new_handler, CPU_ISR_raw_handler *old_handler)
void _CPU_ISR_install_vector (uint32_t vector, CPU_ISR_handler new_handler, CPU_ISR_handler *old_handler)
void _CPU_Context_switch (Context_Control *run, Context_Control *heir)
 CPU switch context.
RTEMS_NO_RETURN void _CPU_Context_Restart_self (Context_Control *the_context)
void _CPU_Context_save_fp (Context_Control_fp **fp_context_ptr)
void _CPU_Context_restore_fp (Context_Control_fp **fp_context_ptr)
void _CPU_Exception_frame_print (const CPU_Exception_frame *frame)
uint32_t _CPU_Counter_frequency (void)
CPU_Counter_ticks _CPU_Counter_read (void)

Variables

void * _VBR
const unsigned char _CPU_m68k_BFFFO_table [256]

Detailed Description

Motorola M68K CPU Dependent Source.

Macro Definition Documentation

◆ _CPU_Bitfield_Find_first_bit

#define _CPU_Bitfield_Find_first_bit ( _value,
_output )
Value:
{ \
int dumby; \
\
__asm__ volatile ( " move.w %2,%1\n" \
" lsr.w #8,%1\n" \
" beq.s 1f\n" \
" move.b (%3,%1.w),%0\n" \
" and.l #0x000000ff,%0\n"\
" bra.s 0f\n" \
"1: moveq.l #8,%0\n" \
" add.b (%3,%2.w),%0\n" \
"0:\n" \
: "=&d" ((_output)), "=&d" ((dumby)) \
: "d" ((_value)), "ao" ((_CPU_m68k_BFFFO_table)) \
: "cc" ) ; \
}

◆ _CPU_Context_Get_SP

#define _CPU_Context_Get_SP ( _context)
Value:
(_context)->a7_msp

◆ _CPU_Context_Initialize_fp [1/2]

#define _CPU_Context_Initialize_fp ( _fp_area)
Value:
{ \
uint32_t *_fp_context = (uint32_t *) \
( (uintptr_t) *( _fp_area ) + CPU_CONTEXT_FP_SIZE - 4 ); \
*(--(_fp_context)) = 0; \
*(_fp_area) = (void *)(_fp_context); \
}

◆ _CPU_Context_Initialize_fp [2/2]

#define _CPU_Context_Initialize_fp ( _fp_area)
Value:
{ \
_fp = *(Context_Control_fp **)_fp_area; \
_fp->_exception_bits = 0; \
_fp->_trap_enable_bits = 0; \
_fp->_sticky_bits = 0; \
_fp->_rounding_mode = 0; \
_fp->_format = 0; \
_fp->_last_operation = 0; \
_fp->_operand1.df = 0; \
_fp->_operand2.df = 0; \
}
SPARC basic context.
Definition cpu.h:213

◆ _CPU_ISR_Disable

#define _CPU_ISR_Disable ( _level)
Value:
m68k_disable_interrupts( _level )

◆ _CPU_ISR_Enable

#define _CPU_ISR_Enable ( _level)
Value:
m68k_enable_interrupts( _level )

◆ _CPU_ISR_Flash

#define _CPU_ISR_Flash ( _level)
Value:
m68k_flash_interrupts( _level )

◆ _CPU_ISR_Set_level

#define _CPU_ISR_Set_level ( _newlevel)
Value:
m68k_set_interrupt_level( _newlevel )

◆ _CPU_Priority_bits_index

#define _CPU_Priority_bits_index ( _priority)
Value:
(_priority)

◆ _CPU_Priority_Mask

#define _CPU_Priority_Mask ( _bit_number)
Value:
( 0x8000 >> (_bit_number) )