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uart.h
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1/* SPDX-License-Identifier: BSD-2-Clause */
2
8
9/*
10 * This file contains definitions for LatticeMico32 UART
11 *
12 * COPYRIGHT (c) 1989-1999.
13 * On-Line Applications Research Corporation (OAR).
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
17 * are met:
18 * 1. Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 *
36 * Jukka Pietarinen <jukka.pietarinen@mrf.fi>, 2008,
37 * Micro-Research Finland Oy
38 */
39
46
47#ifndef _BSPUART_H
48#define _BSPUART_H
49
50void BSP_uart_init(int baud);
51
52/* Receive buffer register / transmit holding register */
53
54#define LM32_UART_RBR (0x0000)
55
56/* Interrupt enable register */
57
58#define LM32_UART_IER (0x0004)
59#define LM32_UART_IER_RBRI (0x0001)
60#define LM32_UART_IER_THRI (0x0002)
61#define LM32_UART_IER_RLSI (0x0004)
62#define LM32_UART_IER_MSI (0x0008)
63
64/* Interrupt identification register */
65
66#define LM32_UART_IIR (0x0008)
67#define LM32_UART_IIR_STAT (0x0001)
68#define LM32_UART_IIR_ID0 (0x0002)
69#define LM32_UART_IIR_ID1 (0x0004)
70
71/* Line control register */
72
73#define LM32_UART_LCR (0x000C)
74#define LM32_UART_LCR_WLS0 (0x0001)
75#define LM32_UART_LCR_WLS1 (0x0002)
76#define LM32_UART_LCR_STB (0x0004)
77#define LM32_UART_LCR_PEN (0x0008)
78#define LM32_UART_LCR_EPS (0x0010)
79#define LM32_UART_LCR_SP (0x0020)
80#define LM32_UART_LCR_SB (0x0040)
81#define LM32_UART_LCR_5BIT (0)
82#define LM32_UART_LCR_6BIT (LM32_UART_LCR_WLS0)
83#define LM32_UART_LCR_7BIT (LM32_UART_LCR_WLS1)
84#define LM32_UART_LCR_8BIT (LM32_UART_LCR_WLS1 | LM32_UART_LCR_WLS0)
85
86/* Modem control register */
87
88#define LM32_UART_MCR (0x0010)
89#define LM32_UART_MCR_DTR (0x0001)
90#define LM32_UART_MCR_RTS (0x0002)
91
92/* Line status register */
93
94#define LM32_UART_LSR (0x0014)
95#define LM32_UART_LSR_DR (0x0001)
96#define LM32_UART_LSR_OE (0x0002)
97#define LM32_UART_LSR_PE (0x0004)
98#define LM32_UART_LSR_FE (0x0008)
99#define LM32_UART_LSR_BI (0x0010)
100#define LM32_UART_LSR_THRE (0x0020)
101#define LM32_UART_LSR_TEMT (0x0040)
102
103/* Modem status register */
104
105#define LM32_UART_MSR (0x0018)
106#define LM32_UART_MSR_DCTS (0x0001)
107#define LM32_UART_MSR_DDSR (0x0002)
108#define LM32_UART_MSR_TERI (0x0004)
109#define LM32_UART_MSR_DDCD (0x0008)
110#define LM32_UART_MSR_CTS (0x0010)
111#define LM32_UART_MSR_DSR (0x0020)
112#define LM32_UART_MSR_RI (0x0040)
113#define LM32_UART_MSR_DCD (0x0000)
114
115/* Baud-rate divisor register */
116
117#define LM32_UART_DIV (0x001C)
118
119#endif /* _BSPUART_H */
120
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