RTEMS
6.3
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bsps
arm
imx
include
arm
freescale
imx
imx_ecspireg.h
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/* SPDX-License-Identifier: BSD-2-Clause */
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/*
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* Copyright (c) 2017 embedded brains GmbH & Co. KG
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef IMX_ECSPIREG_H
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#define IMX_ECSPIREG_H
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#include <
bsp/utility.h
>
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typedef
struct
{
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uint32_t rxdata;
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uint32_t txdata;
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uint32_t conreg;
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#define IMX_ECSPI_CONREG_BURST_LENGTH(val) BSP_FLD32(val, 20, 31)
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#define IMX_ECSPI_CONREG_BURST_LENGTH_GET(reg) BSP_FLD32GET(reg, 20, 31)
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#define IMX_ECSPI_CONREG_BURST_LENGTH_SET(reg, val) BSP_FLD32SET(reg, val, 20, 31)
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#define IMX_ECSPI_CONREG_CHANNEL_SELECT(val) BSP_FLD32(val, 18, 19)
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#define IMX_ECSPI_CONREG_CHANNEL_SELECT_GET(reg) BSP_FLD32GET(reg, 18, 19)
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#define IMX_ECSPI_CONREG_CHANNEL_SELECT_SET(reg, val) BSP_FLD32SET(reg, val, 18, 19)
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#define IMX_ECSPI_CONREG_DRCTL(val) BSP_FLD32(val, 16, 17)
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#define IMX_ECSPI_CONREG_DRCTL_GET(reg) BSP_FLD32GET(reg, 16, 17)
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#define IMX_ECSPI_CONREG_DRCTL_SET(reg, val) BSP_FLD32SET(reg, val, 16, 17)
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#define IMX_ECSPI_CONREG_PRE_DIVIDER(val) BSP_FLD32(val, 12, 15)
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#define IMX_ECSPI_CONREG_PRE_DIVIDER_GET(reg) BSP_FLD32GET(reg, 12, 15)
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#define IMX_ECSPI_CONREG_PRE_DIVIDER_SET(reg, val) BSP_FLD32SET(reg, val, 12, 15)
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#define IMX_ECSPI_CONREG_POST_DIVIDER(val) BSP_FLD32(val, 8, 11)
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#define IMX_ECSPI_CONREG_POST_DIVIDER_GET(reg) BSP_FLD32GET(reg, 8, 11)
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#define IMX_ECSPI_CONREG_POST_DIVIDER_SET(reg, val) BSP_FLD32SET(reg, val, 8, 11)
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#define IMX_ECSPI_CONREG_CHANNEL_MODE(val) BSP_FLD32(val, 4, 7)
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#define IMX_ECSPI_CONREG_CHANNEL_MODE_GET(reg) BSP_FLD32GET(reg, 4, 7)
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#define IMX_ECSPI_CONREG_CHANNEL_MODE_SET(reg, val) BSP_FLD32SET(reg, val, 4, 7)
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#define IMX_ECSPI_CONREG_SMC BSP_BIT32(3)
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#define IMX_ECSPI_CONREG_XCH BSP_BIT32(2)
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#define IMX_ECSPI_CONREG_HT BSP_BIT32(1)
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#define IMX_ECSPI_CONREG_EN BSP_BIT32(0)
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uint32_t configreg;
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#define IMX_ECSPI_CONFIGREG_HT_LENGTH(val) BSP_FLD32(val, 24, 28)
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#define IMX_ECSPI_CONFIGREG_HT_LENGTH_GET(reg) BSP_FLD32GET(reg, 24, 28)
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#define IMX_ECSPI_CONFIGREG_HT_LENGTH_SET(reg, val) BSP_FLD32SET(reg, val, 24, 28)
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#define IMX_ECSPI_CONFIGREG_SCLK_CTL(val) BSP_FLD32(val, 20, 23)
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#define IMX_ECSPI_CONFIGREG_SCLK_CTL_GET(reg) BSP_FLD32GET(reg, 20, 23)
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#define IMX_ECSPI_CONFIGREG_SCLK_CTL_SET(reg, val) BSP_FLD32SET(reg, val, 20, 23)
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#define IMX_ECSPI_CONFIGREG_DATA_CTL(val) BSP_FLD32(val, 16, 19)
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#define IMX_ECSPI_CONFIGREG_DATA_CTL_GET(reg) BSP_FLD32GET(reg, 16, 19)
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#define IMX_ECSPI_CONFIGREG_DATA_CTL_SET(reg, val) BSP_FLD32SET(reg, val, 16, 19)
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#define IMX_ECSPI_CONFIGREG_SS_POL(val) BSP_FLD32(val, 12, 15)
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#define IMX_ECSPI_CONFIGREG_SS_POL_GET(reg) BSP_FLD32GET(reg, 12, 15)
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#define IMX_ECSPI_CONFIGREG_SS_POL_SET(reg, val) BSP_FLD32SET(reg, val, 12, 15)
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#define IMX_ECSPI_CONFIGREG_SS_CTL(val) BSP_FLD32(val, 8, 11)
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#define IMX_ECSPI_CONFIGREG_SS_CTL_GET(reg) BSP_FLD32GET(reg, 8, 11)
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#define IMX_ECSPI_CONFIGREG_SS_CTL_SET(reg, val) BSP_FLD32SET(reg, val, 8, 11)
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#define IMX_ECSPI_CONFIGREG_SCLK_POL(val) BSP_FLD32(val, 4, 7)
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#define IMX_ECSPI_CONFIGREG_SCLK_POL_GET(reg) BSP_FLD32GET(reg, 4, 7)
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#define IMX_ECSPI_CONFIGREG_SCLK_POL_SET(reg, val) BSP_FLD32SET(reg, val, 4, 7)
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#define IMX_ECSPI_CONFIGREG_SCLK_PHA(val) BSP_FLD32(val, 0, 3)
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#define IMX_ECSPI_CONFIGREG_SCLK_PHA_GET(reg) BSP_FLD32GET(reg, 0, 3)
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#define IMX_ECSPI_CONFIGREG_SCLK_PHA_SET(reg, val) BSP_FLD32SET(reg, val, 0, 3)
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#define IMX_ECSPI_TC BSP_BIT32(7)
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#define IMX_ECSPI_RO BSP_BIT32(6)
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#define IMX_ECSPI_RF BSP_BIT32(5)
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#define IMX_ECSPI_RDR BSP_BIT32(4)
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#define IMX_ECSPI_RR BSP_BIT32(3)
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#define IMX_ECSPI_TF BSP_BIT32(2)
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#define IMX_ECSPI_TDR BSP_BIT32(1)
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#define IMX_ECSPI_TE BSP_BIT32(0)
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uint32_t intreg;
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uint32_t dmareg;
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#define IMX_ECSPI_DMAREG_RXTDEN BSP_BIT32(31)
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#define IMX_ECSPI_DMAREG_RX_DMA_LENGTH(val) BSP_FLD32(val, 24, 29)
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#define IMX_ECSPI_DMAREG_RX_DMA_LENGTH_GET(reg) BSP_FLD32GET(reg, 24, 29)
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#define IMX_ECSPI_DMAREG_RX_DMA_LENGTH_SET(reg, val) BSP_FLD32SET(reg, val, 24, 29)
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#define IMX_ECSPI_DMAREG_RXDEN BSP_BIT32(23)
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#define IMX_ECSPI_DMAREG_RX_THRESHOLD(val) BSP_FLD32(val, 16, 21)
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#define IMX_ECSPI_DMAREG_RX_THRESHOLD_GET(reg) BSP_FLD32GET(reg, 16, 21)
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#define IMX_ECSPI_DMAREG_RX_THRESHOLD_SET(reg, val) BSP_FLD32SET(reg, val, 16, 21)
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#define IMX_ECSPI_DMAREG_TEDEN BSP_BIT32(7)
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#define IMX_ECSPI_DMAREG_TX_THRESHOLD(val) BSP_FLD32(val, 0, 5)
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#define IMX_ECSPI_DMAREG_TX_THRESHOLD_GET(reg) BSP_FLD32GET(reg, 0, 5)
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#define IMX_ECSPI_DMAREG_TX_THRESHOLD_SET(reg, val) BSP_FLD32SET(reg, val, 0, 5)
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uint32_t statreg;
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uint32_t periodreg;
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#define IMX_ECSPI_PERIODREG_CSD_CTL(val) BSP_FLD32(val, 16, 21)
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#define IMX_ECSPI_PERIODREG_CSD_CTL_GET(reg) BSP_FLD32GET(reg, 16, 21)
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#define IMX_ECSPI_PERIODREG_CSD_CTL_SET(reg, val) BSP_FLD32SET(reg, val, 16, 21)
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#define IMX_ECSPI_PERIODREG_CSRC BSP_BIT32(15)
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#define IMX_ECSPI_PERIODREG_SAMPLE_PERIOD(val) BSP_FLD32(val, 0, 14)
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#define IMX_ECSPI_PERIODREG_SAMPLE_PERIOD_GET(reg) BSP_FLD32GET(reg, 0, 14)
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#define IMX_ECSPI_PERIODREG_SAMPLE_PERIOD_SET(reg, val) BSP_FLD32SET(reg, val, 0, 14)
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uint32_t testreg;
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#define IMX_ECSPI_TESTREG_LBC BSP_BIT32(31)
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#define IMX_ECSPI_TESTREG_RXCNT(val) BSP_FLD32(val, 8, 14)
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#define IMX_ECSPI_TESTREG_RXCNT_GET(reg) BSP_FLD32GET(reg, 8, 14)
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#define IMX_ECSPI_TESTREG_RXCNT_SET(reg, val) BSP_FLD32SET(reg, val, 8, 14)
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#define IMX_ECSPI_TESTREG_TXCNT(val) BSP_FLD32(val, 0, 6)
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#define IMX_ECSPI_TESTREG_TXCNT_GET(reg) BSP_FLD32GET(reg, 0, 6)
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#define IMX_ECSPI_TESTREG_TXCNT_SET(reg, val) BSP_FLD32SET(reg, val, 0, 6)
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uint32_t reserved_24[7];
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uint32_t msgdata;
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}
imx_ecspi
;
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#endif
/* IMX_ECSPIREG_H */
utility.h
This header file provides utility macros for BSPs.
imx_ecspi
Definition
imx_ecspireg.h:33
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