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RTEMS 6.3
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Macros | |
| #define | XUARTLITE_L_H |
| #define | XPAR_XUARTLITE_USE_DCR_BRIDGE 0 |
| #define | XUL_RX_FIFO_OFFSET 0 |
| #define | XUL_TX_FIFO_OFFSET 4 |
| #define | XUL_STATUS_REG_OFFSET 8 |
| #define | XUL_CONTROL_REG_OFFSET 12 |
| #define | XUL_CR_ENABLE_INTR 0x10 |
| #define | XUL_CR_FIFO_RX_RESET 0x02 |
| #define | XUL_CR_FIFO_TX_RESET 0x01 |
| #define | XUL_SR_PARITY_ERROR 0x80 |
| #define | XUL_SR_FRAMING_ERROR 0x40 |
| #define | XUL_SR_OVERRUN_ERROR 0x20 |
| #define | XUL_SR_INTR_ENABLED 0x10 |
| #define | XUL_SR_TX_FIFO_FULL 0x08 |
| #define | XUL_SR_TX_FIFO_EMPTY 0x04 |
| #define | XUL_SR_RX_FIFO_FULL 0x02 |
| #define | XUL_SR_RX_FIFO_VALID_DATA 0x01 |
| #define | XUL_FIFO_SIZE 16 |
| #define | XUL_STOP_BITS 1 |
| #define | XUL_PARITY_NONE 0 |
| #define | XUL_PARITY_ODD 1 |
| #define | XUL_PARITY_EVEN 2 |
| #define | XUartLite_In32 Xil_In32 |
| #define | XUartLite_Out32 Xil_Out32 |
| #define | XUartLite_WriteReg(BaseAddress, RegOffset, Data) |
| #define | XUartLite_ReadReg(BaseAddress, RegOffset) |
| #define | XUartLite_SetControlReg(BaseAddress, Mask) |
| #define | XUartLite_GetStatusReg(BaseAddress) |
| #define | XUartLite_IsReceiveEmpty(BaseAddress) |
| #define | XUartLite_IsTransmitFull(BaseAddress) |
| #define | XUartLite_IsIntrEnabled(BaseAddress) |
| #define | XUartLite_EnableIntr(BaseAddress) |
| #define | XUartLite_DisableIntr(BaseAddress) |
Functions | |
| void | XUartLite_SendByte (UINTPTR BaseAddress, u8 Data) |
| u8 | XUartLite_RecvByte (UINTPTR BaseAddress) |
This header file contains identifiers and low-level driver functions (or macros) that can be used to access the device. High-level driver functions are defined in xuartlite.h.
MODIFICATION HISTORY:
Ver Who Date Changes
----- ---- -------- -------------------------------------------------------
1.00b rpm 04/25/02 First release
1.00b rpm 07/07/03 Removed references to XUartLite_GetControlReg macro
since the control register is write-only
1.12a mta 03/21/07 Updated to new coding style
1.13a sv 01/21/08 Updated driver to support access through DCR bus
2.00a ktn 10/20/09 Updated to use HAL Processor APIs. The macros have been
renamed to remove _m from the name.
3.2 sk 11/10/15 Used UINTPTR instead of u32 for Baseaddress CR# 867425.
Changed the prototypes of XUartLite_SendByte,
XUartLite_RecvByte APIs.
This file contains low-level driver functions that can be used to access the device. The user should refer to the hardware device specification for more details of the device operation.
MODIFICATION HISTORY:
Ver Who Date Changes
----- ---- -------- -----------------------------------------------
1.00b rpm 04/25/02 First release
1.12a rpm 07/16/07 Fixed arg type for RecvByte
2.00a ktn 10/20/09 The macros have been renamed to remove _m from the name.
3.2 sk 11/10/15 Used UINTPTR instead of u32 for Baseaddress CR# 867425.
Changed the prototypes of XUartLite_SendByte,
XUartLite_RecvByte APIs.
| #define XUartLite_DisableIntr | ( | BaseAddress | ) |
Disable the device interrupt. We cannot read the control register, so we just clear all bits. Since the only other ones are the FIFO reset bits, this works without side effects.
| BaseAddress | is the base address of the device |
| #define XUartLite_EnableIntr | ( | BaseAddress | ) |
Enable the device interrupt. We cannot read the control register, so we just write the enable interrupt bit and clear all others. Since the only other ones are the FIFO reset bits, this works without side effects.
| BaseAddress | is the base address of the device |
| #define XUartLite_GetStatusReg | ( | BaseAddress | ) |
Get the contents of the status register. Use the XUL_SR_* constants defined above to interpret the bit-mask returned.
| BaseAddress | is the base address of the device |
| #define XUartLite_IsIntrEnabled | ( | BaseAddress | ) |
Check to see if the interrupt is enabled.
| BaseAddress | is the base address of the device |
| #define XUartLite_IsReceiveEmpty | ( | BaseAddress | ) |
Check to see if the receiver has data.
| BaseAddress | is the base address of the device |
| #define XUartLite_IsTransmitFull | ( | BaseAddress | ) |
Check to see if the transmitter is full.
| BaseAddress | is the base address of the device |
| #define XUartLite_ReadReg | ( | BaseAddress, | |
| RegOffset ) |
Read a value from a UartLite register. A 32 bit read is performed.
| BaseAddress | is the base address of the UartLite device. |
| RegOffset | is the register offset from the base to read from. |
| #define XUartLite_SetControlReg | ( | BaseAddress, | |
| Mask ) |
Set the contents of the control register. Use the XUL_CR_* constants defined above to create the bit-mask to be written to the register.
| BaseAddress | is the base address of the device |
| Mask | is the 32-bit value to write to the control register |
| #define XUartLite_WriteReg | ( | BaseAddress, | |
| RegOffset, | |||
| Data ) |
Write a value to a UartLite register. A 32 bit write is performed.
| BaseAddress | is the base address of the UartLite device. |
| RegOffset | is the register offset from the base to write to. |
| Data | is the data written to the register. |
| u8 XUartLite_RecvByte | ( | UINTPTR | BaseAddress | ) |
This functions receives a single byte using the UART. It is blocking in that it waits for the receiver to become non-empty before it reads from the receive register.
| BaseAddress | is the base address of the device |
| void XUartLite_SendByte | ( | UINTPTR | BaseAddress, |
| u8 | Data ) |
This functions sends a single byte using the UART. It is blocking in that it waits for the transmitter to become non-full before it writes the byte to the transmit register.
| BaseAddress | is the base address of the device |
| Data | is the byte of data to send |