QSPI Exported Constants

Macros
#define	QSPI_INSTANCES_NUMBER   1U
#define	BSP_QSPI_SPI_MODE   (BSP_QSPI_Interface_t)MT25TL01G_SPI_MODE
#define	BSP_QSPI_SPI_1I2O_MODE   (BSP_QSPI_Interface_t)MT25TL01G_SPI_1I2O_MODE
#define	BSP_QSPI_SPI_2IO_MODE   (BSP_QSPI_Interface_t)MT25TL01G_SPI_2IO_MODE
#define	BSP_QSPI_SPI_1I4O_MODE   (BSP_QSPI_Interface_t)MT25TL01G_SPI_1I4O_MODE
#define	BSP_QSPI_SPI_4IO_MODE   (BSP_QSPI_Interface_t)MT25TL01G_SPI_4IO_MODE
#define	BSP_QSPI_DPI_MODE   (BSP_QSPI_Interface_t)MT25TL01G_DPI_MODE
#define	BSP_QSPI_QPI_MODE   (BSP_QSPI_Interface_t)MT25TL01G_QPI_MODE
#define	BSP_QSPI_STR_TRANSFER   (BSP_QSPI_Transfer_t)MT25TL01G_STR_TRANSFER
#define	BSP_QSPI_DTR_TRANSFER   (BSP_QSPI_Transfer_t)MT25TL01G_DTR_TRANSFER
#define	BSP_QSPI_DUALFLASH_DISABLE   (BSP_QSPI_DualFlash_t)MT25TL01G_DUALFLASH_DISABLE
#define	BSP_QSPI_FLASH_ID   QSPI_FLASH_ID_1
#define	BSP_QSPI_BLOCK_8K   MT25TL01G_SECTOR_4K
#define	BSP_QSPI_BLOCK_64K   MT25TL01G_BLOCK_32K
#define	BSP_QSPI_BLOCK_128K   MT25TL01G_BLOCK_64K
#define	QSPI_CLK_ENABLE()
#define	QSPI_CLK_DISABLE()
#define	QSPI_CLK_GPIO_CLK_ENABLE()
#define	QSPI_BK1_CS_GPIO_CLK_ENABLE()
#define	QSPI_BK1_D0_GPIO_CLK_ENABLE()
#define	QSPI_BK1_D1_GPIO_CLK_ENABLE()
#define	QSPI_BK1_D2_GPIO_CLK_ENABLE()
#define	QSPI_BK1_D3_GPIO_CLK_ENABLE()
#define	QSPI_BK2_CS_GPIO_CLK_ENABLE()
#define	QSPI_BK2_D0_GPIO_CLK_ENABLE()
#define	QSPI_BK2_D1_GPIO_CLK_ENABLE()
#define	QSPI_BK2_D2_GPIO_CLK_ENABLE()
#define	QSPI_BK2_D3_GPIO_CLK_ENABLE()
#define	QSPI_FORCE_RESET()
#define	QSPI_RELEASE_RESET()
#define	QSPI_CLK_PIN   GPIO_PIN_2
#define	QSPI_CLK_GPIO_PORT   GPIOB
#define	QSPI_BK1_CS_PIN   GPIO_PIN_6
#define	QSPI_BK1_CS_GPIO_PORT   GPIOG
#define	QSPI_BK1_D0_PIN   GPIO_PIN_8
#define	QSPI_BK1_D0_GPIO_PORT   GPIOF
#define	QSPI_BK1_D1_PIN   GPIO_PIN_9
#define	QSPI_BK1_D1_GPIO_PORT   GPIOF
#define	QSPI_BK1_D2_PIN   GPIO_PIN_7
#define	QSPI_BK1_D2_GPIO_PORT   GPIOF
#define	QSPI_BK1_D3_PIN   GPIO_PIN_6
#define	QSPI_BK1_D3_GPIO_PORT   GPIOF
#define	QSPI_BK2_CS_PIN   GPIO_PIN_11
#define	QSPI_BK2_CS_GPIO_PORT   GPIOC
#define	QSPI_BK2_D0_PIN   GPIO_PIN_2
#define	QSPI_BK2_D0_GPIO_PORT   GPIOH
#define	QSPI_BK2_D1_PIN   GPIO_PIN_3
#define	QSPI_BK2_D1_GPIO_PORT   GPIOH
#define	QSPI_BK2_D2_PIN   GPIO_PIN_9
#define	QSPI_BK2_D2_GPIO_PORT   GPIOG
#define	QSPI_BK2_D3_PIN   GPIO_PIN_14
#define	QSPI_BK2_D3_GPIO_PORT   GPIOG
#define	QSPI_FLASH_SIZE   26
#define	QSPI_PAGE_SIZE   256
#define	QSPI_BASE_ADDRESS   0x90000000

Detailed Description

Macro Definition Documentation

QSPI_BK1_CS_GPIO_CLK_ENABLE

#define QSPI_BK1_CS_GPIO_CLK_ENABLE

(

)

Value:

__HAL_RCC_GPIOG_CLK_ENABLE()

QSPI_BK1_D0_GPIO_CLK_ENABLE

#define QSPI_BK1_D0_GPIO_CLK_ENABLE

(

)

Value:

__HAL_RCC_GPIOF_CLK_ENABLE()

QSPI_BK1_D1_GPIO_CLK_ENABLE

#define QSPI_BK1_D1_GPIO_CLK_ENABLE

(

)

Value:

__HAL_RCC_GPIOF_CLK_ENABLE()

QSPI_BK1_D2_GPIO_CLK_ENABLE

#define QSPI_BK1_D2_GPIO_CLK_ENABLE

(

)

Value:

__HAL_RCC_GPIOF_CLK_ENABLE()

QSPI_BK1_D3_GPIO_CLK_ENABLE

#define QSPI_BK1_D3_GPIO_CLK_ENABLE

(

)

Value:

__HAL_RCC_GPIOF_CLK_ENABLE()

QSPI_BK2_CS_GPIO_CLK_ENABLE

#define QSPI_BK2_CS_GPIO_CLK_ENABLE

(

)

Value:

__HAL_RCC_GPIOC_CLK_ENABLE()

QSPI_BK2_D0_GPIO_CLK_ENABLE

#define QSPI_BK2_D0_GPIO_CLK_ENABLE

(

)

Value:

__HAL_RCC_GPIOH_CLK_ENABLE()

QSPI_BK2_D1_GPIO_CLK_ENABLE

#define QSPI_BK2_D1_GPIO_CLK_ENABLE

(

)

Value:

__HAL_RCC_GPIOH_CLK_ENABLE()

QSPI_BK2_D2_GPIO_CLK_ENABLE

#define QSPI_BK2_D2_GPIO_CLK_ENABLE

(

)

Value:

__HAL_RCC_GPIOG_CLK_ENABLE()

QSPI_BK2_D3_GPIO_CLK_ENABLE

#define QSPI_BK2_D3_GPIO_CLK_ENABLE

(

)

Value:

__HAL_RCC_GPIOG_CLK_ENABLE()

QSPI_CLK_DISABLE

#define QSPI_CLK_DISABLE

(

)

Value:

__HAL_RCC_QSPI_CLK_DISABLE()

QSPI_CLK_ENABLE

#define QSPI_CLK_ENABLE

(

)

Value:

__HAL_RCC_QSPI_CLK_ENABLE()

QSPI_CLK_GPIO_CLK_ENABLE

#define QSPI_CLK_GPIO_CLK_ENABLE

(

)

Value:

__HAL_RCC_GPIOB_CLK_ENABLE()

QSPI_FORCE_RESET

#define QSPI_FORCE_RESET

(

)

Value:

__HAL_RCC_QSPI_FORCE_RESET()

QSPI_RELEASE_RESET

#define QSPI_RELEASE_RESET

(

)

Value:

__HAL_RCC_QSPI_RELEASE_RESET()