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RTEMS 6.3
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SRAM0 - Description Address Register | |
| #define | SSARC_HP_SRAM0_ADDR_MASK (0xFFFFFFFFU) |
| #define | SSARC_HP_SRAM0_ADDR_SHIFT (0U) |
| #define | SSARC_HP_SRAM0_ADDR(x) |
| #define | SSARC_HP_SRAM0_ADDR_MASK (0xFFFFFFFFU) |
| #define | SSARC_HP_SRAM0_ADDR_SHIFT (0U) |
| #define | SSARC_HP_SRAM0_ADDR(x) |
SRAM1 - Description Data Register | |
| #define | SSARC_HP_SRAM1_DATA_MASK (0xFFFFFFFFU) |
| #define | SSARC_HP_SRAM1_DATA_SHIFT (0U) |
| #define | SSARC_HP_SRAM1_DATA(x) |
| #define | SSARC_HP_SRAM1_DATA_MASK (0xFFFFFFFFU) |
| #define | SSARC_HP_SRAM1_DATA_SHIFT (0U) |
| #define | SSARC_HP_SRAM1_DATA(x) |
SRAM2 - Description Control Register | |
| #define | SSARC_HP_SRAM2_TYPE_MASK (0x7U) |
| #define | SSARC_HP_SRAM2_TYPE_SHIFT (0U) |
| #define | SSARC_HP_SRAM2_TYPE(x) |
| #define | SSARC_HP_SRAM2_SV_EN_MASK (0x10U) |
| #define | SSARC_HP_SRAM2_SV_EN_SHIFT (4U) |
| #define | SSARC_HP_SRAM2_SV_EN(x) |
| #define | SSARC_HP_SRAM2_RT_EN_MASK (0x20U) |
| #define | SSARC_HP_SRAM2_RT_EN_SHIFT (5U) |
| #define | SSARC_HP_SRAM2_RT_EN(x) |
| #define | SSARC_HP_SRAM2_SIZE_MASK (0xC0U) |
| #define | SSARC_HP_SRAM2_SIZE_SHIFT (6U) |
| #define | SSARC_HP_SRAM2_SIZE(x) |
| #define | SSARC_HP_SRAM2_TYPE_MASK (0x7U) |
| #define | SSARC_HP_SRAM2_TYPE_SHIFT (0U) |
| #define | SSARC_HP_SRAM2_TYPE(x) |
| #define | SSARC_HP_SRAM2_SV_EN_MASK (0x10U) |
| #define | SSARC_HP_SRAM2_SV_EN_SHIFT (4U) |
| #define | SSARC_HP_SRAM2_SV_EN(x) |
| #define | SSARC_HP_SRAM2_RT_EN_MASK (0x20U) |
| #define | SSARC_HP_SRAM2_RT_EN_SHIFT (5U) |
| #define | SSARC_HP_SRAM2_RT_EN(x) |
| #define | SSARC_HP_SRAM2_SIZE_MASK (0xC0U) |
| #define | SSARC_HP_SRAM2_SIZE_SHIFT (6U) |
| #define | SSARC_HP_SRAM2_SIZE(x) |
| #define SSARC_HP_SRAM0_ADDR | ( | x | ) |
ADDR - Address field
| #define SSARC_HP_SRAM0_ADDR | ( | x | ) |
ADDR - Address field
| #define SSARC_HP_SRAM1_DATA | ( | x | ) |
DATA - Data field
| #define SSARC_HP_SRAM1_DATA | ( | x | ) |
DATA - Data field
| #define SSARC_HP_SRAM2_RT_EN | ( | x | ) |
RT_EN - Restore Enable 0b0..Do not use this descriptor for the restore operation 0b1..Use this descriptor for the restore operation
| #define SSARC_HP_SRAM2_RT_EN | ( | x | ) |
RT_EN - Restore Enable 0b0..Do not use this descriptor for the restore operation 0b1..Use this descriptor for the restore operation
| #define SSARC_HP_SRAM2_SIZE | ( | x | ) |
SIZE - Size field 0b00..8-bit 0b01..16-bit 0b10..32-bit 0b11..Reserved
| #define SSARC_HP_SRAM2_SIZE | ( | x | ) |
SIZE - Size field 0b00..8-bit 0b01..16-bit 0b10..32-bit 0b11..Reserved
| #define SSARC_HP_SRAM2_SV_EN | ( | x | ) |
SV_EN - Save Enable 0b0..Do not use this descriptor in the save operation 0b1..Use this descriptor in the save operation
| #define SSARC_HP_SRAM2_SV_EN | ( | x | ) |
SV_EN - Save Enable 0b0..Do not use this descriptor in the save operation 0b1..Use this descriptor in the save operation
| #define SSARC_HP_SRAM2_TYPE | ( | x | ) |
TYPE - Type field 0b000..SR 0b001..WO 0b010..RMW_OR 0b011..RMW_AND 0b100..DELAY 0b101..POLLING_0 0b110..POLLING_1 0b111..Reserved
| #define SSARC_HP_SRAM2_TYPE | ( | x | ) |
TYPE - Type field 0b000..SR 0b001..WO 0b010..RMW_OR 0b011..RMW_AND 0b100..DELAY 0b101..POLLING_0 0b110..POLLING_1 0b111..Reserved