![]() |
RTEMS 6.3
|
This group contains register bit definitions. More...
Macros | |
| #define | L2CACHE_L2CMTRR_ADDR_SHIFT 18 |
| #define | L2CACHE_L2CMTRR_ADDR_MASK 0xfffc0000U |
| #define | L2CACHE_L2CMTRR_ADDR_GET(_reg) |
| #define | L2CACHE_L2CMTRR_ADDR_SET(_reg, _val) |
| #define | L2CACHE_L2CMTRR_ADDR(_val) |
| #define | L2CACHE_L2CMTRR_ACC_SHIFT 16 |
| #define | L2CACHE_L2CMTRR_ACC_MASK 0x30000U |
| #define | L2CACHE_L2CMTRR_ACC_GET(_reg) |
| #define | L2CACHE_L2CMTRR_ACC_SET(_reg, _val) |
| #define | L2CACHE_L2CMTRR_ACC(_val) |
| #define | L2CACHE_L2CMTRR_MASK_SHIFT 2 |
| #define | L2CACHE_L2CMTRR_MASK_MASK 0xfffcU |
| #define | L2CACHE_L2CMTRR_MASK_GET(_reg) |
| #define | L2CACHE_L2CMTRR_MASK_SET(_reg, _val) |
| #define | L2CACHE_L2CMTRR_MASK(_val) |
| #define | L2CACHE_L2CMTRR_WP 0x2U |
| #define | L2CACHE_L2CMTRR_AC 0x1U |
This group contains register bit definitions.
| #define L2CACHE_L2CMTRR_ACC | ( | _val | ) |
| #define L2CACHE_L2CMTRR_ACC_GET | ( | _reg | ) |
| #define L2CACHE_L2CMTRR_ACC_SET | ( | _reg, | |
| _val ) |
| #define L2CACHE_L2CMTRR_ADDR | ( | _val | ) |
| #define L2CACHE_L2CMTRR_ADDR_GET | ( | _reg | ) |
| #define L2CACHE_L2CMTRR_ADDR_SET | ( | _reg, | |
| _val ) |
| #define L2CACHE_L2CMTRR_MASK | ( | _val | ) |
| #define L2CACHE_L2CMTRR_MASK_GET | ( | _reg | ) |
| #define L2CACHE_L2CMTRR_MASK_SET | ( | _reg, | |
| _val ) |