RTEMS 6.3
Loading...
Searching...
No Matches
Interrupt mask register (IMASK)

This group contains register bit definitions. More...

Macros

#define GRGPIO_IMASK_MASK_SHIFT   0
#define GRGPIO_IMASK_MASK_MASK   0xffffffffU
#define GRGPIO_IMASK_MASK_GET(_reg)
#define GRGPIO_IMASK_MASK_SET(_reg, _val)
#define GRGPIO_IMASK_MASK(_val)

Detailed Description

This group contains register bit definitions.

Macro Definition Documentation

◆ GRGPIO_IMASK_MASK

#define GRGPIO_IMASK_MASK ( _val)
Value:
( ( ( _val ) << GRGPIO_IMASK_MASK_SHIFT ) & \
GRGPIO_IMASK_MASK_MASK )

◆ GRGPIO_IMASK_MASK_GET

#define GRGPIO_IMASK_MASK_GET ( _reg)
Value:
( ( ( _reg ) & GRGPIO_IMASK_MASK_MASK ) >> \
GRGPIO_IMASK_MASK_SHIFT )

◆ GRGPIO_IMASK_MASK_SET

#define GRGPIO_IMASK_MASK_SET ( _reg,
_val )
Value:
( ( ( _reg ) & ~GRGPIO_IMASK_MASK_MASK ) | \
( ( ( _val ) << GRGPIO_IMASK_MASK_SHIFT ) & \
GRGPIO_IMASK_MASK_MASK ) )