Receive Channel Write Register (CanRxWR)

This group contains register bit definitions. More...

Macros
#define	GRCAN_CANRXWR_WRITE_SHIFT   4
#define	GRCAN_CANRXWR_WRITE_MASK   0xffff0U
#define	GRCAN_CANRXWR_WRITE_GET(_reg)
#define	GRCAN_CANRXWR_WRITE_SET(_reg, _val)
#define	GRCAN_CANRXWR_WRITE(_val)

Detailed Description

This group contains register bit definitions.

Macro Definition Documentation

GRCAN_CANRXWR_WRITE

#define GRCAN_CANRXWR_WRITE

(

_val

)

Value:

( ( ( _val ) << GRCAN_CANRXWR_WRITE_SHIFT ) & \
  GRCAN_CANRXWR_WRITE_MASK )

GRCAN_CANRXWR_WRITE_GET

#define GRCAN_CANRXWR_WRITE_GET

(

_reg

)

Value:

( ( ( _reg ) & GRCAN_CANRXWR_WRITE_MASK ) >> \
  GRCAN_CANRXWR_WRITE_SHIFT )

GRCAN_CANRXWR_WRITE_SET

#define GRCAN_CANRXWR_WRITE_SET	(		_reg,
			_val )

Value:

( ( ( _reg ) & ~GRCAN_CANRXWR_WRITE_MASK ) | \
  ( ( ( _val ) << GRCAN_CANRXWR_WRITE_SHIFT ) & \
    GRCAN_CANRXWR_WRITE_MASK ) )