PLL current configuration register (PLLCURCFG)

This group contains register bit definitions. More...

Macros
#define	GR740_IOPLL_PLLCURCFG_SWTAG_SHIFT   27
#define	GR740_IOPLL_PLLCURCFG_SWTAG_MASK   0x18000000U
#define	GR740_IOPLL_PLLCURCFG_SWTAG_GET(_reg)
#define	GR740_IOPLL_PLLCURCFG_SWTAG_SET(_reg, _val)
#define	GR740_IOPLL_PLLCURCFG_SWTAG(_val)
#define	GR740_IOPLL_PLLCURCFG_SPWPLLCFG_SHIFT   18
#define	GR740_IOPLL_PLLCURCFG_SPWPLLCFG_MASK   0x7fc0000U
#define	GR740_IOPLL_PLLCURCFG_SPWPLLCFG_GET(_reg)
#define	GR740_IOPLL_PLLCURCFG_SPWPLLCFG_SET(_reg, _val)
#define	GR740_IOPLL_PLLCURCFG_SPWPLLCFG(_val)
#define	GR740_IOPLL_PLLCURCFG_MEMPLLCFG_SHIFT   9
#define	GR740_IOPLL_PLLCURCFG_MEMPLLCFG_MASK   0x3fe00U
#define	GR740_IOPLL_PLLCURCFG_MEMPLLCFG_GET(_reg)
#define	GR740_IOPLL_PLLCURCFG_MEMPLLCFG_SET(_reg, _val)
#define	GR740_IOPLL_PLLCURCFG_MEMPLLCFG(_val)
#define	GR740_IOPLL_PLLCURCFG_SYSPLLCFG_SHIFT   0
#define	GR740_IOPLL_PLLCURCFG_SYSPLLCFG_MASK   0x1ffU
#define	GR740_IOPLL_PLLCURCFG_SYSPLLCFG_GET(_reg)
#define	GR740_IOPLL_PLLCURCFG_SYSPLLCFG_SET(_reg, _val)
#define	GR740_IOPLL_PLLCURCFG_SYSPLLCFG(_val)

Detailed Description

This group contains register bit definitions.

Macro Definition Documentation

GR740_IOPLL_PLLCURCFG_MEMPLLCFG

#define GR740_IOPLL_PLLCURCFG_MEMPLLCFG

(

_val

)

Value:

( ( ( _val ) << GR740_IOPLL_PLLCURCFG_MEMPLLCFG_SHIFT ) & \
  GR740_IOPLL_PLLCURCFG_MEMPLLCFG_MASK )

GR740_IOPLL_PLLCURCFG_MEMPLLCFG_GET

#define GR740_IOPLL_PLLCURCFG_MEMPLLCFG_GET

(

_reg

)

Value:

( ( ( _reg ) & GR740_IOPLL_PLLCURCFG_MEMPLLCFG_MASK ) >> \
  GR740_IOPLL_PLLCURCFG_MEMPLLCFG_SHIFT )

GR740_IOPLL_PLLCURCFG_MEMPLLCFG_SET

#define GR740_IOPLL_PLLCURCFG_MEMPLLCFG_SET	(		_reg,
			_val )

Value:

( ( ( _reg ) & ~GR740_IOPLL_PLLCURCFG_MEMPLLCFG_MASK ) | \
  ( ( ( _val ) << GR740_IOPLL_PLLCURCFG_MEMPLLCFG_SHIFT ) & \
    GR740_IOPLL_PLLCURCFG_MEMPLLCFG_MASK ) )

GR740_IOPLL_PLLCURCFG_SPWPLLCFG

#define GR740_IOPLL_PLLCURCFG_SPWPLLCFG

(

_val

)

Value:

( ( ( _val ) << GR740_IOPLL_PLLCURCFG_SPWPLLCFG_SHIFT ) & \
  GR740_IOPLL_PLLCURCFG_SPWPLLCFG_MASK )

GR740_IOPLL_PLLCURCFG_SPWPLLCFG_GET

#define GR740_IOPLL_PLLCURCFG_SPWPLLCFG_GET

(

_reg

)

Value:

( ( ( _reg ) & GR740_IOPLL_PLLCURCFG_SPWPLLCFG_MASK ) >> \
  GR740_IOPLL_PLLCURCFG_SPWPLLCFG_SHIFT )

GR740_IOPLL_PLLCURCFG_SPWPLLCFG_SET

#define GR740_IOPLL_PLLCURCFG_SPWPLLCFG_SET	(		_reg,
			_val )

Value:

( ( ( _reg ) & ~GR740_IOPLL_PLLCURCFG_SPWPLLCFG_MASK ) | \
  ( ( ( _val ) << GR740_IOPLL_PLLCURCFG_SPWPLLCFG_SHIFT ) & \
    GR740_IOPLL_PLLCURCFG_SPWPLLCFG_MASK ) )

GR740_IOPLL_PLLCURCFG_SWTAG

#define GR740_IOPLL_PLLCURCFG_SWTAG

(

_val

)

Value:

( ( ( _val ) << GR740_IOPLL_PLLCURCFG_SWTAG_SHIFT ) & \
  GR740_IOPLL_PLLCURCFG_SWTAG_MASK )

GR740_IOPLL_PLLCURCFG_SWTAG_GET

#define GR740_IOPLL_PLLCURCFG_SWTAG_GET

(

_reg

)

Value:

( ( ( _reg ) & GR740_IOPLL_PLLCURCFG_SWTAG_MASK ) >> \
  GR740_IOPLL_PLLCURCFG_SWTAG_SHIFT )

GR740_IOPLL_PLLCURCFG_SWTAG_SET

#define GR740_IOPLL_PLLCURCFG_SWTAG_SET	(		_reg,
			_val )

Value:

( ( ( _reg ) & ~GR740_IOPLL_PLLCURCFG_SWTAG_MASK ) | \
  ( ( ( _val ) << GR740_IOPLL_PLLCURCFG_SWTAG_SHIFT ) & \
    GR740_IOPLL_PLLCURCFG_SWTAG_MASK ) )

GR740_IOPLL_PLLCURCFG_SYSPLLCFG

#define GR740_IOPLL_PLLCURCFG_SYSPLLCFG

(

_val

)

Value:

( ( ( _val ) << GR740_IOPLL_PLLCURCFG_SYSPLLCFG_SHIFT ) & \
  GR740_IOPLL_PLLCURCFG_SYSPLLCFG_MASK )

GR740_IOPLL_PLLCURCFG_SYSPLLCFG_GET

#define GR740_IOPLL_PLLCURCFG_SYSPLLCFG_GET

(

_reg

)

Value:

( ( ( _reg ) & GR740_IOPLL_PLLCURCFG_SYSPLLCFG_MASK ) >> \
  GR740_IOPLL_PLLCURCFG_SYSPLLCFG_SHIFT )

GR740_IOPLL_PLLCURCFG_SYSPLLCFG_SET

#define GR740_IOPLL_PLLCURCFG_SYSPLLCFG_SET	(		_reg,
			_val )

Value:

( ( ( _reg ) & ~GR740_IOPLL_PLLCURCFG_SYSPLLCFG_MASK ) | \
  ( ( ( _val ) << GR740_IOPLL_PLLCURCFG_SYSPLLCFG_SHIFT ) & \
    GR740_IOPLL_PLLCURCFG_SYSPLLCFG_MASK ) )