RTEMS 6.3
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Drive strength configuration register 2 (DRVSTR2)

This group contains register bit definitions. More...

Macros

#define GR740_IOPLL_DRVSTR2_S19_SHIFT   18
#define GR740_IOPLL_DRVSTR2_S19_MASK   0xc0000U
#define GR740_IOPLL_DRVSTR2_S19_GET(_reg)
#define GR740_IOPLL_DRVSTR2_S19_SET(_reg, _val)
#define GR740_IOPLL_DRVSTR2_S19(_val)
#define GR740_IOPLL_DRVSTR2_S18_SHIFT   16
#define GR740_IOPLL_DRVSTR2_S18_MASK   0x30000U
#define GR740_IOPLL_DRVSTR2_S18_GET(_reg)
#define GR740_IOPLL_DRVSTR2_S18_SET(_reg, _val)
#define GR740_IOPLL_DRVSTR2_S18(_val)
#define GR740_IOPLL_DRVSTR2_S17_SHIFT   14
#define GR740_IOPLL_DRVSTR2_S17_MASK   0xc000U
#define GR740_IOPLL_DRVSTR2_S17_GET(_reg)
#define GR740_IOPLL_DRVSTR2_S17_SET(_reg, _val)
#define GR740_IOPLL_DRVSTR2_S17(_val)
#define GR740_IOPLL_DRVSTR2_S16_SHIFT   12
#define GR740_IOPLL_DRVSTR2_S16_MASK   0x3000U
#define GR740_IOPLL_DRVSTR2_S16_GET(_reg)
#define GR740_IOPLL_DRVSTR2_S16_SET(_reg, _val)
#define GR740_IOPLL_DRVSTR2_S16(_val)
#define GR740_IOPLL_DRVSTR2_S15_SHIFT   10
#define GR740_IOPLL_DRVSTR2_S15_MASK   0xc00U
#define GR740_IOPLL_DRVSTR2_S15_GET(_reg)
#define GR740_IOPLL_DRVSTR2_S15_SET(_reg, _val)
#define GR740_IOPLL_DRVSTR2_S15(_val)
#define GR740_IOPLL_DRVSTR2_S14_SHIFT   8
#define GR740_IOPLL_DRVSTR2_S14_MASK   0x300U
#define GR740_IOPLL_DRVSTR2_S14_GET(_reg)
#define GR740_IOPLL_DRVSTR2_S14_SET(_reg, _val)
#define GR740_IOPLL_DRVSTR2_S14(_val)
#define GR740_IOPLL_DRVSTR2_S13_SHIFT   6
#define GR740_IOPLL_DRVSTR2_S13_MASK   0xc0U
#define GR740_IOPLL_DRVSTR2_S13_GET(_reg)
#define GR740_IOPLL_DRVSTR2_S13_SET(_reg, _val)
#define GR740_IOPLL_DRVSTR2_S13(_val)
#define GR740_IOPLL_DRVSTR2_S12_SHIFT   4
#define GR740_IOPLL_DRVSTR2_S12_MASK   0x30U
#define GR740_IOPLL_DRVSTR2_S12_GET(_reg)
#define GR740_IOPLL_DRVSTR2_S12_SET(_reg, _val)
#define GR740_IOPLL_DRVSTR2_S12(_val)
#define GR740_IOPLL_DRVSTR2_S11_SHIFT   2
#define GR740_IOPLL_DRVSTR2_S11_MASK   0xcU
#define GR740_IOPLL_DRVSTR2_S11_GET(_reg)
#define GR740_IOPLL_DRVSTR2_S11_SET(_reg, _val)
#define GR740_IOPLL_DRVSTR2_S11(_val)
#define GR740_IOPLL_DRVSTR2_S10_SHIFT   0
#define GR740_IOPLL_DRVSTR2_S10_MASK   0x3U
#define GR740_IOPLL_DRVSTR2_S10_GET(_reg)
#define GR740_IOPLL_DRVSTR2_S10_SET(_reg, _val)
#define GR740_IOPLL_DRVSTR2_S10(_val)

Detailed Description

This group contains register bit definitions.

Macro Definition Documentation

◆ GR740_IOPLL_DRVSTR2_S10

#define GR740_IOPLL_DRVSTR2_S10 ( _val)
Value:
( ( ( _val ) << GR740_IOPLL_DRVSTR2_S10_SHIFT ) & \
GR740_IOPLL_DRVSTR2_S10_MASK )

◆ GR740_IOPLL_DRVSTR2_S10_GET

#define GR740_IOPLL_DRVSTR2_S10_GET ( _reg)
Value:
( ( ( _reg ) & GR740_IOPLL_DRVSTR2_S10_MASK ) >> \
GR740_IOPLL_DRVSTR2_S10_SHIFT )

◆ GR740_IOPLL_DRVSTR2_S10_SET

#define GR740_IOPLL_DRVSTR2_S10_SET ( _reg,
_val )
Value:
( ( ( _reg ) & ~GR740_IOPLL_DRVSTR2_S10_MASK ) | \
( ( ( _val ) << GR740_IOPLL_DRVSTR2_S10_SHIFT ) & \
GR740_IOPLL_DRVSTR2_S10_MASK ) )

◆ GR740_IOPLL_DRVSTR2_S11

#define GR740_IOPLL_DRVSTR2_S11 ( _val)
Value:
( ( ( _val ) << GR740_IOPLL_DRVSTR2_S11_SHIFT ) & \
GR740_IOPLL_DRVSTR2_S11_MASK )

◆ GR740_IOPLL_DRVSTR2_S11_GET

#define GR740_IOPLL_DRVSTR2_S11_GET ( _reg)
Value:
( ( ( _reg ) & GR740_IOPLL_DRVSTR2_S11_MASK ) >> \
GR740_IOPLL_DRVSTR2_S11_SHIFT )

◆ GR740_IOPLL_DRVSTR2_S11_SET

#define GR740_IOPLL_DRVSTR2_S11_SET ( _reg,
_val )
Value:
( ( ( _reg ) & ~GR740_IOPLL_DRVSTR2_S11_MASK ) | \
( ( ( _val ) << GR740_IOPLL_DRVSTR2_S11_SHIFT ) & \
GR740_IOPLL_DRVSTR2_S11_MASK ) )

◆ GR740_IOPLL_DRVSTR2_S12

#define GR740_IOPLL_DRVSTR2_S12 ( _val)
Value:
( ( ( _val ) << GR740_IOPLL_DRVSTR2_S12_SHIFT ) & \
GR740_IOPLL_DRVSTR2_S12_MASK )

◆ GR740_IOPLL_DRVSTR2_S12_GET

#define GR740_IOPLL_DRVSTR2_S12_GET ( _reg)
Value:
( ( ( _reg ) & GR740_IOPLL_DRVSTR2_S12_MASK ) >> \
GR740_IOPLL_DRVSTR2_S12_SHIFT )

◆ GR740_IOPLL_DRVSTR2_S12_SET

#define GR740_IOPLL_DRVSTR2_S12_SET ( _reg,
_val )
Value:
( ( ( _reg ) & ~GR740_IOPLL_DRVSTR2_S12_MASK ) | \
( ( ( _val ) << GR740_IOPLL_DRVSTR2_S12_SHIFT ) & \
GR740_IOPLL_DRVSTR2_S12_MASK ) )

◆ GR740_IOPLL_DRVSTR2_S13

#define GR740_IOPLL_DRVSTR2_S13 ( _val)
Value:
( ( ( _val ) << GR740_IOPLL_DRVSTR2_S13_SHIFT ) & \
GR740_IOPLL_DRVSTR2_S13_MASK )

◆ GR740_IOPLL_DRVSTR2_S13_GET

#define GR740_IOPLL_DRVSTR2_S13_GET ( _reg)
Value:
( ( ( _reg ) & GR740_IOPLL_DRVSTR2_S13_MASK ) >> \
GR740_IOPLL_DRVSTR2_S13_SHIFT )

◆ GR740_IOPLL_DRVSTR2_S13_SET

#define GR740_IOPLL_DRVSTR2_S13_SET ( _reg,
_val )
Value:
( ( ( _reg ) & ~GR740_IOPLL_DRVSTR2_S13_MASK ) | \
( ( ( _val ) << GR740_IOPLL_DRVSTR2_S13_SHIFT ) & \
GR740_IOPLL_DRVSTR2_S13_MASK ) )

◆ GR740_IOPLL_DRVSTR2_S14

#define GR740_IOPLL_DRVSTR2_S14 ( _val)
Value:
( ( ( _val ) << GR740_IOPLL_DRVSTR2_S14_SHIFT ) & \
GR740_IOPLL_DRVSTR2_S14_MASK )

◆ GR740_IOPLL_DRVSTR2_S14_GET

#define GR740_IOPLL_DRVSTR2_S14_GET ( _reg)
Value:
( ( ( _reg ) & GR740_IOPLL_DRVSTR2_S14_MASK ) >> \
GR740_IOPLL_DRVSTR2_S14_SHIFT )

◆ GR740_IOPLL_DRVSTR2_S14_SET

#define GR740_IOPLL_DRVSTR2_S14_SET ( _reg,
_val )
Value:
( ( ( _reg ) & ~GR740_IOPLL_DRVSTR2_S14_MASK ) | \
( ( ( _val ) << GR740_IOPLL_DRVSTR2_S14_SHIFT ) & \
GR740_IOPLL_DRVSTR2_S14_MASK ) )

◆ GR740_IOPLL_DRVSTR2_S15

#define GR740_IOPLL_DRVSTR2_S15 ( _val)
Value:
( ( ( _val ) << GR740_IOPLL_DRVSTR2_S15_SHIFT ) & \
GR740_IOPLL_DRVSTR2_S15_MASK )

◆ GR740_IOPLL_DRVSTR2_S15_GET

#define GR740_IOPLL_DRVSTR2_S15_GET ( _reg)
Value:
( ( ( _reg ) & GR740_IOPLL_DRVSTR2_S15_MASK ) >> \
GR740_IOPLL_DRVSTR2_S15_SHIFT )

◆ GR740_IOPLL_DRVSTR2_S15_SET

#define GR740_IOPLL_DRVSTR2_S15_SET ( _reg,
_val )
Value:
( ( ( _reg ) & ~GR740_IOPLL_DRVSTR2_S15_MASK ) | \
( ( ( _val ) << GR740_IOPLL_DRVSTR2_S15_SHIFT ) & \
GR740_IOPLL_DRVSTR2_S15_MASK ) )

◆ GR740_IOPLL_DRVSTR2_S16

#define GR740_IOPLL_DRVSTR2_S16 ( _val)
Value:
( ( ( _val ) << GR740_IOPLL_DRVSTR2_S16_SHIFT ) & \
GR740_IOPLL_DRVSTR2_S16_MASK )

◆ GR740_IOPLL_DRVSTR2_S16_GET

#define GR740_IOPLL_DRVSTR2_S16_GET ( _reg)
Value:
( ( ( _reg ) & GR740_IOPLL_DRVSTR2_S16_MASK ) >> \
GR740_IOPLL_DRVSTR2_S16_SHIFT )

◆ GR740_IOPLL_DRVSTR2_S16_SET

#define GR740_IOPLL_DRVSTR2_S16_SET ( _reg,
_val )
Value:
( ( ( _reg ) & ~GR740_IOPLL_DRVSTR2_S16_MASK ) | \
( ( ( _val ) << GR740_IOPLL_DRVSTR2_S16_SHIFT ) & \
GR740_IOPLL_DRVSTR2_S16_MASK ) )

◆ GR740_IOPLL_DRVSTR2_S17

#define GR740_IOPLL_DRVSTR2_S17 ( _val)
Value:
( ( ( _val ) << GR740_IOPLL_DRVSTR2_S17_SHIFT ) & \
GR740_IOPLL_DRVSTR2_S17_MASK )

◆ GR740_IOPLL_DRVSTR2_S17_GET

#define GR740_IOPLL_DRVSTR2_S17_GET ( _reg)
Value:
( ( ( _reg ) & GR740_IOPLL_DRVSTR2_S17_MASK ) >> \
GR740_IOPLL_DRVSTR2_S17_SHIFT )

◆ GR740_IOPLL_DRVSTR2_S17_SET

#define GR740_IOPLL_DRVSTR2_S17_SET ( _reg,
_val )
Value:
( ( ( _reg ) & ~GR740_IOPLL_DRVSTR2_S17_MASK ) | \
( ( ( _val ) << GR740_IOPLL_DRVSTR2_S17_SHIFT ) & \
GR740_IOPLL_DRVSTR2_S17_MASK ) )

◆ GR740_IOPLL_DRVSTR2_S18

#define GR740_IOPLL_DRVSTR2_S18 ( _val)
Value:
( ( ( _val ) << GR740_IOPLL_DRVSTR2_S18_SHIFT ) & \
GR740_IOPLL_DRVSTR2_S18_MASK )

◆ GR740_IOPLL_DRVSTR2_S18_GET

#define GR740_IOPLL_DRVSTR2_S18_GET ( _reg)
Value:
( ( ( _reg ) & GR740_IOPLL_DRVSTR2_S18_MASK ) >> \
GR740_IOPLL_DRVSTR2_S18_SHIFT )

◆ GR740_IOPLL_DRVSTR2_S18_SET

#define GR740_IOPLL_DRVSTR2_S18_SET ( _reg,
_val )
Value:
( ( ( _reg ) & ~GR740_IOPLL_DRVSTR2_S18_MASK ) | \
( ( ( _val ) << GR740_IOPLL_DRVSTR2_S18_SHIFT ) & \
GR740_IOPLL_DRVSTR2_S18_MASK ) )

◆ GR740_IOPLL_DRVSTR2_S19

#define GR740_IOPLL_DRVSTR2_S19 ( _val)
Value:
( ( ( _val ) << GR740_IOPLL_DRVSTR2_S19_SHIFT ) & \
GR740_IOPLL_DRVSTR2_S19_MASK )

◆ GR740_IOPLL_DRVSTR2_S19_GET

#define GR740_IOPLL_DRVSTR2_S19_GET ( _reg)
Value:
( ( ( _reg ) & GR740_IOPLL_DRVSTR2_S19_MASK ) >> \
GR740_IOPLL_DRVSTR2_S19_SHIFT )

◆ GR740_IOPLL_DRVSTR2_S19_SET

#define GR740_IOPLL_DRVSTR2_S19_SET ( _reg,
_val )
Value:
( ( ( _reg ) & ~GR740_IOPLL_DRVSTR2_S19_MASK ) | \
( ( ( _val ) << GR740_IOPLL_DRVSTR2_S19_SHIFT ) & \
GR740_IOPLL_DRVSTR2_S19_MASK ) )