SP_AUTHEN_CTRL - SP Authentication Control
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_USER_MASK (0x1U)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_USER_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_USER(x)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_NONSECURE_MASK (0x2U)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_NONSECURE_SHIFT (1U)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_NONSECURE(x)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_SETTING_MASK (0x10U)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_SETTING_SHIFT (4U)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_SETTING(x)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_WHITE_LIST_MASK (0xF00U)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_WHITE_LIST_SHIFT (8U)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_WHITE_LIST(x)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_LIST_MASK (0x1000U)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_LIST_SHIFT (12U)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_LIST(x)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_CFG_MASK (0x100000U)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_CFG_SHIFT (20U)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_CFG(x)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_USER_MASK (0x1U)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_USER_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_USER(x)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_NONSECURE_MASK (0x2U)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_NONSECURE_SHIFT (1U)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_NONSECURE(x)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_SETTING_MASK (0x10U)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_SETTING_SHIFT (4U)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_SETTING(x)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_WHITE_LIST_MASK (0xF00U)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_WHITE_LIST_SHIFT (8U)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_WHITE_LIST(x)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_LIST_MASK (0x1000U)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_LIST_SHIFT (12U)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_LIST(x)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_CFG_MASK (0x100000U)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_CFG_SHIFT (20U)
#define	GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_CFG(x)

SP_INT_CTRL - SP Interrupt Control
#define	GPC_SET_POINT_CTRL_SP_INT_CTRL_NO_ALLOWED_SP_INT_EN_MASK (0x1U)
#define	GPC_SET_POINT_CTRL_SP_INT_CTRL_NO_ALLOWED_SP_INT_EN_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_INT_CTRL_NO_ALLOWED_SP_INT_EN(x)
#define	GPC_SET_POINT_CTRL_SP_INT_CTRL_NO_ALLOWED_SP_INT_MASK (0x2U)
#define	GPC_SET_POINT_CTRL_SP_INT_CTRL_NO_ALLOWED_SP_INT_SHIFT (1U)
#define	GPC_SET_POINT_CTRL_SP_INT_CTRL_NO_ALLOWED_SP_INT(x)
#define	GPC_SET_POINT_CTRL_SP_INT_CTRL_NO_ALLOWED_SP_INT_EN_MASK (0x1U)
#define	GPC_SET_POINT_CTRL_SP_INT_CTRL_NO_ALLOWED_SP_INT_EN_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_INT_CTRL_NO_ALLOWED_SP_INT_EN(x)
#define	GPC_SET_POINT_CTRL_SP_INT_CTRL_NO_ALLOWED_SP_INT_MASK (0x2U)
#define	GPC_SET_POINT_CTRL_SP_INT_CTRL_NO_ALLOWED_SP_INT_SHIFT (1U)
#define	GPC_SET_POINT_CTRL_SP_INT_CTRL_NO_ALLOWED_SP_INT(x)

SP_CPU_REQ - CPU SP Request
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU0_MASK (0xFU)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU0_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU0(x)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU1_MASK (0xF0U)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU1_SHIFT (4U)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU1(x)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU2_MASK (0xF00U)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU2_SHIFT (8U)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU2(x)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU3_MASK (0xF000U)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU3_SHIFT (12U)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU3(x)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU0_MASK (0xF0000U)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU0_SHIFT (16U)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU0(x)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU1_MASK (0xF00000U)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU1_SHIFT (20U)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU1(x)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU2_MASK (0xF000000U)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU2_SHIFT (24U)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU2(x)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU3_MASK (0xF0000000U)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU3_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU3(x)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU0_MASK (0xFU)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU0_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU0(x)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU1_MASK (0xF0U)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU1_SHIFT (4U)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU1(x)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU2_MASK (0xF00U)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU2_SHIFT (8U)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU2(x)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU3_MASK (0xF000U)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU3_SHIFT (12U)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU3(x)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU0_MASK (0xF0000U)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU0_SHIFT (16U)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU0(x)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU1_MASK (0xF00000U)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU1_SHIFT (20U)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU1(x)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU2_MASK (0xF000000U)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU2_SHIFT (24U)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU2(x)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU3_MASK (0xF0000000U)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU3_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU3(x)

SP_SYS_STAT - SP System Status
#define	GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_ALLOWED_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_ALLOWED_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_ALLOWED(x)
#define	GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_TARGET_MASK (0xF0000U)
#define	GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_TARGET_SHIFT (16U)
#define	GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_TARGET(x)
#define	GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_CURRENT_MASK (0xF00000U)
#define	GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_CURRENT_SHIFT (20U)
#define	GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_CURRENT(x)
#define	GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_PREVIOUS_MASK (0xF000000U)
#define	GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_PREVIOUS_SHIFT (24U)
#define	GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_PREVIOUS(x)
#define	GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_ALLOWED_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_ALLOWED_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_ALLOWED(x)
#define	GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_TARGET_MASK (0xF0000U)
#define	GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_TARGET_SHIFT (16U)
#define	GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_TARGET(x)
#define	GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_CURRENT_MASK (0xF00000U)
#define	GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_CURRENT_SHIFT (20U)
#define	GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_CURRENT(x)
#define	GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_PREVIOUS_MASK (0xF000000U)
#define	GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_PREVIOUS_SHIFT (24U)
#define	GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_PREVIOUS(x)

SP_ROSC_CTRL - SP ROSC Control
#define	GPC_SET_POINT_CTRL_SP_ROSC_CTRL_SP_ALLOW_ROSC_OFF_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_ROSC_CTRL_SP_ALLOW_ROSC_OFF_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_ROSC_CTRL_SP_ALLOW_ROSC_OFF(x)
#define	GPC_SET_POINT_CTRL_SP_ROSC_CTRL_SP_ALLOW_ROSC_OFF_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_ROSC_CTRL_SP_ALLOW_ROSC_OFF_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_ROSC_CTRL_SP_ALLOW_ROSC_OFF(x)

SP_PRIORITY_0_7 - SP0~7 Priority
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP0_PRIORITY_MASK (0xFU)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP0_PRIORITY_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP0_PRIORITY(x)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP1_PRIORITY_MASK (0xF0U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP1_PRIORITY_SHIFT (4U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP1_PRIORITY(x)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP2_PRIORITY_MASK (0xF00U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP2_PRIORITY_SHIFT (8U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP2_PRIORITY(x)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP3_PRIORITY_MASK (0xF000U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP3_PRIORITY_SHIFT (12U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP3_PRIORITY(x)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP4_PRIORITY_MASK (0xF0000U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP4_PRIORITY_SHIFT (16U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP4_PRIORITY(x)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP5_PRIORITY_MASK (0xF00000U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP5_PRIORITY_SHIFT (20U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP5_PRIORITY(x)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP6_PRIORITY_MASK (0xF000000U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP6_PRIORITY_SHIFT (24U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP6_PRIORITY(x)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP7_PRIORITY_MASK (0xF0000000U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP7_PRIORITY_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP7_PRIORITY(x)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP0_PRIORITY_MASK (0xFU)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP0_PRIORITY_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP0_PRIORITY(x)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP1_PRIORITY_MASK (0xF0U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP1_PRIORITY_SHIFT (4U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP1_PRIORITY(x)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP2_PRIORITY_MASK (0xF00U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP2_PRIORITY_SHIFT (8U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP2_PRIORITY(x)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP3_PRIORITY_MASK (0xF000U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP3_PRIORITY_SHIFT (12U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP3_PRIORITY(x)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP4_PRIORITY_MASK (0xF0000U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP4_PRIORITY_SHIFT (16U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP4_PRIORITY(x)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP5_PRIORITY_MASK (0xF00000U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP5_PRIORITY_SHIFT (20U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP5_PRIORITY(x)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP6_PRIORITY_MASK (0xF000000U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP6_PRIORITY_SHIFT (24U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP6_PRIORITY(x)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP7_PRIORITY_MASK (0xF0000000U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP7_PRIORITY_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP7_PRIORITY(x)

SP_PRIORITY_8_15 - SP8~15 Priority
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP8_PRIORITY_MASK (0xFU)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP8_PRIORITY_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP8_PRIORITY(x)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP9_PRIORITY_MASK (0xF0U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP9_PRIORITY_SHIFT (4U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP9_PRIORITY(x)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP10_PRIORITY_MASK (0xF00U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP10_PRIORITY_SHIFT (8U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP10_PRIORITY(x)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP11_PRIORITY_MASK (0xF000U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP11_PRIORITY_SHIFT (12U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP11_PRIORITY(x)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP12_PRIORITY_MASK (0xF0000U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP12_PRIORITY_SHIFT (16U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP12_PRIORITY(x)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP13_PRIORITY_MASK (0xF00000U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP13_PRIORITY_SHIFT (20U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP13_PRIORITY(x)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP14_PRIORITY_MASK (0xF000000U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP14_PRIORITY_SHIFT (24U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP14_PRIORITY(x)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP15_PRIORITY_MASK (0xF0000000U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP15_PRIORITY_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP15_PRIORITY(x)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP8_PRIORITY_MASK (0xFU)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP8_PRIORITY_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP8_PRIORITY(x)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP9_PRIORITY_MASK (0xF0U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP9_PRIORITY_SHIFT (4U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP9_PRIORITY(x)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP10_PRIORITY_MASK (0xF00U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP10_PRIORITY_SHIFT (8U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP10_PRIORITY(x)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP11_PRIORITY_MASK (0xF000U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP11_PRIORITY_SHIFT (12U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP11_PRIORITY(x)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP12_PRIORITY_MASK (0xF0000U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP12_PRIORITY_SHIFT (16U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP12_PRIORITY(x)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP13_PRIORITY_MASK (0xF00000U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP13_PRIORITY_SHIFT (20U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP13_PRIORITY(x)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP14_PRIORITY_MASK (0xF000000U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP14_PRIORITY_SHIFT (24U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP14_PRIORITY(x)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP15_PRIORITY_MASK (0xF0000000U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP15_PRIORITY_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP15_PRIORITY(x)

SP_SSAR_SAVE_CTRL - SP SSAR save control
#define	GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_DISABLE(x)
#define	GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_DISABLE(x)

SP_LPCG_OFF_CTRL - SP LPCG off control
#define	GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_DISABLE(x)
#define	GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_DISABLE(x)

SP_GROUP_DOWN_CTRL - SP group down control
#define	GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_DISABLE(x)
#define	GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_DISABLE(x)

SP_ROOT_DOWN_CTRL - SP root down control
#define	GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_DISABLE(x)
#define	GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_DISABLE(x)

SP_PLL_OFF_CTRL - SP PLL off control
#define	GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_DISABLE(x)
#define	GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_DISABLE(x)

SP_ISO_ON_CTRL - SP ISO on control
#define	GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_DISABLE(x)
#define	GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_DISABLE(x)

SP_RESET_EARLY_CTRL - SP reset early control
#define	GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_DISABLE(x)
#define	GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_DISABLE(x)

SP_POWER_OFF_CTRL - SP power off control
#define	GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_DISABLE(x)
#define	GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_DISABLE(x)

SP_BIAS_OFF_CTRL - SP bias off control
#define	GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_DISABLE(x)
#define	GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_DISABLE(x)

SP_BG_PLDO_OFF_CTRL - SP bandgap and PLL_LDO off control
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_DISABLE(x)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_DISABLE(x)

SP_LDO_PRE_CTRL - SP LDO pre control
#define	GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_DISABLE(x)
#define	GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_DISABLE(x)

SP_DCDC_DOWN_CTRL - SP DCDC down control
#define	GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_DISABLE(x)
#define	GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_DISABLE(x)

SP_DCDC_UP_CTRL - SP DCDC up control
#define	GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_DISABLE(x)
#define	GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_DISABLE(x)

SP_LDO_POST_CTRL - SP LDO post control
#define	GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_DISABLE(x)
#define	GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_DISABLE(x)

SP_BG_PLDO_ON_CTRL - SP bandgap and PLL_LDO on control
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_DISABLE(x)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_DISABLE(x)

SP_BIAS_ON_CTRL - SP bias on control
#define	GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_DISABLE(x)
#define	GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_DISABLE(x)

SP_POWER_ON_CTRL - SP power on control
#define	GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_DISABLE(x)
#define	GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_DISABLE(x)

SP_RESET_LATE_CTRL - SP reset late control
#define	GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_DISABLE(x)
#define	GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_DISABLE(x)

SP_ISO_OFF_CTRL - SP ISO off control
#define	GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_DISABLE(x)
#define	GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_DISABLE(x)

SP_PLL_ON_CTRL - SP PLL on control
#define	GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_DISABLE(x)
#define	GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_DISABLE(x)

SP_ROOT_UP_CTRL - SP root up control
#define	GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_DISABLE(x)
#define	GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_DISABLE(x)

SP_GROUP_UP_CTRL - SP group up control
#define	GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_DISABLE(x)
#define	GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_DISABLE(x)

SP_LPCG_ON_CTRL - SP LPCG on control
#define	GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_DISABLE(x)
#define	GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_DISABLE(x)

SP_SSAR_RESTORE_CTRL - SP SSAR restore control
#define	GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_DISABLE(x)
#define	GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_STEP_CNT_MASK (0xFFFFU)
#define	GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_STEP_CNT_SHIFT (0U)
#define	GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_STEP_CNT(x)
#define	GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_CNT_MODE_MASK (0x30000000U)
#define	GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_CNT_MODE_SHIFT (28U)
#define	GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_CNT_MODE(x)
#define	GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_DISABLE_MASK (0x80000000U)
#define	GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_DISABLE_SHIFT (31U)
#define	GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_DISABLE(x)

Detailed Description

Macro Definition Documentation

◆ GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_CFG [1/2]

#define GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_CFG ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_CFG_SHIFT)) & GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_CFG_MASK)

LOCK_CFG - Configuration lock

◆ GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_CFG [2/2]

#define GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_CFG ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_CFG_SHIFT)) & GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_CFG_MASK)

LOCK_CFG - Configuration lock

◆ GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_LIST [1/2]

#define GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_LIST ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_LIST_SHIFT)) & GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_LIST_MASK)

LOCK_LIST - White list lock

◆ GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_LIST [2/2]

#define GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_LIST ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_LIST_SHIFT)) & GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_LIST_MASK)

LOCK_LIST - White list lock

◆ GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_SETTING [1/2]

#define GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_SETTING ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_SETTING_SHIFT)) & GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_SETTING_MASK)

LOCK_SETTING - Lock NONSECURE and USER

◆ GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_SETTING [2/2]

#define GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_SETTING ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_SETTING_SHIFT)) & GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_SETTING_MASK)

LOCK_SETTING - Lock NONSECURE and USER

◆ GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_NONSECURE [1/2]

#define GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_NONSECURE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_NONSECURE_SHIFT)) & GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_NONSECURE_MASK)

NONSECURE - Allow non-secure mode access 0b0..Allow only secure mode to access setpoint control registers 0b1..Allow both secure and non-secure mode to access setpoint control registers

◆ GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_NONSECURE [2/2]

#define GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_NONSECURE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_NONSECURE_SHIFT)) & GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_NONSECURE_MASK)

NONSECURE - Allow non-secure mode access 0b0..Allow only secure mode to access setpoint control registers 0b1..Allow both secure and non-secure mode to access setpoint control registers

◆ GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_USER [1/2]

#define GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_USER ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_USER_SHIFT)) & GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_USER_MASK)

USER - Allow user mode access 0b0..Allow only privilege mode to access setpoint control registers 0b1..Allow both privilege and user mode to access setpoint control registers

◆ GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_USER [2/2]

#define GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_USER ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_USER_SHIFT)) & GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_USER_MASK)

USER - Allow user mode access 0b0..Allow only privilege mode to access setpoint control registers 0b1..Allow both privilege and user mode to access setpoint control registers

◆ GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_WHITE_LIST [1/2]

#define GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_WHITE_LIST ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_WHITE_LIST_SHIFT)) & GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_WHITE_LIST_MASK)

WHITE_LIST - Domain ID white list

◆ GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_WHITE_LIST [2/2]

#define GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_WHITE_LIST ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_WHITE_LIST_SHIFT)) & GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_WHITE_LIST_MASK)

WHITE_LIST - Domain ID white list

◆ GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE [1/2]

#define GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE [2/2]

#define GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_DISABLE [1/2]

#define GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_DISABLE [2/2]

#define GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_STEP_CNT [1/2]

#define GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_STEP_CNT [2/2]

#define GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE [1/2]

#define GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE [2/2]

#define GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_DISABLE [1/2]

#define GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_DISABLE [2/2]

#define GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_STEP_CNT [1/2]

#define GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_STEP_CNT [2/2]

#define GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE [1/2]

#define GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE [2/2]

#define GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_DISABLE [1/2]

#define GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_DISABLE [2/2]

#define GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_STEP_CNT [1/2]

#define GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_STEP_CNT [2/2]

#define GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE [1/2]

#define GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE [2/2]

#define GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_DISABLE [1/2]

#define GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_DISABLE [2/2]

#define GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_STEP_CNT [1/2]

#define GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_STEP_CNT [2/2]

#define GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU0 [1/2]

#define GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU0 ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU0_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU0_MASK)

SP_ACCEPTED_CPU0 - CPU0 Setpoint accepted by SP controller

◆ GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU0 [2/2]

#define GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU0 ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU0_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU0_MASK)

SP_ACCEPTED_CPU0 - CPU0 Setpoint accepted by SP controller

◆ GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU1 [1/2]

#define GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU1 ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU1_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU1_MASK)

SP_ACCEPTED_CPU1 - CPU1 Setpoint accepted by SP controller

◆ GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU1 [2/2]

#define GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU1 ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU1_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU1_MASK)

SP_ACCEPTED_CPU1 - CPU1 Setpoint accepted by SP controller

◆ GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU2 [1/2]

#define GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU2 ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU2_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU2_MASK)

SP_ACCEPTED_CPU2 - CPU2 Setpoint accepted by SP controller

◆ GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU2 [2/2]

#define GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU2 ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU2_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU2_MASK)

SP_ACCEPTED_CPU2 - CPU2 Setpoint accepted by SP controller

◆ GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU3 [1/2]

#define GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU3 ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU3_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU3_MASK)

SP_ACCEPTED_CPU3 - CPU3 Setpoint accepted by SP controller

◆ GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU3 [2/2]

#define GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU3 ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU3_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU3_MASK)

SP_ACCEPTED_CPU3 - CPU3 Setpoint accepted by SP controller

◆ GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU0 [1/2]

#define GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU0 ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU0_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU0_MASK)

SP_REQ_CPU0 - Setpoint requested by CPU0

◆ GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU0 [2/2]

#define GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU0 ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU0_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU0_MASK)

SP_REQ_CPU0 - Setpoint requested by CPU0

◆ GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU1 [1/2]

#define GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU1 ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU1_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU1_MASK)

SP_REQ_CPU1 - Setpoint requested by CPU1

◆ GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU1 [2/2]

#define GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU1 ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU1_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU1_MASK)

SP_REQ_CPU1 - Setpoint requested by CPU1

◆ GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU2 [1/2]

#define GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU2 ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU2_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU2_MASK)

SP_REQ_CPU2 - Setpoint requested by CPU2

◆ GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU2 [2/2]

#define GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU2 ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU2_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU2_MASK)

SP_REQ_CPU2 - Setpoint requested by CPU2

◆ GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU3 [1/2]

#define GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU3 ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU3_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU3_MASK)

SP_REQ_CPU3 - Setpoint requested by CPU3

◆ GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU3 [2/2]

#define GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU3 ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU3_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU3_MASK)

SP_REQ_CPU3 - Setpoint requested by CPU3

◆ GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_CNT_MODE [1/2]

#define GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_CNT_MODE [2/2]

#define GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_DISABLE [1/2]

#define GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_DISABLE [2/2]

#define GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_STEP_CNT [1/2]

#define GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_STEP_CNT [2/2]

#define GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_CNT_MODE [1/2]

#define GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_CNT_MODE [2/2]

#define GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_DISABLE [1/2]

#define GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_DISABLE [2/2]

#define GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_STEP_CNT [1/2]

#define GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_STEP_CNT [2/2]

#define GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_CNT_MODE [1/2]

#define GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_CNT_MODE [2/2]

#define GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_DISABLE [1/2]

#define GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_DISABLE [2/2]

#define GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_STEP_CNT [1/2]

#define GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_STEP_CNT [2/2]

#define GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_CNT_MODE [1/2]

#define GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_CNT_MODE [2/2]

#define GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_DISABLE [1/2]

#define GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_DISABLE [2/2]

#define GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_STEP_CNT [1/2]

#define GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_STEP_CNT [2/2]

#define GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_INT_CTRL_NO_ALLOWED_SP_INT [1/2]

#define GPC_SET_POINT_CTRL_SP_INT_CTRL_NO_ALLOWED_SP_INT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_INT_CTRL_NO_ALLOWED_SP_INT_SHIFT)) & GPC_SET_POINT_CTRL_SP_INT_CTRL_NO_ALLOWED_SP_INT_MASK)

NO_ALLOWED_SP_INT - no_allowed_set_point interrupt

◆ GPC_SET_POINT_CTRL_SP_INT_CTRL_NO_ALLOWED_SP_INT [2/2]

#define GPC_SET_POINT_CTRL_SP_INT_CTRL_NO_ALLOWED_SP_INT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_INT_CTRL_NO_ALLOWED_SP_INT_SHIFT)) & GPC_SET_POINT_CTRL_SP_INT_CTRL_NO_ALLOWED_SP_INT_MASK)

NO_ALLOWED_SP_INT - no_allowed_set_point interrupt

◆ GPC_SET_POINT_CTRL_SP_INT_CTRL_NO_ALLOWED_SP_INT_EN [1/2]

#define GPC_SET_POINT_CTRL_SP_INT_CTRL_NO_ALLOWED_SP_INT_EN ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_INT_CTRL_NO_ALLOWED_SP_INT_EN_SHIFT)) & GPC_SET_POINT_CTRL_SP_INT_CTRL_NO_ALLOWED_SP_INT_EN_MASK)

NO_ALLOWED_SP_INT_EN - no_allowed_set_point interrupt enable

◆ GPC_SET_POINT_CTRL_SP_INT_CTRL_NO_ALLOWED_SP_INT_EN [2/2]

#define GPC_SET_POINT_CTRL_SP_INT_CTRL_NO_ALLOWED_SP_INT_EN ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_INT_CTRL_NO_ALLOWED_SP_INT_EN_SHIFT)) & GPC_SET_POINT_CTRL_SP_INT_CTRL_NO_ALLOWED_SP_INT_EN_MASK)

NO_ALLOWED_SP_INT_EN - no_allowed_set_point interrupt enable

◆ GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_CNT_MODE [1/2]

#define GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_CNT_MODE [2/2]

#define GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_DISABLE [1/2]

#define GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_DISABLE [2/2]

#define GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_STEP_CNT [1/2]

#define GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_STEP_CNT [2/2]

#define GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_CNT_MODE [1/2]

#define GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_CNT_MODE [2/2]

#define GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_DISABLE [1/2]

#define GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_DISABLE [2/2]

#define GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_STEP_CNT [1/2]

#define GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_STEP_CNT [2/2]

#define GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_CNT_MODE [1/2]

#define GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_CNT_MODE [2/2]

#define GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_DISABLE [1/2]

#define GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_DISABLE [2/2]

#define GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_STEP_CNT [1/2]

#define GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_STEP_CNT [2/2]

#define GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_CNT_MODE [1/2]

#define GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_CNT_MODE [2/2]

#define GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_DISABLE [1/2]

#define GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_DISABLE [2/2]

#define GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_STEP_CNT [1/2]

#define GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_STEP_CNT [2/2]

#define GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_CNT_MODE [1/2]

#define GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_CNT_MODE [2/2]

#define GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_DISABLE [1/2]

#define GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_DISABLE [2/2]

#define GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_STEP_CNT [1/2]

#define GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_STEP_CNT [2/2]

#define GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_CNT_MODE [1/2]

#define GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_CNT_MODE [2/2]

#define GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_DISABLE [1/2]

#define GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_DISABLE [2/2]

#define GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_STEP_CNT [1/2]

#define GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_STEP_CNT [2/2]

#define GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_CNT_MODE [1/2]

#define GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_CNT_MODE [2/2]

#define GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_DISABLE [1/2]

#define GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_DISABLE [2/2]

#define GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_STEP_CNT [1/2]

#define GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_STEP_CNT [2/2]

#define GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_CNT_MODE [1/2]

#define GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_CNT_MODE [2/2]

#define GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_DISABLE [1/2]

#define GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_DISABLE [2/2]

#define GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_STEP_CNT [1/2]

#define GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_STEP_CNT [2/2]

#define GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_CNT_MODE [1/2]

#define GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_CNT_MODE [2/2]

#define GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_DISABLE [1/2]

#define GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_DISABLE [2/2]

#define GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_STEP_CNT [1/2]

#define GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_STEP_CNT [2/2]

#define GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_CNT_MODE [1/2]

#define GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_CNT_MODE [2/2]

#define GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_DISABLE [1/2]

#define GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_DISABLE [2/2]

#define GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_STEP_CNT [1/2]

#define GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_STEP_CNT [2/2]

#define GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP0_PRIORITY [1/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP0_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP0_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP0_PRIORITY_MASK)

SYS_SP0_PRIORITY - priority of Setpoint 0

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP0_PRIORITY [2/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP0_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP0_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP0_PRIORITY_MASK)

SYS_SP0_PRIORITY - priority of Setpoint 0

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP1_PRIORITY [1/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP1_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP1_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP1_PRIORITY_MASK)

SYS_SP1_PRIORITY - priority of Setpoint 1

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP1_PRIORITY [2/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP1_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP1_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP1_PRIORITY_MASK)

SYS_SP1_PRIORITY - priority of Setpoint 1

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP2_PRIORITY [1/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP2_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP2_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP2_PRIORITY_MASK)

SYS_SP2_PRIORITY - priority of Setpoint 2

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP2_PRIORITY [2/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP2_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP2_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP2_PRIORITY_MASK)

SYS_SP2_PRIORITY - priority of Setpoint 2

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP3_PRIORITY [1/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP3_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP3_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP3_PRIORITY_MASK)

SYS_SP3_PRIORITY - priority of Setpoint 3

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP3_PRIORITY [2/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP3_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP3_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP3_PRIORITY_MASK)

SYS_SP3_PRIORITY - priority of Setpoint 3

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP4_PRIORITY [1/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP4_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP4_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP4_PRIORITY_MASK)

SYS_SP4_PRIORITY - priority of Setpoint 4

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP4_PRIORITY [2/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP4_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP4_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP4_PRIORITY_MASK)

SYS_SP4_PRIORITY - priority of Setpoint 4

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP5_PRIORITY [1/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP5_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP5_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP5_PRIORITY_MASK)

SYS_SP5_PRIORITY - priority of Setpoint 5

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP5_PRIORITY [2/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP5_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP5_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP5_PRIORITY_MASK)

SYS_SP5_PRIORITY - priority of Setpoint 5

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP6_PRIORITY [1/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP6_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP6_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP6_PRIORITY_MASK)

SYS_SP6_PRIORITY - priority of Setpoint 6

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP6_PRIORITY [2/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP6_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP6_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP6_PRIORITY_MASK)

SYS_SP6_PRIORITY - priority of Setpoint 6

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP7_PRIORITY [1/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP7_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP7_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP7_PRIORITY_MASK)

SYS_SP7_PRIORITY - priority of Setpoint 7

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP7_PRIORITY [2/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP7_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP7_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP7_PRIORITY_MASK)

SYS_SP7_PRIORITY - priority of Setpoint 7

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP10_PRIORITY [1/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP10_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP10_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP10_PRIORITY_MASK)

SYS_SP10_PRIORITY - priority of Setpoint 10

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP10_PRIORITY [2/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP10_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP10_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP10_PRIORITY_MASK)

SYS_SP10_PRIORITY - priority of Setpoint 10

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP11_PRIORITY [1/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP11_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP11_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP11_PRIORITY_MASK)

SYS_SP11_PRIORITY - priority of Setpoint 11

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP11_PRIORITY [2/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP11_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP11_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP11_PRIORITY_MASK)

SYS_SP11_PRIORITY - priority of Setpoint 11

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP12_PRIORITY [1/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP12_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP12_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP12_PRIORITY_MASK)

SYS_SP12_PRIORITY - priority of Setpoint 12

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP12_PRIORITY [2/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP12_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP12_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP12_PRIORITY_MASK)

SYS_SP12_PRIORITY - priority of Setpoint 12

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP13_PRIORITY [1/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP13_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP13_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP13_PRIORITY_MASK)

SYS_SP13_PRIORITY - priority of Setpoint 13

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP13_PRIORITY [2/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP13_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP13_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP13_PRIORITY_MASK)

SYS_SP13_PRIORITY - priority of Setpoint 13

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP14_PRIORITY [1/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP14_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP14_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP14_PRIORITY_MASK)

SYS_SP14_PRIORITY - priority of Setpoint 14

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP14_PRIORITY [2/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP14_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP14_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP14_PRIORITY_MASK)

SYS_SP14_PRIORITY - priority of Setpoint 14

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP15_PRIORITY [1/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP15_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP15_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP15_PRIORITY_MASK)

SYS_SP15_PRIORITY - priority of Setpoint 15

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP15_PRIORITY [2/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP15_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP15_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP15_PRIORITY_MASK)

SYS_SP15_PRIORITY - priority of Setpoint 15

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP8_PRIORITY [1/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP8_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP8_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP8_PRIORITY_MASK)

SYS_SP8_PRIORITY - priority of Setpoint 8

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP8_PRIORITY [2/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP8_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP8_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP8_PRIORITY_MASK)

SYS_SP8_PRIORITY - priority of Setpoint 8

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP9_PRIORITY [1/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP9_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP9_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP9_PRIORITY_MASK)

SYS_SP9_PRIORITY - priority of Setpoint 9

◆ GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP9_PRIORITY [2/2]

#define GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP9_PRIORITY ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP9_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP9_PRIORITY_MASK)

SYS_SP9_PRIORITY - priority of Setpoint 9

◆ GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_CNT_MODE [1/2]

#define GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_CNT_MODE [2/2]

#define GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_DISABLE [1/2]

#define GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_DISABLE [2/2]

#define GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_STEP_CNT [1/2]

#define GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_STEP_CNT [2/2]

#define GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_CNT_MODE [1/2]

#define GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_CNT_MODE [2/2]

#define GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_DISABLE [1/2]

#define GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_DISABLE [2/2]

#define GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_STEP_CNT [1/2]

#define GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_STEP_CNT [2/2]

#define GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_CNT_MODE [1/2]

#define GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_CNT_MODE [2/2]

#define GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_DISABLE [1/2]

#define GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_DISABLE [2/2]

#define GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_STEP_CNT [1/2]

#define GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_STEP_CNT [2/2]

#define GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_CNT_MODE [1/2]

#define GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_CNT_MODE [2/2]

#define GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_DISABLE [1/2]

#define GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_DISABLE [2/2]

#define GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_STEP_CNT [1/2]

#define GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_STEP_CNT [2/2]

#define GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_ROSC_CTRL_SP_ALLOW_ROSC_OFF [1/2]

#define GPC_SET_POINT_CTRL_SP_ROSC_CTRL_SP_ALLOW_ROSC_OFF ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ROSC_CTRL_SP_ALLOW_ROSC_OFF_SHIFT)) & GPC_SET_POINT_CTRL_SP_ROSC_CTRL_SP_ALLOW_ROSC_OFF_MASK)

SP_ALLOW_ROSC_OFF - Allow shutting off the ROSC

◆ GPC_SET_POINT_CTRL_SP_ROSC_CTRL_SP_ALLOW_ROSC_OFF [2/2]

#define GPC_SET_POINT_CTRL_SP_ROSC_CTRL_SP_ALLOW_ROSC_OFF ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ROSC_CTRL_SP_ALLOW_ROSC_OFF_SHIFT)) & GPC_SET_POINT_CTRL_SP_ROSC_CTRL_SP_ALLOW_ROSC_OFF_MASK)

SP_ALLOW_ROSC_OFF - Allow shutting off the ROSC

◆ GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_CNT_MODE [1/2]

#define GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_CNT_MODE [2/2]

#define GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_DISABLE [1/2]

#define GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_DISABLE [2/2]

#define GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_STEP_CNT [1/2]

#define GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_STEP_CNT [2/2]

#define GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_CNT_MODE [1/2]

#define GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_CNT_MODE [2/2]

#define GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_CNT_MODE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_CNT_MODE_MASK)

CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value

◆ GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_DISABLE [1/2]

#define GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_DISABLE [2/2]

#define GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_DISABLE ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_DISABLE_MASK)

DISABLE - Disable this step

◆ GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_STEP_CNT [1/2]

#define GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_STEP_CNT [2/2]

#define GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_STEP_CNT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_STEP_CNT_MASK)

STEP_CNT - Step count, useage is depending on CNT_MODE

◆ GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_ALLOWED [1/2]

#define GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_ALLOWED ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_ALLOWED_SHIFT)) & GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_ALLOWED_MASK)

SYS_SP_ALLOWED - Allowed Setpoints by all current CPU Setpoint requests

◆ GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_ALLOWED [2/2]

#define GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_ALLOWED ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_ALLOWED_SHIFT)) & GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_ALLOWED_MASK)

SYS_SP_ALLOWED - Allowed Setpoints by all current CPU Setpoint requests

◆ GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_CURRENT [1/2]

#define GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_CURRENT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_CURRENT_SHIFT)) & GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_CURRENT_MASK)

SYS_SP_CURRENT - Current Setpoint, only valid when not SP trans busy

◆ GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_CURRENT [2/2]

#define GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_CURRENT ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_CURRENT_SHIFT)) & GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_CURRENT_MASK)

SYS_SP_CURRENT - Current Setpoint, only valid when not SP trans busy

◆ GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_PREVIOUS [1/2]

#define GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_PREVIOUS ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_PREVIOUS_SHIFT)) & GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_PREVIOUS_MASK)

SYS_SP_PREVIOUS - Previous Setpoint, only valid when not SP trans busy

◆ GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_PREVIOUS [2/2]

#define GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_PREVIOUS ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_PREVIOUS_SHIFT)) & GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_PREVIOUS_MASK)

SYS_SP_PREVIOUS - Previous Setpoint, only valid when not SP trans busy

◆ GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_TARGET [1/2]

#define GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_TARGET ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_TARGET_SHIFT)) & GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_TARGET_MASK)

SYS_SP_TARGET - The Setpoint chosen as the target setpoint

◆ GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_TARGET [2/2]

#define GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_TARGET ( x )

Value:

(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_TARGET_SHIFT)) & GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_TARGET_MASK)

SYS_SP_TARGET - The Setpoint chosen as the target setpoint

SP_AUTHEN_CTRL - SP Authentication Control

SP_INT_CTRL - SP Interrupt Control

SP_CPU_REQ - CPU SP Request

SP_SYS_STAT - SP System Status

SP_ROSC_CTRL - SP ROSC Control

SP_PRIORITY_0_7 - SP0~7 Priority

SP_PRIORITY_8_15 - SP8~15 Priority

SP_SSAR_SAVE_CTRL - SP SSAR save control

SP_LPCG_OFF_CTRL - SP LPCG off control

SP_GROUP_DOWN_CTRL - SP group down control

SP_ROOT_DOWN_CTRL - SP root down control

SP_PLL_OFF_CTRL - SP PLL off control

SP_ISO_ON_CTRL - SP ISO on control

SP_RESET_EARLY_CTRL - SP reset early control

SP_POWER_OFF_CTRL - SP power off control

SP_BIAS_OFF_CTRL - SP bias off control

SP_BG_PLDO_OFF_CTRL - SP bandgap and PLL_LDO off control

SP_LDO_PRE_CTRL - SP LDO pre control

SP_DCDC_DOWN_CTRL - SP DCDC down control

SP_DCDC_UP_CTRL - SP DCDC up control

SP_LDO_POST_CTRL - SP LDO post control

SP_BG_PLDO_ON_CTRL - SP bandgap and PLL_LDO on control

SP_BIAS_ON_CTRL - SP bias on control

SP_POWER_ON_CTRL - SP power on control

SP_RESET_LATE_CTRL - SP reset late control

SP_ISO_OFF_CTRL - SP ISO off control

SP_PLL_ON_CTRL - SP PLL on control

SP_ROOT_UP_CTRL - SP root up control

SP_GROUP_UP_CTRL - SP group up control

SP_LPCG_ON_CTRL - SP LPCG on control

SP_SSAR_RESTORE_CTRL - SP SSAR restore control

Detailed Description

Macro Definition Documentation

◆ GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_CFG [1/2]

◆ GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_CFG [2/2]

◆ GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_LIST [1/2]

◆ GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_LIST [2/2]

◆ GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_SETTING [1/2]

◆ GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_SETTING [2/2]

◆ GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_NONSECURE [1/2]

◆ GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_NONSECURE [2/2]

◆ GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_USER [1/2]

◆ GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_USER [2/2]

◆ GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_WHITE_LIST [1/2]

◆ GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_WHITE_LIST [2/2]

◆ GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE [1/2]

◆ GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE [2/2]

◆ GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_DISABLE [1/2]

◆ GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_DISABLE [2/2]

◆ GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_STEP_CNT [1/2]

◆ GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_STEP_CNT [2/2]

◆ GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE [1/2]

◆ GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE [2/2]

◆ GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_DISABLE [1/2]

◆ GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_DISABLE [2/2]

◆ GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_STEP_CNT [1/2]

◆ GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_STEP_CNT [2/2]

◆ GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE [1/2]

◆ GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE [2/2]

◆ GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_DISABLE [1/2]

◆ GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_DISABLE [2/2]

◆ GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_STEP_CNT [1/2]

◆ GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_STEP_CNT [2/2]

◆ GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE [1/2]

◆ GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE [2/2]

◆ GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_DISABLE [1/2]

◆ GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_DISABLE [2/2]

◆ GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_STEP_CNT [1/2]

◆ GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_STEP_CNT [2/2]

◆ GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU0 [1/2]

◆ GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU0 [2/2]

◆ GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU1 [1/2]

◆ GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU1 [2/2]

◆ GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU2 [1/2]

◆ GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU2 [2/2]

◆ GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU3 [1/2]

◆ GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU3 [2/2]

◆ GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU0 [1/2]

◆ GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU0 [2/2]

◆ GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU1 [1/2]