RTEMS
6.3
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bsps
powerpc
mvme3100
include
bsp
irq.h
Go to the documentation of this file.
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/* irq.h
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*
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* This include file describe the data structure and the functions implemented
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* by RTEMS to write interrupt handlers.
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*
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* Copyright (C) 1999 valette@crf.canon.fr
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*
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* This code is heavilly inspired by the public specification of STREAM V2
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* that can be found at :
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*
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* <http://www.chorus.com/Documentation/index.html> by following
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* the STREAM API Specification Document link.
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*
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* Adapted for the mvme3100 BSP by T. Straumann, 2007.
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*/
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#ifndef BSP_POWERPC_IRQ_H
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#define BSP_POWERPC_IRQ_H
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#define BSP_SHARED_HANDLER_SUPPORT 1
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#include <
rtems/irq.h
>
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#ifndef ASM
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#include <
bsp/irq-default.h
>
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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/* Must pad number of external sources to 16 because
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* of the layout of vector/priority registers in the
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* 8540's openpic where there is a gap between
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* registers corresponding to external and core sources.
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*/
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#define BSP_EXT_IRQ_NUMBER (16)
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#define BSP_CORE_IRQ_NUMBER (32)
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/* openpic glue code from shared/irq assigns priorities and configures
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* initial ISRs for BSP_PCI_IRQ_NUMBER entries (plus ISA stuff on legacy
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* boards). Hence PCI_IRQ_NUMBER must also cover the internal sources
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* even though they have nothing to do with PCI.
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*/
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#define BSP_PCI_IRQ_NUMBER (BSP_EXT_IRQ_NUMBER + BSP_CORE_IRQ_NUMBER)
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#define BSP_PCI_IRQ_LOWEST_OFFSET (0)
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#define BSP_PCI_IRQ_MAX_OFFSET (BSP_PCI_IRQ_LOWEST_OFFSET + BSP_PCI_IRQ_NUMBER - 1)
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#define BSP_CORE_IRQ_LOWEST_OFFSET (BSP_PCI_IRQ_LOWEST_OFFSET + BSP_EXT_IRQ_NUMBER)
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#define BSP_CORE_IRQ_MAX_OFFSET (BSP_CORE_IRQ_LOWEST_OFFSET + BSP_CORE_IRQ_NUMBER - 1)
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/*
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* PowerPC exceptions handled as interrupt where an RTEMS managed interrupt
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* handler might be connected
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*/
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#define BSP_PROCESSOR_IRQ_NUMBER (1)
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#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_CORE_IRQ_MAX_OFFSET + 1)
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#define BSP_PROCESSOR_IRQ_MAX_OFFSET (BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1)
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/* Misc vectors for OPENPIC irqs (IPI, timers)
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*/
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#define BSP_MISC_IRQ_NUMBER (8)
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#define BSP_MISC_IRQ_LOWEST_OFFSET (BSP_PROCESSOR_IRQ_MAX_OFFSET + 1)
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#define BSP_MISC_IRQ_MAX_OFFSET (BSP_MISC_IRQ_LOWEST_OFFSET + BSP_MISC_IRQ_NUMBER - 1)
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/*
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* Summary
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*/
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#define BSP_IRQ_NUMBER (BSP_MISC_IRQ_MAX_OFFSET + 1)
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#define BSP_LOWEST_OFFSET (BSP_PCI_IRQ_LOWEST_OFFSET)
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#define BSP_MAX_OFFSET (BSP_MISC_IRQ_MAX_OFFSET)
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/*
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* Some PCI IRQ symbolic name definition
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*/
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#define BSP_PCI_IRQ0 (BSP_PCI_IRQ_LOWEST_OFFSET)
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#define BSP_VME0_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 0)
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#define BSP_VME1_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 1)
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#define BSP_VME2_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 2)
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#define BSP_VME3_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 3)
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#define BSP_ABORT_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 8)
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#define BSP_TEMP_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 9)
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#define BSP_PHY_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 10)
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#define BSP_RTC_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 11)
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/* Weird - they provide 3 different IRQ lines per ethernet controller
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* but only one shared line for 2 UARTs ???
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*/
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#define BSP_UART_COM1_IRQ (BSP_CORE_IRQ_LOWEST_OFFSET + 26)
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#define BSP_UART_COM2_IRQ (BSP_CORE_IRQ_LOWEST_OFFSET + 26)
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#define BSP_I2C_IRQ (BSP_CORE_IRQ_LOWEST_OFFSET + 27)
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/*
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* Some internal (CORE) name definitions
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*/
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/* Ethernet (FEC) */
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#define BSP_CORE_IRQ_FEC (BSP_CORE_IRQ_LOWEST_OFFSET + 25)
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/* i2c controller */
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#define BSP_CORE_IRQ_I2C (BSP_CORE_IRQ_LOWEST_OFFSET + 27)
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/*
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* Some Processor execption handled as RTEMS IRQ symbolic name definition
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*/
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#define BSP_DECREMENTER (BSP_PROCESSOR_IRQ_LOWEST_OFFSET)
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/*-------------------------------------------------------------------------+
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| Function Prototypes.
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+--------------------------------------------------------------------------*/
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extern
void
BSP_rtems_irq_mng_init(
unsigned
cpuId);
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#include <bsp/irq_supp.h>
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#ifdef __cplusplus
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};
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#endif
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#endif
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#endif
irq.h
irq-default.h
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