RTEMS
6.3
Toggle main menu visibility
Loading...
Searching...
No Matches
bsps
arm
xilinx-zynqmp-rpu
include
bsp
irq.h
Go to the documentation of this file.
1
/* SPDX-License-Identifier: BSD-2-Clause */
2
10
11
/*
12
* Copyright (C) 2024 embedded brains GmbH & Co. KG
13
* Copyright (C) 2023 Reflex Aerospace GmbH
14
*
15
* Redistribution and use in source and binary forms, with or without
16
* modification, are permitted provided that the following conditions
17
* are met:
18
* 1. Redistributions of source code must retain the above copyright
19
* notice, this list of conditions and the following disclaimer.
20
* 2. Redistributions in binary form must reproduce the above copyright
21
* notice, this list of conditions and the following disclaimer in the
22
* documentation and/or other materials provided with the distribution.
23
*
24
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34
* POSSIBILITY OF SUCH DAMAGE.
35
*/
36
37
#ifndef LIBBSP_ARM_XILINX_ZYNQMP_RPU_IRQ_H
38
#define LIBBSP_ARM_XILINX_ZYNQMP_RPU_IRQ_H
39
40
#ifndef ASM
41
42
#include <
rtems.h
>
43
44
#include <bspopts.h>
45
#include <
dev/irq/arm-gic-irq.h
>
46
#include <
peripheral_maps/xilinx_zynqmp.h
>
47
48
#ifdef __cplusplus
49
extern
"C"
{
50
#endif
/* __cplusplus */
51
52
#ifndef ZYNQMP_RPU_LOCK_STEP_MODE
53
#define BSP_IRQ_HAVE_GET_SET_AFFINITY
54
#endif
55
56
#define BSP_INTERRUPT_VECTOR_COUNT 188
57
59
60
#ifdef __cplusplus
61
}
62
#endif
/* __cplusplus */
63
64
#endif
/* ASM */
65
66
#endif
/* LIBBSP_ARM_XILINX_ZYNQMP_RPU_IRQ_H */
arm-gic-irq.h
This header file provides interfaces of the ARM Generic Interrupt Controller (GIC) support.
rtems.h
This header file defines the RTEMS Classic API.
xilinx_zynqmp.h
Xilinx Zynq Ultrascale+ MPSoC Peripheral memory map.
Generated by
1.18.0