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RTEMS 6.3
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#include "chip.h"Go to the source code of this file.
Macros | |
| #define | SPI_PCS(npcs) |
| #define | SPI_SCBR(baudrate, masterClock) |
| #define | SPI_DLYBS(delay, masterClock) |
| #define | SPI_DLYBCT(delay, masterClock) |
Functions | |
| void | SPI_Enable (Spi *spi) |
| Enables a SPI peripheral. | |
| void | SPI_Disable (Spi *spi) |
| Disables a SPI peripheral. | |
| void | SPI_EnableIt (Spi *spi, uint32_t dwSources) |
| Enables one or more interrupt sources of a SPI peripheral. | |
| void | SPI_DisableIt (Spi *spi, uint32_t dwSources) |
| Disables one or more interrupt sources of a SPI peripheral. | |
| void | SPI_Configure (Spi *spi, uint32_t dwId, uint32_t dwConfiguration) |
| Configures a SPI peripheral as specified. The configuration can be computed using several macros (see SPI Configuration Macros). | |
| void | SPI_SetMode (Spi *spi, uint32_t dwConfiguration) |
| Configures SPI Mode Register. | |
| void | SPI_ChipSelect (Spi *spi, uint8_t cS) |
| Configures SPI chip select. | |
| void | SPI_ReleaseCS (Spi *spi) |
| Configures SPI to release last used CS line. | |
| void | SPI_ConfigureNPCS (Spi *spi, uint32_t dwNpcs, uint32_t dwConfiguration) |
| Configures a chip select of a SPI peripheral. The chip select configuration is computed using several macros (see SPI Configuration Macros). | |
| void | SPI_ConfigureCSMode (Spi *spi, uint32_t dwNpcs, uint32_t bReleaseOnLast) |
| Configures a chip select active mode of a SPI peripheral. | |
| uint32_t | SPI_Read (Spi *spi) |
| Reads and returns the last word of data received by a SPI peripheral. This method must be called after a successful SPI_Write call. | |
| void | SPI_Write (Spi *spi, uint32_t dwNpcs, uint16_t wData) |
| Sends data through a SPI peripheral. If the SPI is configured to use a fixed peripheral select, the npcs value is meaningless. Otherwise, it identifies the component which shall be addressed. | |
| void | SPI_WriteLast (Spi *spi, uint32_t dwNpcs, uint16_t wData) |
| Sends last data through a SPI peripheral. If the SPI is configured to use a fixed peripheral select, the npcs value is meaningless. Otherwise, it identifies the component which shall be addressed. | |
| uint32_t | SPI_GetStatus (Spi *spi) |
| Get the current status register of the given SPI peripheral. | |
| uint32_t | SPI_IsFinished (Spi *pSpi) |
| Check if SPI transfer finish. | |
Interface for Serial Peripheral Interface (SPI) controller.
| #define SPI_DLYBCT | ( | delay, | |
| masterClock ) |
Calculates the value of the CSR DLYBCT field given the desired delay (in ns)
| #define SPI_DLYBS | ( | delay, | |
| masterClock ) |
Calculates the value of the CSR DLYBS field given the desired delay (in ns)
| #define SPI_PCS | ( | npcs | ) |
Here are several macros which should be used when configuring a SPI peripheral.
| #define SPI_SCBR | ( | baudrate, | |
| masterClock ) |
Calculates the value of the CSR SCBR field given the baudrate and MCK.
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extern |
Configures SPI chip select.
| spi | Pointer to an SPI instance. |
| cS | Chip select of NPSCx. |
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extern |
Configures a SPI peripheral as specified. The configuration can be computed using several macros (see SPI Configuration Macros).
| spi | Pointer to an SPI instance. |
| id | Peripheral ID of the SPI. |
| configuration | Value of the SPI configuration register. |
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extern |
Configures a chip select active mode of a SPI peripheral.
| spi | Pointer to an SPI instance. |
| dwNpcs | Chip select to configure (0, 1, 2 or 3). |
| bReleaseOnLast | CS controlled by last transfer. SPI_ReleaseCS() is used to release CS. |
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extern |
Configures a chip select of a SPI peripheral. The chip select configuration is computed using several macros (see SPI Configuration Macros).
| spi | Pointer to an SPI instance. |
| npcs | Chip select to configure (0, 1, 2 or 3). |
| configuration | Desired chip select configuration. |
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extern |
Disables a SPI peripheral.
| spi | Pointer to an SPI instance. |
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extern |
Disables one or more interrupt sources of a SPI peripheral.
| spi | Pointer to an SPI instance. |
| sources | Bitwise OR of selected interrupt sources. |
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extern |
Enables a SPI peripheral.
| spi | Pointer to an SPI instance. |
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extern |
Enables one or more interrupt sources of a SPI peripheral.
| spi | Pointer to an SPI instance. |
| sources | Bitwise OR of selected interrupt sources. |
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extern |
Get the current status register of the given SPI peripheral.
| spi | Pointer to a Spi instance. |
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extern |
Check if SPI transfer finish.
| spi | Pointer to an SPI instance. |
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extern |
Reads and returns the last word of data received by a SPI peripheral. This method must be called after a successful SPI_Write call.
| spi | Pointer to an Spi instance. |
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extern |
Configures SPI to release last used CS line.
| spi | Pointer to an SPI instance. |
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extern |
Configures SPI Mode Register.
| spi | Pointer to an SPI instance. |
| configuration | Value of the SPI mode register. |
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extern |
Sends data through a SPI peripheral. If the SPI is configured to use a fixed peripheral select, the npcs value is meaningless. Otherwise, it identifies the component which shall be addressed.
| spi | Pointer to an SPI instance. |
| npcs | Chip select of the component to address (0, 1, 2 or 3). |
| data | Word of data to send. |
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extern |
Sends last data through a SPI peripheral. If the SPI is configured to use a fixed peripheral select, the npcs value is meaningless. Otherwise, it identifies the component which shall be addressed.
| spi | Pointer to an SPI instance. |
| npcs | Chip select of the component to address (0, 1, 2 or 3). |
| data | Word of data to send. |