This header file provides interfaces of the AArch64 CPU port. More...

#include <rtems/score/basedefs.h>
#include <rtems/score/aarch64.h>
#include <libcpu/vectors.h>
#include <limits.h>

Data Structures
struct	Context_Control
	Thread register context. More...
struct	CPU_Exception_frame
	The set of registers that specifies the complete processor state. More...

Macros
#define	CPU_SIMPLE_VECTORED_INTERRUPTS FALSE
#define	CPU_ISR_PASSES_FRAME_POINTER FALSE
#define	CPU_HARDWARE_FP FALSE
#define	CPU_SOFTWARE_FP FALSE
#define	CPU_ALL_TASKS_ARE_FP FALSE
#define	CPU_IDLE_TASK_IS_FP FALSE
#define	CPU_USE_DEFERRED_FP_SWITCH FALSE
#define	CPU_ENABLE_ROBUST_THREAD_DISPATCH TRUE
#define	CPU_STACK_GROWS_UP FALSE
#define	CPU_CACHE_LINE_BYTES 64
#define	CPU_STRUCTURE_ALIGNMENT RTEMS_ALIGNED( CPU_CACHE_LINE_BYTES )
#define	CPU_MODES_INTERRUPT_MASK 0x1
#define	CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0
#define	CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE
#define	CPU_STACK_MINIMUM_SIZE (1024 * 8)
#define	CPU_SIZEOF_POINTER __SIZEOF_POINTER__
#define	CPU_ALIGNMENT 16
#define	CPU_HEAP_ALIGNMENT CPU_ALIGNMENT
#define	CPU_STACK_ALIGNMENT 16
#define	CPU_INTERRUPT_STACK_ALIGNMENT CPU_CACHE_LINE_BYTES
#define	CPU_USE_GENERIC_BITFIELD_CODE TRUE
#define	CPU_USE_LIBC_INIT_FINI_ARRAY TRUE
#define	CPU_MAXIMUM_PROCESSORS 32
#define	AARCH64_CONTEXT_CONTROL_THREAD_ID_OFFSET 0x70
#define	AARCH64_CONTEXT_CONTROL_ISR_DISPATCH_DISABLE 0x68
#define	AARCH64_EXCEPTION_FRAME_SIZE 0x350
#define	AARCH64_EXCEPTION_FRAME_REGISTER_SP_OFFSET 0xF8
#define	AARCH64_EXCEPTION_FRAME_REGISTER_LR_OFFSET 0xF0
#define	AARCH64_EXCEPTION_FRAME_REGISTER_DAIF_OFFSET 0x108
#define	AARCH64_EXCEPTION_FRAME_REGISTER_SYNDROME_OFFSET 0x118
#define	AARCH64_EXCEPTION_FRAME_REGISTER_VECTOR_OFFSET 0x128
#define	AARCH64_EXCEPTION_FRAME_REGISTER_FPSR_OFFSET 0x138
#define	AARCH64_EXCEPTION_FRAME_REGISTER_Q0_OFFSET 0x150
#define	_CPU_ISR_Disable(_isr_cookie)
#define	_CPU_ISR_Enable(_isr_cookie)
#define	_CPU_ISR_Flash(_isr_cookie)
#define	_CPU_Context_Get_SP(_context)
#define	_CPU_Context_Restart_self(_the_context)
#define	_CPU_Context_Initialize_fp(_destination)
#define	VECTOR_POINTER_OFFSET 0x78
#define	VECTOR_ENTRY_SIZE 0x80
Program State Registers
#define	AARCH64_PSTATE_N (1LL << 31)
#define	AARCH64_PSTATE_Z (1LL << 30)
#define	AARCH64_PSTATE_C (1LL << 29)
#define	AARCH64_PSTATE_V (1LL << 28)
#define	AARCH64_PSTATE_D (1LL << 9)
#define	AARCH64_PSTATE_A (1LL << 8)
#define	AARCH64_PSTATE_I (1LL << 7)
#define	AARCH64_PSTATE_F (1LL << 6)

Typedefs
typedef unsigned __int128	uint128_t
typedef void(*)	CPU_ISR_handler(void)
typedef uint32_t	CPU_Counter_ticks
	Unsigned integer type for CPU counter values.
typedef uintptr_t	CPU_Uint32ptr

Enumerations

enum AArch64_symbolic_exception_name {
AARCH64_EXCEPTION_SP0_SYNCHRONOUS = 0 , AARCH64_EXCEPTION_SP0_IRQ = 1 , AARCH64_EXCEPTION_SP0_FIQ = 2 , AARCH64_EXCEPTION_SP0_SERROR = 3 ,
AARCH64_EXCEPTION_SPx_SYNCHRONOUS = 4 , AARCH64_EXCEPTION_SPx_IRQ = 5 , AARCH64_EXCEPTION_SPx_FIQ = 6 , AARCH64_EXCEPTION_SPx_SERROR = 7 ,
AARCH64_EXCEPTION_LEL64_SYNCHRONOUS = 8 , AARCH64_EXCEPTION_LEL64_IRQ = 9 , AARCH64_EXCEPTION_LEL64_FIQ = 10 , AARCH64_EXCEPTION_LEL64_SERROR = 11 ,
AARCH64_EXCEPTION_LEL32_SYNCHRONOUS = 12 , AARCH64_EXCEPTION_LEL32_IRQ = 13 , AARCH64_EXCEPTION_LEL32_FIQ = 14 , AARCH64_EXCEPTION_LEL32_SERROR = 15 ,
MAX_EXCEPTIONS = 16 , AARCH64_EXCEPTION_MAKE_ENUM_64_BIT = INT_MAX
}

Functions
void	_CPU_ISR_Set_level (uint32_t level)
uint32_t	_CPU_ISR_Get_level (void)
void	_CPU_Context_Initialize (Context_Control the_context, void stack_area_begin, size_t stack_area_size, uint64_t new_level, void(entry_point)(void), bool is_fp, void tls_area)
void	_CPU_Initialize (void)
	CPU initialization.
void	_CPU_Context_switch (Context_Control run, Context_Control heir)
	CPU switch context.
RTEMS_NO_RETURN void	_CPU_Context_switch_no_return (Context_Control executing, Context_Control heir)
RTEMS_NO_RETURN void	_CPU_Context_restore (Context_Control *new_context)
uint32_t	_CPU_Counter_frequency (void)
CPU_Counter_ticks	_CPU_Counter_read (void)
RTEMS_NO_RETURN void *	_CPU_Thread_Idle_body (uintptr_t ignored)
void	_AArch64_Exception_interrupt_no_nest (void)
void	_AArch64_Exception_interrupt_nest (void)
void	_CPU_Exception_frame_print (const CPU_Exception_frame *frame)
RTEMS_NO_RETURN void	_CPU_Exception_resume (CPU_Exception_frame *frame)
RTEMS_NO_RETURN void	_CPU_Exception_dispatch_and_resume (CPU_Exception_frame *frame)
void	_CPU_Exception_disable_thread_dispatch (void)
int	_CPU_Exception_frame_get_signal (CPU_Exception_frame *frame)
void	_CPU_Exception_frame_set_resume (CPU_Exception_frame frame, void address)
void	_CPU_Exception_frame_make_resume_next_instruction (CPU_Exception_frame *frame)
void	_AArch64_Exception_frame_copy (CPU_Exception_frame new_ef, CPU_Exception_frame old_ef)
void	_AArch64_Exception_default (CPU_Exception_frame *frame)

Detailed Description

This header file provides interfaces of the AArch64 CPU port.

Data Structures

Macros

Typedefs

Enumerations

Functions

Detailed Description