RTEMS
6.3
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bsps
arm
imxrt
mcux-sdk
devices
MIMXRT1166
fsl_device_registers.h
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/*
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* Copyright 2014-2016 Freescale Semiconductor, Inc.
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* Copyright 2016-2021 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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*/
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#ifndef __FSL_DEVICE_REGISTERS_H__
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#define __FSL_DEVICE_REGISTERS_H__
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#ifdef __rtems__
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#include <bspopts.h>
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#endif
/* __rtems__ */
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/*
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* Include the cpu specific register header files.
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*
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* The CPU macro should be declared in the project or makefile.
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*/
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#if (defined(CPU_MIMXRT1166CVM5A_cm7) || defined(CPU_MIMXRT1166DVM6A_cm7) || defined(CPU_MIMXRT1166XVM5A_cm7))
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#define MIMXRT1166_cm7_SERIES
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/* CMSIS-style register definitions */
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#include "
MIMXRT1166_cm7.h
"
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/* CPU specific feature definitions */
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#include "MIMXRT1166_cm7_features.h"
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#elif (defined(CPU_MIMXRT1166CVM5A_cm4) || defined(CPU_MIMXRT1166DVM6A_cm4) || defined(CPU_MIMXRT1166XVM5A_cm4))
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#define MIMXRT1166_cm4_SERIES
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/* CMSIS-style register definitions */
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#include "
MIMXRT1166_cm4.h
"
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/* CPU specific feature definitions */
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#include "MIMXRT1166_cm4_features.h"
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#else
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#error "No valid CPU defined!"
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#endif
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#endif
/* __FSL_DEVICE_REGISTERS_H__ */
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/*******************************************************************************
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* EOF
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******************************************************************************/
MIMXRT1166_cm4.h
CMSIS Peripheral Access Layer for MIMXRT1166_cm4.
MIMXRT1166_cm7.h
CMSIS Peripheral Access Layer for MIMXRT1166_cm7.
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