RTEMS 6.3
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Data Structures | Macros | Typedefs | Functions | Variables
sse_test.c File Reference

Test FPU/SSE Context Save and Restore. More...

#include <inttypes.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <math.h>
#include <signal.h>
#include <ucontext.h>

Data Structures

struct  Context_Control_sse
struct  [struct].fp_mmregs

Macros

#define SSE_TEST_IRQ   10
#define MXCSR_FZ   (1<<15)
#define MXCSR_RC(x)
#define MXCSR_PM   (1<<12)
#define MXCSR_UM   (1<<11)
#define MXCSR_OM   (1<<10)
#define MXCSR_ZM   (1<< 9)
#define MXCSR_DM   (1<< 8)
#define MXCSR_IM   (1<< 7)
#define MXCSR_DAZ   (1<< 6)
#define MXCSR_PE   (1<< 5)
#define MXCSR_UE   (1<< 4)
#define MXCSR_OE   (1<< 3)
#define MXCSR_ZE   (1<< 2)
#define MXCSR_DE   (1<< 1)
#define MXCSR_IE   (1<< 0)
#define MXCSR_ALLM   (MXCSR_PM | MXCSR_UM | MXCSR_OM | MXCSR_ZM | MXCSR_DM | MXCSR_IM)
#define MXCSR_ALLE   (MXCSR_PE | MXCSR_UE | MXCSR_OE | MXCSR_ZE | MXCSR_DE | MXCSR_IE)
#define FPSR_B   (1<<15)
#define FPSR_C3   (1<<14)
#define FPSR_TOP(x)
#define FPSR_C2   (1<<10)
#define FPSR_C1   (1<< 9)
#define FPSR_C0   (1<< 8)
#define FPSR_ES   (1<< 7)
#define FPSR_SF   (1<< 6)
#define FPSR_PE   (1<< 5)
#define FPSR_UE   (1<< 4)
#define FPSR_OE   (1<< 3)
#define FPSR_ZE   (1<< 2)
#define FPSR_DE   (1<< 1)
#define FPSR_IE   (1<< 0)
#define FPCW_X   (1<<12)
#define FPCW_RC(x)
#define FPCW_PC(x)
#define FPCW_PM   (1<< 5)
#define FPCW_UM   (1<< 4)
#define FPCW_OM   (1<< 3)
#define FPCW_ZM   (1<< 2)
#define FPCW_DM   (1<< 1)
#define FPCW_IM   (1<< 0)
#define FPCW_ALLM   (FPCW_PM | FPCW_UM | FPCW_OM | FPCW_ZM | FPCW_DM | FPCW_IM)
#define FPSR_ALLE   (FPSR_ES | FPSR_SF | FPSR_PE | FPSR_UE | FPSR_OE | FPSR_ZE | FPSR_DE | FPSR_IE)
#define FPUCLOBBER
#define SSECLOBBER
#define H08   "0x%02"PRIx8
#define H16   "0x%04"PRIx16
#define H32   "0x%08"PRIx32
#define F16   "mismatch ("H16" != "H16")\n"
#define FLDCMP(fld, fmt)
#define FLTCMP(i)
#define XMMCMP(i)
#define FP_EXC   0
#define IRQ_EXC   1
#define SSE_EXC   -1
#define __INTRAISE(x)
#define INTRAISE(x)
#define SSE_TEST_HP_FAILED   1
#define SSE_TEST_FSPR_FAILED   2
#define SSE_TEST_CTXTCMP_FAILED   4
#define MKCASE(X)
#define CLRXMM(i)

Typedefs

typedef uint8_t __v8 __attribute__((vector_size(16)))

Functions

struct Context_Control_sse __attribute__ ((aligned(16)))
void fp_st1 (uint8_t(*p_dst)[10], double v)
void fp_st (Context_Control_sse *p_ctxt, int i, double v)
double fp_ld1 (uint8_t(*p_src)[10])
double fp_ld (Context_Control_sse *p_ctxt, int i)
void all_clobber (uint32_t v1, uint32_t v2)
 __asm__ ("all_clobber: \n" " finit \n" " movq 0(%esp), %xmm0 \n" " punpcklqdq %xmm0, %xmm0 \n" " movdqa %xmm0, %xmm1 \n" " movdqa %xmm0, %xmm2 \n" " movdqa %xmm0, %xmm3 \n" " movdqa %xmm0, %xmm4 \n" " movdqa %xmm0, %xmm5 \n" " movdqa %xmm0, %xmm6 \n" " movdqa %xmm0, %xmm7 \n" " ret \n")
void init_ctxt (Context_Control_sse *p_ctxt)
 __asm__ ("init_ctxt: \n" " finit \n" " mov 4(%esp), %eax\n" " fxsave (%eax) \n" " fwait \n" " ret \n")
 __asm__ ("do_raise: \n" " fwait \n" " test %eax, %eax \n" " je 2f \n" " jl 1f \n" " jmp 2f \n" "1: sqrtps %xmm0, %xmm0 \n" "2: \n" " ret \n")
int main (int argc, char **argv)
uint32_t mfcr4 ()
void mtcr4 (uint32_t rval)
uint32_t mfmxcsr ()
void mtmxcsr (uint32_t rval)
float sseraise ()

Variables

uint16_t fcw
uint16_t fsw
uint8_t ftw
uint8_t res_1
uint16_t fop
uint32_t fpu_ip
uint16_t cs
uint16_t res_2
uint32_t fpu_dp
uint16_t ds
uint16_t res_3
uint32_t mxcsr
uint32_t mxcsr_mask
struct  fp_mmregs [8]
uint8_t xmmregs [8][16]
uint8_t res_5 [224]
int sse_test_debug = 0

Detailed Description

Test FPU/SSE Context Save and Restore.

Macro Definition Documentation

◆ __INTRAISE

#define __INTRAISE ( x)
Value:
" int $32+"#x" \n"

◆ CLRXMM

#define CLRXMM ( i)
Value:
__asm__ volatile("pxor %%xmm"#i", %%xmm"#i:::"xmm"#i)

◆ FLDCMP

#define FLDCMP ( fld,
fmt )
Value:
if ( a->fld != b->fld ) { \
rval = 1; \
if ( !quiet ) \
fprintf(stderr,#fld" mismatch ("fmt" != "fmt")\n",a->fld, b->fld); \
}

◆ FLTCMP

#define FLTCMP ( i)
Value:
do { \
if ( ( (a->ftw ^ b->ftw) & (1<<i)) \
|| ( (a->ftw & b->ftw & (1<<i)) && \
memcmp(a->fp_mmregs[i].fpreg, \
b->fp_mmregs[i].fpreg, \
sizeof(a->fp_mmregs[i].fpreg)) \
) \
) { \
rval = 1; \
if ( !quiet ) { \
double fa = fp_ld(a, i); \
double fb = fp_ld(b, i); \
if ( ((a->ftw ^ b->ftw) & (1<<i)) ) \
fprintf(stderr,"fpreg[%u] TAG mismatch (%u != %u)\n",i,(a->ftw & (1<<i)) ? 1 : 0,(b->ftw & (1<<i)) ? 1 : 0); \
else \
fprintf(stderr,"fpreg[%u] mismatch (%g != %g)\n",i,fa,fb); \
} \
} \
} while (0)

◆ FPCW_PC

#define FPCW_PC ( x)
Value:
(((x)&3)<< 8)

◆ FPCW_RC

#define FPCW_RC ( x)
Value:
(((x)&3)<<10)

◆ FPSR_TOP

#define FPSR_TOP ( x)
Value:
(((x)&7)<<11)

◆ FPUCLOBBER

#define FPUCLOBBER
Value:
"st","st(1)","st(2)","st(3)", \
"st(4)","st(5)","st(6)","st(7)",\
"fpsr","memory"

◆ INTRAISE

#define INTRAISE ( x)
Value:
__INTRAISE(x)

◆ MKCASE

#define MKCASE ( X)
Value:
case FPE_##X: msg="FPE_"#X; break;
msg
Definition b1553brm.c:94

◆ MXCSR_RC

#define MXCSR_RC ( x)
Value:
(((x)&3)<<13)

◆ SSECLOBBER

#define SSECLOBBER
Value:
"xmm0","xmm1","xmm2","xmm3", \
"xmm4","xmm5","xmm6","xmm7"

◆ XMMCMP

#define XMMCMP ( i)
Value:
do { \
if ( memcmp(&a->xmmregs[i], \
&b->xmmregs[i], \
sizeof(a->xmmregs[i])) \
) { \
rval = 1; \
if ( !quiet ) { \
int _jj; \
fprintf(stderr,"xmmreg[%u] mismatch:\n", i); \
fprintf(stderr," "); \
for (_jj=0; _jj<16; _jj++) \
fprintf(stderr,"%02x ",a->xmmregs[i][_jj]); \
fprintf(stderr,"\n !=\n"); \
fprintf(stderr," "); \
for (_jj=0; _jj<16; _jj++) \
fprintf(stderr,"%02x ",b->xmmregs[i][_jj]); \
fprintf(stderr,"\n"); \
} \
} \
} while (0)
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