RTEMS
6.3
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bsps
arm
atsam
include
libchip
include
same70
component
component_rstc.h
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/* ---------------------------------------------------------------------------- */
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/* Atmel Microcontroller Software Support */
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/* SAM Software Package License */
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/* ---------------------------------------------------------------------------- */
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/* Copyright (c) 2015, Atmel Corporation */
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/* */
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/* All rights reserved. */
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/* */
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/* Redistribution and use in source and binary forms, with or without */
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/* modification, are permitted provided that the following condition is met: */
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/* */
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/* - Redistributions of source code must retain the above copyright notice, */
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/* this list of conditions and the disclaimer below. */
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/* */
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/* Atmel's name may not be used to endorse or promote products derived from */
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/* this software without specific prior written permission. */
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/* */
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/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
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/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
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/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
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/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
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/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
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/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
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/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
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/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
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/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
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/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
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/* ---------------------------------------------------------------------------- */
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#ifndef _SAME70_RSTC_COMPONENT_
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#define _SAME70_RSTC_COMPONENT_
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/* ============================================================================= */
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/* ============================================================================= */
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#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
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typedef
struct
{
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__O
uint32_t
RSTC_CR
;
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__I
uint32_t
RSTC_SR
;
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__IO
uint32_t
RSTC_MR
;
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}
Rstc
;
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#endif
/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
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/* -------- RSTC_CR : (RSTC Offset: 0x00) Control Register -------- */
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#define RSTC_CR_PROCRST (0x1u << 0)
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#define RSTC_CR_EXTRST (0x1u << 3)
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#define RSTC_CR_KEY_Pos 24
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#define RSTC_CR_KEY_Msk (0xffu << RSTC_CR_KEY_Pos)
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#define RSTC_CR_KEY(value) ((RSTC_CR_KEY_Msk & ((value) << RSTC_CR_KEY_Pos)))
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#define RSTC_CR_KEY_PASSWD (0xA5u << 24)
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/* -------- RSTC_SR : (RSTC Offset: 0x04) Status Register -------- */
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#define RSTC_SR_URSTS (0x1u << 0)
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#define RSTC_SR_RSTTYP_Pos 8
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#define RSTC_SR_RSTTYP_Msk (0x7u << RSTC_SR_RSTTYP_Pos)
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#define RSTC_SR_RSTTYP_GENERAL_RST (0x0u << 8)
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#define RSTC_SR_RSTTYP_BACKUP_RST (0x1u << 8)
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#define RSTC_SR_RSTTYP_WDT_RST (0x2u << 8)
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#define RSTC_SR_RSTTYP_SOFT_RST (0x3u << 8)
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#define RSTC_SR_RSTTYP_USER_RST (0x4u << 8)
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#define RSTC_SR_NRSTL (0x1u << 16)
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#define RSTC_SR_SRCMP (0x1u << 17)
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/* -------- RSTC_MR : (RSTC Offset: 0x08) Mode Register -------- */
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#define RSTC_MR_URSTEN (0x1u << 0)
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#define RSTC_MR_URSTIEN (0x1u << 4)
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#define RSTC_MR_ERSTL_Pos 8
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#define RSTC_MR_ERSTL_Msk (0xfu << RSTC_MR_ERSTL_Pos)
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#define RSTC_MR_ERSTL(value) ((RSTC_MR_ERSTL_Msk & ((value) << RSTC_MR_ERSTL_Pos)))
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#define RSTC_MR_KEY_Pos 24
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#define RSTC_MR_KEY_Msk (0xffu << RSTC_MR_KEY_Pos)
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#define RSTC_MR_KEY(value) ((RSTC_MR_KEY_Msk & ((value) << RSTC_MR_KEY_Pos)))
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#define RSTC_MR_KEY_PASSWD (0xA5u << 24)
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#endif
/* _SAME70_RSTC_COMPONENT_ */
__O
#define __O
Definition
core_cm4.h:238
__IO
#define __IO
Definition
core_cm4.h:239
__I
#define __I
Definition
core_cm4.h:236
Rstc
Rstc hardware registers.
Definition
component_rstc.h:41
Rstc::RSTC_MR
__IO uint32_t RSTC_MR
(Rstc Offset: 0x08) Mode Register
Definition
component_rstc.h:44
Rstc::RSTC_SR
__I uint32_t RSTC_SR
(Rstc Offset: 0x04) Status Register
Definition
component_rstc.h:43
Rstc::RSTC_CR
__O uint32_t RSTC_CR
(Rstc Offset: 0x00) Control Register
Definition
component_rstc.h:42
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