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#define | TMS570_DMA_GCTRL_DMA_EN BSP_BIT32(16) |
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#define | TMS570_DMA_GCTRL_BUS_BUSY BSP_BIT32(14) |
| #define | TMS570_DMA_GCTRL_DEBUG_MODE(val) |
| #define | TMS570_DMA_GCTRL_DEBUG_MODE_GET(reg) |
| #define | TMS570_DMA_GCTRL_DEBUG_MODE_SET(reg, val) |
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#define | TMS570_DMA_GCTRL_DMA_RES BSP_BIT32(0) |
| #define | TMS570_DMA_PEND_PEND(val) |
| #define | TMS570_DMA_PEND_PEND_GET(reg) |
| #define | TMS570_DMA_PEND_PEND_SET(reg, val) |
| #define | TMS570_DMA_DMASTAT_STCH(val) |
| #define | TMS570_DMA_DMASTAT_STCH_GET(reg) |
| #define | TMS570_DMA_DMASTAT_STCH_SET(reg, val) |
| #define | TMS570_DMA_HWCHENAS_HWCHENA(val) |
| #define | TMS570_DMA_HWCHENAS_HWCHENA_GET(reg) |
| #define | TMS570_DMA_HWCHENAS_HWCHENA_SET(reg, val) |
| #define | TMS570_DMA_HWCHENAR_HWCHDIS(val) |
| #define | TMS570_DMA_HWCHENAR_HWCHDIS_GET(reg) |
| #define | TMS570_DMA_HWCHENAR_HWCHDIS_SET(reg, val) |
| #define | TMS570_DMA_SWCHENAS_SWCHENA(val) |
| #define | TMS570_DMA_SWCHENAS_SWCHENA_GET(reg) |
| #define | TMS570_DMA_SWCHENAS_SWCHENA_SET(reg, val) |
| #define | TMS570_DMA_SWCHENAR_SWCHDIS(val) |
| #define | TMS570_DMA_SWCHENAR_SWCHDIS_GET(reg) |
| #define | TMS570_DMA_SWCHENAR_SWCHDIS_SET(reg, val) |
| #define | TMS570_DMA_CHPRIOS_CPS(val) |
| #define | TMS570_DMA_CHPRIOS_CPS_GET(reg) |
| #define | TMS570_DMA_CHPRIOS_CPS_SET(reg, val) |
| #define | TMS570_DMA_CHPRIOR_CPR(val) |
| #define | TMS570_DMA_CHPRIOR_CPR_GET(reg) |
| #define | TMS570_DMA_CHPRIOR_CPR_SET(reg, val) |
| #define | TMS570_DMA_GCHIENAS_GCHIE(val) |
| #define | TMS570_DMA_GCHIENAS_GCHIE_GET(reg) |
| #define | TMS570_DMA_GCHIENAS_GCHIE_SET(reg, val) |
| #define | TMS570_DMA_GCHIENAR_GCHID(val) |
| #define | TMS570_DMA_GCHIENAR_GCHID_GET(reg) |
| #define | TMS570_DMA_GCHIENAR_GCHID_SET(reg, val) |
| #define | TMS570_DMA_DREQASI_CH0ASI(val) |
| #define | TMS570_DMA_DREQASI_CH0ASI_GET(reg) |
| #define | TMS570_DMA_DREQASI_CH0ASI_SET(reg, val) |
| #define | TMS570_DMA_DREQASI_CH1ASI(val) |
| #define | TMS570_DMA_DREQASI_CH1ASI_GET(reg) |
| #define | TMS570_DMA_DREQASI_CH1ASI_SET(reg, val) |
| #define | TMS570_DMA_DREQASI_CH2ASI(val) |
| #define | TMS570_DMA_DREQASI_CH2ASI_GET(reg) |
| #define | TMS570_DMA_DREQASI_CH2ASI_SET(reg, val) |
| #define | TMS570_DMA_DREQASI_CH3ASI(val) |
| #define | TMS570_DMA_DREQASI_CH3ASI_GET(reg) |
| #define | TMS570_DMA_DREQASI_CH3ASI_SET(reg, val) |
| #define | TMS570_DMA_PAR0_CH0PA(val) |
| #define | TMS570_DMA_PAR0_CH0PA_GET(reg) |
| #define | TMS570_DMA_PAR0_CH0PA_SET(reg, val) |
| #define | TMS570_DMA_PAR0_CH1PA(val) |
| #define | TMS570_DMA_PAR0_CH1PA_GET(reg) |
| #define | TMS570_DMA_PAR0_CH1PA_SET(reg, val) |
| #define | TMS570_DMA_PAR0_CH2PA(val) |
| #define | TMS570_DMA_PAR0_CH2PA_GET(reg) |
| #define | TMS570_DMA_PAR0_CH2PA_SET(reg, val) |
| #define | TMS570_DMA_PAR0_CH3PA(val) |
| #define | TMS570_DMA_PAR0_CH3PA_GET(reg) |
| #define | TMS570_DMA_PAR0_CH3PA_SET(reg, val) |
| #define | TMS570_DMA_PAR0_CH4PA(val) |
| #define | TMS570_DMA_PAR0_CH4PA_GET(reg) |
| #define | TMS570_DMA_PAR0_CH4PA_SET(reg, val) |
| #define | TMS570_DMA_PAR0_CH5PA(val) |
| #define | TMS570_DMA_PAR0_CH5PA_GET(reg) |
| #define | TMS570_DMA_PAR0_CH5PA_SET(reg, val) |
| #define | TMS570_DMA_PAR0_CH6PA(val) |
| #define | TMS570_DMA_PAR0_CH6PA_GET(reg) |
| #define | TMS570_DMA_PAR0_CH6PA_SET(reg, val) |
| #define | TMS570_DMA_PAR0_CH7PA(val) |
| #define | TMS570_DMA_PAR0_CH7PA_GET(reg) |
| #define | TMS570_DMA_PAR0_CH7PA_SET(reg, val) |
| #define | TMS570_DMA_PAR1_CH8PA(val) |
| #define | TMS570_DMA_PAR1_CH8PA_GET(reg) |
| #define | TMS570_DMA_PAR1_CH8PA_SET(reg, val) |
| #define | TMS570_DMA_PAR1_CH9PA(val) |
| #define | TMS570_DMA_PAR1_CH9PA_GET(reg) |
| #define | TMS570_DMA_PAR1_CH9PA_SET(reg, val) |
| #define | TMS570_DMA_PAR1_CH10PA(val) |
| #define | TMS570_DMA_PAR1_CH10PA_GET(reg) |
| #define | TMS570_DMA_PAR1_CH10PA_SET(reg, val) |
| #define | TMS570_DMA_PAR1_CH11PA(val) |
| #define | TMS570_DMA_PAR1_CH11PA_GET(reg) |
| #define | TMS570_DMA_PAR1_CH11PA_SET(reg, val) |
| #define | TMS570_DMA_PAR1_CH12PA(val) |
| #define | TMS570_DMA_PAR1_CH12PA_GET(reg) |
| #define | TMS570_DMA_PAR1_CH12PA_SET(reg, val) |
| #define | TMS570_DMA_PAR1_CH13PA(val) |
| #define | TMS570_DMA_PAR1_CH13PA_GET(reg) |
| #define | TMS570_DMA_PAR1_CH13PA_SET(reg, val) |
| #define | TMS570_DMA_PAR1_CH14PA(val) |
| #define | TMS570_DMA_PAR1_CH14PA_GET(reg) |
| #define | TMS570_DMA_PAR1_CH14PA_SET(reg, val) |
| #define | TMS570_DMA_PAR1_CH15PA(val) |
| #define | TMS570_DMA_PAR1_CH15PA_GET(reg) |
| #define | TMS570_DMA_PAR1_CH15PA_SET(reg, val) |
| #define | TMS570_DMA_FTCMAP_FTCAB(val) |
| #define | TMS570_DMA_FTCMAP_FTCAB_GET(reg) |
| #define | TMS570_DMA_FTCMAP_FTCAB_SET(reg, val) |
| #define | TMS570_DMA_LFSMAP_LFSAB(val) |
| #define | TMS570_DMA_LFSMAP_LFSAB_GET(reg) |
| #define | TMS570_DMA_LFSMAP_LFSAB_SET(reg, val) |
| #define | TMS570_DMA_HBCMAP_HBCAB(val) |
| #define | TMS570_DMA_HBCMAP_HBCAB_GET(reg) |
| #define | TMS570_DMA_HBCMAP_HBCAB_SET(reg, val) |
| #define | TMS570_DMA_BTCMAP_BTCAB(val) |
| #define | TMS570_DMA_BTCMAP_BTCAB_GET(reg) |
| #define | TMS570_DMA_BTCMAP_BTCAB_SET(reg, val) |
| #define | TMS570_DMA_BERMAP_BERAB(val) |
| #define | TMS570_DMA_BERMAP_BERAB_GET(reg) |
| #define | TMS570_DMA_BERMAP_BERAB_SET(reg, val) |
| #define | TMS570_DMA_FTCINTENAS_FTCINTENA(val) |
| #define | TMS570_DMA_FTCINTENAS_FTCINTENA_GET(reg) |
| #define | TMS570_DMA_FTCINTENAS_FTCINTENA_SET(reg, val) |
| #define | TMS570_DMA_FTCINTENAR_FTCINTDIS(val) |
| #define | TMS570_DMA_FTCINTENAR_FTCINTDIS_GET(reg) |
| #define | TMS570_DMA_FTCINTENAR_FTCINTDIS_SET(reg, val) |
| #define | TMS570_DMA_LFSINTENAS_LFSINTENA(val) |
| #define | TMS570_DMA_LFSINTENAS_LFSINTENA_GET(reg) |
| #define | TMS570_DMA_LFSINTENAS_LFSINTENA_SET(reg, val) |
| #define | TMS570_DMA_LFSINTENAR_LFSINTDIS(val) |
| #define | TMS570_DMA_LFSINTENAR_LFSINTDIS_GET(reg) |
| #define | TMS570_DMA_LFSINTENAR_LFSINTDIS_SET(reg, val) |
| #define | TMS570_DMA_HBCINTENAS_HBCINTENA(val) |
| #define | TMS570_DMA_HBCINTENAS_HBCINTENA_GET(reg) |
| #define | TMS570_DMA_HBCINTENAS_HBCINTENA_SET(reg, val) |
| #define | TMS570_DMA_HBCINTENAR_HBCINTDIS(val) |
| #define | TMS570_DMA_HBCINTENAR_HBCINTDIS_GET(reg) |
| #define | TMS570_DMA_HBCINTENAR_HBCINTDIS_SET(reg, val) |
| #define | TMS570_DMA_BTCINTENAS_BTCINTENA(val) |
| #define | TMS570_DMA_BTCINTENAS_BTCINTENA_GET(reg) |
| #define | TMS570_DMA_BTCINTENAS_BTCINTENA_SET(reg, val) |
| #define | TMS570_DMA_BTCINTENAR_BTCINTDIS(val) |
| #define | TMS570_DMA_BTCINTENAR_BTCINTDIS_GET(reg) |
| #define | TMS570_DMA_BTCINTENAR_BTCINTDIS_SET(reg, val) |
| #define | TMS570_DMA_GINTFLAG_GINT(val) |
| #define | TMS570_DMA_GINTFLAG_GINT_GET(reg) |
| #define | TMS570_DMA_GINTFLAG_GINT_SET(reg, val) |
| #define | TMS570_DMA_FTCFLAG_FTCI(val) |
| #define | TMS570_DMA_FTCFLAG_FTCI_GET(reg) |
| #define | TMS570_DMA_FTCFLAG_FTCI_SET(reg, val) |
| #define | TMS570_DMA_LFSFLAG_LFSI(val) |
| #define | TMS570_DMA_LFSFLAG_LFSI_GET(reg) |
| #define | TMS570_DMA_LFSFLAG_LFSI_SET(reg, val) |
| #define | TMS570_DMA_HBCFLAG_HBCI(val) |
| #define | TMS570_DMA_HBCFLAG_HBCI_GET(reg) |
| #define | TMS570_DMA_HBCFLAG_HBCI_SET(reg, val) |
| #define | TMS570_DMA_BTCFLAG_BTCI(val) |
| #define | TMS570_DMA_BTCFLAG_BTCI_GET(reg) |
| #define | TMS570_DMA_BTCFLAG_BTCI_SET(reg, val) |
| #define | TMS570_DMA_BERFLAG_BERI(val) |
| #define | TMS570_DMA_BERFLAG_BERI_GET(reg) |
| #define | TMS570_DMA_BERFLAG_BERI_SET(reg, val) |
| #define | TMS570_DMA_FTCAOFFSET_sbz(val) |
| #define | TMS570_DMA_FTCAOFFSET_sbz_GET(reg) |
| #define | TMS570_DMA_FTCAOFFSET_sbz_SET(reg, val) |
| #define | TMS570_DMA_FTCAOFFSET_FTCA(val) |
| #define | TMS570_DMA_FTCAOFFSET_FTCA_GET(reg) |
| #define | TMS570_DMA_FTCAOFFSET_FTCA_SET(reg, val) |
| #define | TMS570_DMA_LFSAOFFSET_LFSA(val) |
| #define | TMS570_DMA_LFSAOFFSET_LFSA_GET(reg) |
| #define | TMS570_DMA_LFSAOFFSET_LFSA_SET(reg, val) |
| #define | TMS570_DMA_HBCAOFFSET_HBCA(val) |
| #define | TMS570_DMA_HBCAOFFSET_HBCA_GET(reg) |
| #define | TMS570_DMA_HBCAOFFSET_HBCA_SET(reg, val) |
| #define | TMS570_DMA_BTCAOFFSET_BTCA(val) |
| #define | TMS570_DMA_BTCAOFFSET_BTCA_GET(reg) |
| #define | TMS570_DMA_BTCAOFFSET_BTCA_SET(reg, val) |
| #define | TMS570_DMA_BERAOFFSET_BERA(val) |
| #define | TMS570_DMA_BERAOFFSET_BERA_GET(reg) |
| #define | TMS570_DMA_BERAOFFSET_BERA_SET(reg, val) |
| #define | TMS570_DMA_FTCBOFFSET_FTCB(val) |
| #define | TMS570_DMA_FTCBOFFSET_FTCB_GET(reg) |
| #define | TMS570_DMA_FTCBOFFSET_FTCB_SET(reg, val) |
| #define | TMS570_DMA_LFSBOFFSET_LFSB(val) |
| #define | TMS570_DMA_LFSBOFFSET_LFSB_GET(reg) |
| #define | TMS570_DMA_LFSBOFFSET_LFSB_SET(reg, val) |
| #define | TMS570_DMA_HBCBOFFSET_HBCB(val) |
| #define | TMS570_DMA_HBCBOFFSET_HBCB_GET(reg) |
| #define | TMS570_DMA_HBCBOFFSET_HBCB_SET(reg, val) |
| #define | TMS570_DMA_BTCBOFFSET_BTCB(val) |
| #define | TMS570_DMA_BTCBOFFSET_BTCB_GET(reg) |
| #define | TMS570_DMA_BTCBOFFSET_BTCB_SET(reg, val) |
| #define | TMS570_DMA_BERBOFFSET_BERB(val) |
| #define | TMS570_DMA_BERBOFFSET_BERB_GET(reg) |
| #define | TMS570_DMA_BERBOFFSET_BERB_SET(reg, val) |
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#define | TMS570_DMA_PTCRL_PENDB BSP_BIT32(24) |
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#define | TMS570_DMA_PTCRL_BYB BSP_BIT32(18) |
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#define | TMS570_DMA_PTCRL_PSFRHQPB BSP_BIT32(17) |
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#define | TMS570_DMA_PTCRL_PSFRLQPB BSP_BIT32(16) |
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#define | TMS570_DMA_RTCTRL_RTC BSP_BIT32(0) |
| #define | TMS570_DMA_DCTRL_CHNUM(val) |
| #define | TMS570_DMA_DCTRL_CHNUM_GET(reg) |
| #define | TMS570_DMA_DCTRL_CHNUM_SET(reg, val) |
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#define | TMS570_DMA_DCTRL_DMADBGS BSP_BIT32(16) |
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#define | TMS570_DMA_DCTRL_DBGEN BSP_BIT32(0) |
| #define | TMS570_DMA_PBACTC_PBFTCOUNT(val) |
| #define | TMS570_DMA_PBACTC_PBFTCOUNT_GET(reg) |
| #define | TMS570_DMA_PBACTC_PBFTCOUNT_SET(reg, val) |
| #define | TMS570_DMA_PBACTC_PBETCOUNT(val) |
| #define | TMS570_DMA_PBACTC_PBETCOUNT_GET(reg) |
| #define | TMS570_DMA_PBACTC_PBETCOUNT_SET(reg, val) |
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#define | TMS570_DMA_DMAPCR_ERRA BSP_BIT32(16) |
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#define | TMS570_DMA_DMAPCR_TEST BSP_BIT32(8) |
| #define | TMS570_DMA_DMAPCR_PARITY_ENA(val) |
| #define | TMS570_DMA_DMAPCR_PARITY_ENA_GET(reg) |
| #define | TMS570_DMA_DMAPCR_PARITY_ENA_SET(reg, val) |
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#define | TMS570_DMA_DMAPAR_EDFLAG BSP_BIT32(24) |
| #define | TMS570_DMA_DMAPAR_ERRORADDRESS(val) |
| #define | TMS570_DMA_DMAPAR_ERRORADDRESS_GET(reg) |
| #define | TMS570_DMA_DMAPAR_ERRORADDRESS_SET(reg, val) |
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#define | TMS570_DMA_DMAMPCTRL_INT3AB BSP_BIT32(28) |
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#define | TMS570_DMA_DMAMPCTRL_INT3ENA BSP_BIT32(27) |
| #define | TMS570_DMA_DMAMPCTRL_REG3AP(val) |
| #define | TMS570_DMA_DMAMPCTRL_REG3AP_GET(reg) |
| #define | TMS570_DMA_DMAMPCTRL_REG3AP_SET(reg, val) |
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#define | TMS570_DMA_DMAMPCTRL_REG3ENA BSP_BIT32(24) |
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#define | TMS570_DMA_DMAMPCTRL_INT2AB BSP_BIT32(20) |
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#define | TMS570_DMA_DMAMPCTRL_INT2ENA BSP_BIT32(19) |
| #define | TMS570_DMA_DMAMPCTRL_REG2AP(val) |
| #define | TMS570_DMA_DMAMPCTRL_REG2AP_GET(reg) |
| #define | TMS570_DMA_DMAMPCTRL_REG2AP_SET(reg, val) |
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#define | TMS570_DMA_DMAMPCTRL_REG2ENA BSP_BIT32(16) |
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#define | TMS570_DMA_DMAMPCTRL_INT1AB BSP_BIT32(12) |
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#define | TMS570_DMA_DMAMPCTRL_INT1ENA BSP_BIT32(11) |
| #define | TMS570_DMA_DMAMPCTRL_REG1AP(val) |
| #define | TMS570_DMA_DMAMPCTRL_REG1AP_GET(reg) |
| #define | TMS570_DMA_DMAMPCTRL_REG1AP_SET(reg, val) |
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#define | TMS570_DMA_DMAMPCTRL_REG1ENA BSP_BIT32(8) |
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#define | TMS570_DMA_DMAMPCTRL_INT0AB BSP_BIT32(4) |
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#define | TMS570_DMA_DMAMPCTRL_INT0ENA BSP_BIT32(3) |
| #define | TMS570_DMA_DMAMPCTRL_REG0AP(val) |
| #define | TMS570_DMA_DMAMPCTRL_REG0AP_GET(reg) |
| #define | TMS570_DMA_DMAMPCTRL_REG0AP_SET(reg, val) |
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#define | TMS570_DMA_DMAMPCTRL_REG0ENA BSP_BIT32(0) |
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#define | TMS570_DMA_DMAMPST_REG3FT BSP_BIT32(24) |
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#define | TMS570_DMA_DMAMPST_REG2FT BSP_BIT32(16) |
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#define | TMS570_DMA_DMAMPST_REG1FT BSP_BIT32(8) |
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#define | TMS570_DMA_DMAMPST_REG0FT BSP_BIT32(0) |
This header file provides DMA interfaces.