RTEMS 6.3
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Intel Architecture local and I/O APIC definitions. More...

Macros

#define APIC_BCAST_ID   0xFF
#define APIC_VERSION(x)
 APIC version register.
#define APIC_MAXREDIR(x)
#define APIC_ID(x)
 APIC id register.
#define APIC_VER_NEW   0x10
#define IOAPIC_REGSEL   0
#define IOAPIC_RW   0x10
#define IOAPIC_ID   0
#define IOAPIC_VER   1
#define IOAPIC_REDIR   0x10
#define LAPIC_ID   0x20
#define LAPIC_VER   0x30
#define LAPIC_TPR   0x80
#define LAPIC_APR   0x90
#define LAPIC_PPR   0xA0
#define LAPIC_EOI   0xB0
#define LAPIC_LDR   0xD0
#define LAPIC_DFR   0xE0
#define LAPIC_SPIV   0xF0
#define LAPIC_SPIV_ENABLE_APIC   0x100
#define LAPIC_ISR   0x100
#define LAPIC_TMR   0x180
#define LAPIC_IRR   0x200
#define LAPIC_ESR   0x280
#define LAPIC_ICR   0x300
#define LAPIC_ICR_DS_SELF   0x40000
#define LAPIC_ICR_DS_ALLINC   0x80000
#define LAPIC_ICR_DS_ALLEX   0xC0000
#define LAPIC_ICR_TM_LEVEL   0x8000
#define LAPIC_ICR_LEVELASSERT   0x4000
#define LAPIC_ICR_STATUS_PEND   0x1000
#define LAPIC_ICR_DM_LOGICAL   0x800
#define LAPIC_ICR_DM_LOWPRI   0x100
#define LAPIC_ICR_DM_SMI   0x200
#define LAPIC_ICR_DM_NMI   0x400
#define LAPIC_ICR_DM_INIT   0x500
#define LAPIC_ICR_DM_SIPI   0x600
#define LAPIC_LVTT   0x320
#define LAPIC_LVTPC   0x340
#define LAPIC_LVT0   0x350
#define LAPIC_LVT1   0x360
#define LAPIC_LVTE   0x370
#define LAPIC_TICR   0x380
#define LAPIC_TCCR   0x390
#define LAPIC_TDCR   0x3E0

Detailed Description

Intel Architecture local and I/O APIC definitions.

Macro Definition Documentation

◆ APIC_ID

#define APIC_ID ( x)
Value:
((x) >> 24)

APIC id register.

◆ APIC_MAXREDIR

#define APIC_MAXREDIR ( x)
Value:
(((x) >> 16) & 0xFF)

◆ APIC_VERSION

#define APIC_VERSION ( x)
Value:
((x) & 0xFF)

APIC version register.