|
|
#define | XBARA_SEL0_SEL0_MASK (0x7FU) |
|
#define | XBARA_SEL0_SEL0_SHIFT (0U) |
| #define | XBARA_SEL0_SEL0(x) |
|
#define | XBARA_SEL0_SEL1_MASK (0x7F00U) |
|
#define | XBARA_SEL0_SEL1_SHIFT (8U) |
| #define | XBARA_SEL0_SEL1(x) |
|
#define | XBARA_SEL0_SEL0_MASK (0xFFU) |
|
#define | XBARA_SEL0_SEL0_SHIFT (0U) |
| #define | XBARA_SEL0_SEL0(x) |
|
#define | XBARA_SEL0_SEL1_MASK (0xFF00U) |
|
#define | XBARA_SEL0_SEL1_SHIFT (8U) |
| #define | XBARA_SEL0_SEL1(x) |
|
#define | XBARA_SEL0_SEL0_MASK (0xFFU) |
|
#define | XBARA_SEL0_SEL0_SHIFT (0U) |
| #define | XBARA_SEL0_SEL0(x) |
|
#define | XBARA_SEL0_SEL1_MASK (0xFF00U) |
|
#define | XBARA_SEL0_SEL1_SHIFT (8U) |
| #define | XBARA_SEL0_SEL1(x) |
|
|
#define | XBARA_SEL1_SEL2_MASK (0x7FU) |
|
#define | XBARA_SEL1_SEL2_SHIFT (0U) |
| #define | XBARA_SEL1_SEL2(x) |
|
#define | XBARA_SEL1_SEL3_MASK (0x7F00U) |
|
#define | XBARA_SEL1_SEL3_SHIFT (8U) |
| #define | XBARA_SEL1_SEL3(x) |
|
#define | XBARA_SEL1_SEL2_MASK (0xFFU) |
|
#define | XBARA_SEL1_SEL2_SHIFT (0U) |
| #define | XBARA_SEL1_SEL2(x) |
|
#define | XBARA_SEL1_SEL3_MASK (0xFF00U) |
|
#define | XBARA_SEL1_SEL3_SHIFT (8U) |
| #define | XBARA_SEL1_SEL3(x) |
|
#define | XBARA_SEL1_SEL2_MASK (0xFFU) |
|
#define | XBARA_SEL1_SEL2_SHIFT (0U) |
| #define | XBARA_SEL1_SEL2(x) |
|
#define | XBARA_SEL1_SEL3_MASK (0xFF00U) |
|
#define | XBARA_SEL1_SEL3_SHIFT (8U) |
| #define | XBARA_SEL1_SEL3(x) |
|
|
#define | XBARA_SEL2_SEL4_MASK (0x7FU) |
|
#define | XBARA_SEL2_SEL4_SHIFT (0U) |
| #define | XBARA_SEL2_SEL4(x) |
|
#define | XBARA_SEL2_SEL5_MASK (0x7F00U) |
|
#define | XBARA_SEL2_SEL5_SHIFT (8U) |
| #define | XBARA_SEL2_SEL5(x) |
|
#define | XBARA_SEL2_SEL4_MASK (0xFFU) |
|
#define | XBARA_SEL2_SEL4_SHIFT (0U) |
| #define | XBARA_SEL2_SEL4(x) |
|
#define | XBARA_SEL2_SEL5_MASK (0xFF00U) |
|
#define | XBARA_SEL2_SEL5_SHIFT (8U) |
| #define | XBARA_SEL2_SEL5(x) |
|
#define | XBARA_SEL2_SEL4_MASK (0xFFU) |
|
#define | XBARA_SEL2_SEL4_SHIFT (0U) |
| #define | XBARA_SEL2_SEL4(x) |
|
#define | XBARA_SEL2_SEL5_MASK (0xFF00U) |
|
#define | XBARA_SEL2_SEL5_SHIFT (8U) |
| #define | XBARA_SEL2_SEL5(x) |
|
|
#define | XBARA_SEL3_SEL6_MASK (0x7FU) |
|
#define | XBARA_SEL3_SEL6_SHIFT (0U) |
| #define | XBARA_SEL3_SEL6(x) |
|
#define | XBARA_SEL3_SEL7_MASK (0x7F00U) |
|
#define | XBARA_SEL3_SEL7_SHIFT (8U) |
| #define | XBARA_SEL3_SEL7(x) |
|
#define | XBARA_SEL3_SEL6_MASK (0xFFU) |
|
#define | XBARA_SEL3_SEL6_SHIFT (0U) |
| #define | XBARA_SEL3_SEL6(x) |
|
#define | XBARA_SEL3_SEL7_MASK (0xFF00U) |
|
#define | XBARA_SEL3_SEL7_SHIFT (8U) |
| #define | XBARA_SEL3_SEL7(x) |
|
#define | XBARA_SEL3_SEL6_MASK (0xFFU) |
|
#define | XBARA_SEL3_SEL6_SHIFT (0U) |
| #define | XBARA_SEL3_SEL6(x) |
|
#define | XBARA_SEL3_SEL7_MASK (0xFF00U) |
|
#define | XBARA_SEL3_SEL7_SHIFT (8U) |
| #define | XBARA_SEL3_SEL7(x) |
|
|
#define | XBARA_SEL4_SEL8_MASK (0x7FU) |
|
#define | XBARA_SEL4_SEL8_SHIFT (0U) |
| #define | XBARA_SEL4_SEL8(x) |
|
#define | XBARA_SEL4_SEL9_MASK (0x7F00U) |
|
#define | XBARA_SEL4_SEL9_SHIFT (8U) |
| #define | XBARA_SEL4_SEL9(x) |
|
#define | XBARA_SEL4_SEL8_MASK (0xFFU) |
|
#define | XBARA_SEL4_SEL8_SHIFT (0U) |
| #define | XBARA_SEL4_SEL8(x) |
|
#define | XBARA_SEL4_SEL9_MASK (0xFF00U) |
|
#define | XBARA_SEL4_SEL9_SHIFT (8U) |
| #define | XBARA_SEL4_SEL9(x) |
|
#define | XBARA_SEL4_SEL8_MASK (0xFFU) |
|
#define | XBARA_SEL4_SEL8_SHIFT (0U) |
| #define | XBARA_SEL4_SEL8(x) |
|
#define | XBARA_SEL4_SEL9_MASK (0xFF00U) |
|
#define | XBARA_SEL4_SEL9_SHIFT (8U) |
| #define | XBARA_SEL4_SEL9(x) |
|
|
#define | XBARA_SEL5_SEL10_MASK (0x7FU) |
|
#define | XBARA_SEL5_SEL10_SHIFT (0U) |
| #define | XBARA_SEL5_SEL10(x) |
|
#define | XBARA_SEL5_SEL11_MASK (0x7F00U) |
|
#define | XBARA_SEL5_SEL11_SHIFT (8U) |
| #define | XBARA_SEL5_SEL11(x) |
|
#define | XBARA_SEL5_SEL10_MASK (0xFFU) |
|
#define | XBARA_SEL5_SEL10_SHIFT (0U) |
| #define | XBARA_SEL5_SEL10(x) |
|
#define | XBARA_SEL5_SEL11_MASK (0xFF00U) |
|
#define | XBARA_SEL5_SEL11_SHIFT (8U) |
| #define | XBARA_SEL5_SEL11(x) |
|
#define | XBARA_SEL5_SEL10_MASK (0xFFU) |
|
#define | XBARA_SEL5_SEL10_SHIFT (0U) |
| #define | XBARA_SEL5_SEL10(x) |
|
#define | XBARA_SEL5_SEL11_MASK (0xFF00U) |
|
#define | XBARA_SEL5_SEL11_SHIFT (8U) |
| #define | XBARA_SEL5_SEL11(x) |
|
|
#define | XBARA_SEL6_SEL12_MASK (0x7FU) |
|
#define | XBARA_SEL6_SEL12_SHIFT (0U) |
| #define | XBARA_SEL6_SEL12(x) |
|
#define | XBARA_SEL6_SEL13_MASK (0x7F00U) |
|
#define | XBARA_SEL6_SEL13_SHIFT (8U) |
| #define | XBARA_SEL6_SEL13(x) |
|
#define | XBARA_SEL6_SEL12_MASK (0xFFU) |
|
#define | XBARA_SEL6_SEL12_SHIFT (0U) |
| #define | XBARA_SEL6_SEL12(x) |
|
#define | XBARA_SEL6_SEL13_MASK (0xFF00U) |
|
#define | XBARA_SEL6_SEL13_SHIFT (8U) |
| #define | XBARA_SEL6_SEL13(x) |
|
#define | XBARA_SEL6_SEL12_MASK (0xFFU) |
|
#define | XBARA_SEL6_SEL12_SHIFT (0U) |
| #define | XBARA_SEL6_SEL12(x) |
|
#define | XBARA_SEL6_SEL13_MASK (0xFF00U) |
|
#define | XBARA_SEL6_SEL13_SHIFT (8U) |
| #define | XBARA_SEL6_SEL13(x) |
|
|
#define | XBARA_SEL7_SEL14_MASK (0x7FU) |
|
#define | XBARA_SEL7_SEL14_SHIFT (0U) |
| #define | XBARA_SEL7_SEL14(x) |
|
#define | XBARA_SEL7_SEL15_MASK (0x7F00U) |
|
#define | XBARA_SEL7_SEL15_SHIFT (8U) |
| #define | XBARA_SEL7_SEL15(x) |
|
#define | XBARA_SEL7_SEL14_MASK (0xFFU) |
|
#define | XBARA_SEL7_SEL14_SHIFT (0U) |
| #define | XBARA_SEL7_SEL14(x) |
|
#define | XBARA_SEL7_SEL15_MASK (0xFF00U) |
|
#define | XBARA_SEL7_SEL15_SHIFT (8U) |
| #define | XBARA_SEL7_SEL15(x) |
|
#define | XBARA_SEL7_SEL14_MASK (0xFFU) |
|
#define | XBARA_SEL7_SEL14_SHIFT (0U) |
| #define | XBARA_SEL7_SEL14(x) |
|
#define | XBARA_SEL7_SEL15_MASK (0xFF00U) |
|
#define | XBARA_SEL7_SEL15_SHIFT (8U) |
| #define | XBARA_SEL7_SEL15(x) |
|
|
#define | XBARA_SEL8_SEL16_MASK (0x7FU) |
|
#define | XBARA_SEL8_SEL16_SHIFT (0U) |
| #define | XBARA_SEL8_SEL16(x) |
|
#define | XBARA_SEL8_SEL17_MASK (0x7F00U) |
|
#define | XBARA_SEL8_SEL17_SHIFT (8U) |
| #define | XBARA_SEL8_SEL17(x) |
|
#define | XBARA_SEL8_SEL16_MASK (0xFFU) |
|
#define | XBARA_SEL8_SEL16_SHIFT (0U) |
| #define | XBARA_SEL8_SEL16(x) |
|
#define | XBARA_SEL8_SEL17_MASK (0xFF00U) |
|
#define | XBARA_SEL8_SEL17_SHIFT (8U) |
| #define | XBARA_SEL8_SEL17(x) |
|
#define | XBARA_SEL8_SEL16_MASK (0xFFU) |
|
#define | XBARA_SEL8_SEL16_SHIFT (0U) |
| #define | XBARA_SEL8_SEL16(x) |
|
#define | XBARA_SEL8_SEL17_MASK (0xFF00U) |
|
#define | XBARA_SEL8_SEL17_SHIFT (8U) |
| #define | XBARA_SEL8_SEL17(x) |
|
|
#define | XBARA_SEL9_SEL18_MASK (0x7FU) |
|
#define | XBARA_SEL9_SEL18_SHIFT (0U) |
| #define | XBARA_SEL9_SEL18(x) |
|
#define | XBARA_SEL9_SEL19_MASK (0x7F00U) |
|
#define | XBARA_SEL9_SEL19_SHIFT (8U) |
| #define | XBARA_SEL9_SEL19(x) |
|
#define | XBARA_SEL9_SEL18_MASK (0xFFU) |
|
#define | XBARA_SEL9_SEL18_SHIFT (0U) |
| #define | XBARA_SEL9_SEL18(x) |
|
#define | XBARA_SEL9_SEL19_MASK (0xFF00U) |
|
#define | XBARA_SEL9_SEL19_SHIFT (8U) |
| #define | XBARA_SEL9_SEL19(x) |
|
#define | XBARA_SEL9_SEL18_MASK (0xFFU) |
|
#define | XBARA_SEL9_SEL18_SHIFT (0U) |
| #define | XBARA_SEL9_SEL18(x) |
|
#define | XBARA_SEL9_SEL19_MASK (0xFF00U) |
|
#define | XBARA_SEL9_SEL19_SHIFT (8U) |
| #define | XBARA_SEL9_SEL19(x) |
|
|
#define | XBARA_SEL10_SEL20_MASK (0x7FU) |
|
#define | XBARA_SEL10_SEL20_SHIFT (0U) |
| #define | XBARA_SEL10_SEL20(x) |
|
#define | XBARA_SEL10_SEL21_MASK (0x7F00U) |
|
#define | XBARA_SEL10_SEL21_SHIFT (8U) |
| #define | XBARA_SEL10_SEL21(x) |
|
#define | XBARA_SEL10_SEL20_MASK (0xFFU) |
|
#define | XBARA_SEL10_SEL20_SHIFT (0U) |
| #define | XBARA_SEL10_SEL20(x) |
|
#define | XBARA_SEL10_SEL21_MASK (0xFF00U) |
|
#define | XBARA_SEL10_SEL21_SHIFT (8U) |
| #define | XBARA_SEL10_SEL21(x) |
|
#define | XBARA_SEL10_SEL20_MASK (0xFFU) |
|
#define | XBARA_SEL10_SEL20_SHIFT (0U) |
| #define | XBARA_SEL10_SEL20(x) |
|
#define | XBARA_SEL10_SEL21_MASK (0xFF00U) |
|
#define | XBARA_SEL10_SEL21_SHIFT (8U) |
| #define | XBARA_SEL10_SEL21(x) |
|
|
#define | XBARA_SEL11_SEL22_MASK (0x7FU) |
|
#define | XBARA_SEL11_SEL22_SHIFT (0U) |
| #define | XBARA_SEL11_SEL22(x) |
|
#define | XBARA_SEL11_SEL23_MASK (0x7F00U) |
|
#define | XBARA_SEL11_SEL23_SHIFT (8U) |
| #define | XBARA_SEL11_SEL23(x) |
|
#define | XBARA_SEL11_SEL22_MASK (0xFFU) |
|
#define | XBARA_SEL11_SEL22_SHIFT (0U) |
| #define | XBARA_SEL11_SEL22(x) |
|
#define | XBARA_SEL11_SEL23_MASK (0xFF00U) |
|
#define | XBARA_SEL11_SEL23_SHIFT (8U) |
| #define | XBARA_SEL11_SEL23(x) |
|
#define | XBARA_SEL11_SEL22_MASK (0xFFU) |
|
#define | XBARA_SEL11_SEL22_SHIFT (0U) |
| #define | XBARA_SEL11_SEL22(x) |
|
#define | XBARA_SEL11_SEL23_MASK (0xFF00U) |
|
#define | XBARA_SEL11_SEL23_SHIFT (8U) |
| #define | XBARA_SEL11_SEL23(x) |
|
|
#define | XBARA_SEL12_SEL24_MASK (0x7FU) |
|
#define | XBARA_SEL12_SEL24_SHIFT (0U) |
| #define | XBARA_SEL12_SEL24(x) |
|
#define | XBARA_SEL12_SEL25_MASK (0x7F00U) |
|
#define | XBARA_SEL12_SEL25_SHIFT (8U) |
| #define | XBARA_SEL12_SEL25(x) |
|
#define | XBARA_SEL12_SEL24_MASK (0xFFU) |
|
#define | XBARA_SEL12_SEL24_SHIFT (0U) |
| #define | XBARA_SEL12_SEL24(x) |
|
#define | XBARA_SEL12_SEL25_MASK (0xFF00U) |
|
#define | XBARA_SEL12_SEL25_SHIFT (8U) |
| #define | XBARA_SEL12_SEL25(x) |
|
#define | XBARA_SEL12_SEL24_MASK (0xFFU) |
|
#define | XBARA_SEL12_SEL24_SHIFT (0U) |
| #define | XBARA_SEL12_SEL24(x) |
|
#define | XBARA_SEL12_SEL25_MASK (0xFF00U) |
|
#define | XBARA_SEL12_SEL25_SHIFT (8U) |
| #define | XBARA_SEL12_SEL25(x) |
|
|
#define | XBARA_SEL13_SEL26_MASK (0x7FU) |
|
#define | XBARA_SEL13_SEL26_SHIFT (0U) |
| #define | XBARA_SEL13_SEL26(x) |
|
#define | XBARA_SEL13_SEL27_MASK (0x7F00U) |
|
#define | XBARA_SEL13_SEL27_SHIFT (8U) |
| #define | XBARA_SEL13_SEL27(x) |
|
#define | XBARA_SEL13_SEL26_MASK (0xFFU) |
|
#define | XBARA_SEL13_SEL26_SHIFT (0U) |
| #define | XBARA_SEL13_SEL26(x) |
|
#define | XBARA_SEL13_SEL27_MASK (0xFF00U) |
|
#define | XBARA_SEL13_SEL27_SHIFT (8U) |
| #define | XBARA_SEL13_SEL27(x) |
|
#define | XBARA_SEL13_SEL26_MASK (0xFFU) |
|
#define | XBARA_SEL13_SEL26_SHIFT (0U) |
| #define | XBARA_SEL13_SEL26(x) |
|
#define | XBARA_SEL13_SEL27_MASK (0xFF00U) |
|
#define | XBARA_SEL13_SEL27_SHIFT (8U) |
| #define | XBARA_SEL13_SEL27(x) |
|
|
#define | XBARA_SEL14_SEL28_MASK (0x7FU) |
|
#define | XBARA_SEL14_SEL28_SHIFT (0U) |
| #define | XBARA_SEL14_SEL28(x) |
|
#define | XBARA_SEL14_SEL29_MASK (0x7F00U) |
|
#define | XBARA_SEL14_SEL29_SHIFT (8U) |
| #define | XBARA_SEL14_SEL29(x) |
|
#define | XBARA_SEL14_SEL28_MASK (0xFFU) |
|
#define | XBARA_SEL14_SEL28_SHIFT (0U) |
| #define | XBARA_SEL14_SEL28(x) |
|
#define | XBARA_SEL14_SEL29_MASK (0xFF00U) |
|
#define | XBARA_SEL14_SEL29_SHIFT (8U) |
| #define | XBARA_SEL14_SEL29(x) |
|
#define | XBARA_SEL14_SEL28_MASK (0xFFU) |
|
#define | XBARA_SEL14_SEL28_SHIFT (0U) |
| #define | XBARA_SEL14_SEL28(x) |
|
#define | XBARA_SEL14_SEL29_MASK (0xFF00U) |
|
#define | XBARA_SEL14_SEL29_SHIFT (8U) |
| #define | XBARA_SEL14_SEL29(x) |
|
|
#define | XBARA_SEL15_SEL30_MASK (0x7FU) |
|
#define | XBARA_SEL15_SEL30_SHIFT (0U) |
| #define | XBARA_SEL15_SEL30(x) |
|
#define | XBARA_SEL15_SEL31_MASK (0x7F00U) |
|
#define | XBARA_SEL15_SEL31_SHIFT (8U) |
| #define | XBARA_SEL15_SEL31(x) |
|
#define | XBARA_SEL15_SEL30_MASK (0xFFU) |
|
#define | XBARA_SEL15_SEL30_SHIFT (0U) |
| #define | XBARA_SEL15_SEL30(x) |
|
#define | XBARA_SEL15_SEL31_MASK (0xFF00U) |
|
#define | XBARA_SEL15_SEL31_SHIFT (8U) |
| #define | XBARA_SEL15_SEL31(x) |
|
#define | XBARA_SEL15_SEL30_MASK (0xFFU) |
|
#define | XBARA_SEL15_SEL30_SHIFT (0U) |
| #define | XBARA_SEL15_SEL30(x) |
|
#define | XBARA_SEL15_SEL31_MASK (0xFF00U) |
|
#define | XBARA_SEL15_SEL31_SHIFT (8U) |
| #define | XBARA_SEL15_SEL31(x) |
|
|
#define | XBARA_SEL16_SEL32_MASK (0x7FU) |
|
#define | XBARA_SEL16_SEL32_SHIFT (0U) |
| #define | XBARA_SEL16_SEL32(x) |
|
#define | XBARA_SEL16_SEL33_MASK (0x7F00U) |
|
#define | XBARA_SEL16_SEL33_SHIFT (8U) |
| #define | XBARA_SEL16_SEL33(x) |
|
#define | XBARA_SEL16_SEL32_MASK (0xFFU) |
|
#define | XBARA_SEL16_SEL32_SHIFT (0U) |
| #define | XBARA_SEL16_SEL32(x) |
|
#define | XBARA_SEL16_SEL33_MASK (0xFF00U) |
|
#define | XBARA_SEL16_SEL33_SHIFT (8U) |
| #define | XBARA_SEL16_SEL33(x) |
|
#define | XBARA_SEL16_SEL32_MASK (0xFFU) |
|
#define | XBARA_SEL16_SEL32_SHIFT (0U) |
| #define | XBARA_SEL16_SEL32(x) |
|
#define | XBARA_SEL16_SEL33_MASK (0xFF00U) |
|
#define | XBARA_SEL16_SEL33_SHIFT (8U) |
| #define | XBARA_SEL16_SEL33(x) |
|
|
#define | XBARA_SEL17_SEL34_MASK (0x7FU) |
|
#define | XBARA_SEL17_SEL34_SHIFT (0U) |
| #define | XBARA_SEL17_SEL34(x) |
|
#define | XBARA_SEL17_SEL35_MASK (0x7F00U) |
|
#define | XBARA_SEL17_SEL35_SHIFT (8U) |
| #define | XBARA_SEL17_SEL35(x) |
|
#define | XBARA_SEL17_SEL34_MASK (0xFFU) |
|
#define | XBARA_SEL17_SEL34_SHIFT (0U) |
| #define | XBARA_SEL17_SEL34(x) |
|
#define | XBARA_SEL17_SEL35_MASK (0xFF00U) |
|
#define | XBARA_SEL17_SEL35_SHIFT (8U) |
| #define | XBARA_SEL17_SEL35(x) |
|
#define | XBARA_SEL17_SEL34_MASK (0xFFU) |
|
#define | XBARA_SEL17_SEL34_SHIFT (0U) |
| #define | XBARA_SEL17_SEL34(x) |
|
#define | XBARA_SEL17_SEL35_MASK (0xFF00U) |
|
#define | XBARA_SEL17_SEL35_SHIFT (8U) |
| #define | XBARA_SEL17_SEL35(x) |
|
|
#define | XBARA_SEL18_SEL36_MASK (0x7FU) |
|
#define | XBARA_SEL18_SEL36_SHIFT (0U) |
| #define | XBARA_SEL18_SEL36(x) |
|
#define | XBARA_SEL18_SEL37_MASK (0x7F00U) |
|
#define | XBARA_SEL18_SEL37_SHIFT (8U) |
| #define | XBARA_SEL18_SEL37(x) |
|
#define | XBARA_SEL18_SEL36_MASK (0xFFU) |
|
#define | XBARA_SEL18_SEL36_SHIFT (0U) |
| #define | XBARA_SEL18_SEL36(x) |
|
#define | XBARA_SEL18_SEL37_MASK (0xFF00U) |
|
#define | XBARA_SEL18_SEL37_SHIFT (8U) |
| #define | XBARA_SEL18_SEL37(x) |
|
#define | XBARA_SEL18_SEL36_MASK (0xFFU) |
|
#define | XBARA_SEL18_SEL36_SHIFT (0U) |
| #define | XBARA_SEL18_SEL36(x) |
|
#define | XBARA_SEL18_SEL37_MASK (0xFF00U) |
|
#define | XBARA_SEL18_SEL37_SHIFT (8U) |
| #define | XBARA_SEL18_SEL37(x) |
|
|
#define | XBARA_SEL19_SEL38_MASK (0x7FU) |
|
#define | XBARA_SEL19_SEL38_SHIFT (0U) |
| #define | XBARA_SEL19_SEL38(x) |
|
#define | XBARA_SEL19_SEL39_MASK (0x7F00U) |
|
#define | XBARA_SEL19_SEL39_SHIFT (8U) |
| #define | XBARA_SEL19_SEL39(x) |
|
#define | XBARA_SEL19_SEL38_MASK (0xFFU) |
|
#define | XBARA_SEL19_SEL38_SHIFT (0U) |
| #define | XBARA_SEL19_SEL38(x) |
|
#define | XBARA_SEL19_SEL39_MASK (0xFF00U) |
|
#define | XBARA_SEL19_SEL39_SHIFT (8U) |
| #define | XBARA_SEL19_SEL39(x) |
|
#define | XBARA_SEL19_SEL38_MASK (0xFFU) |
|
#define | XBARA_SEL19_SEL38_SHIFT (0U) |
| #define | XBARA_SEL19_SEL38(x) |
|
#define | XBARA_SEL19_SEL39_MASK (0xFF00U) |
|
#define | XBARA_SEL19_SEL39_SHIFT (8U) |
| #define | XBARA_SEL19_SEL39(x) |
|
|
#define | XBARA_SEL20_SEL40_MASK (0x7FU) |
|
#define | XBARA_SEL20_SEL40_SHIFT (0U) |
| #define | XBARA_SEL20_SEL40(x) |
|
#define | XBARA_SEL20_SEL41_MASK (0x7F00U) |
|
#define | XBARA_SEL20_SEL41_SHIFT (8U) |
| #define | XBARA_SEL20_SEL41(x) |
|
#define | XBARA_SEL20_SEL40_MASK (0xFFU) |
|
#define | XBARA_SEL20_SEL40_SHIFT (0U) |
| #define | XBARA_SEL20_SEL40(x) |
|
#define | XBARA_SEL20_SEL41_MASK (0xFF00U) |
|
#define | XBARA_SEL20_SEL41_SHIFT (8U) |
| #define | XBARA_SEL20_SEL41(x) |
|
#define | XBARA_SEL20_SEL40_MASK (0xFFU) |
|
#define | XBARA_SEL20_SEL40_SHIFT (0U) |
| #define | XBARA_SEL20_SEL40(x) |
|
#define | XBARA_SEL20_SEL41_MASK (0xFF00U) |
|
#define | XBARA_SEL20_SEL41_SHIFT (8U) |
| #define | XBARA_SEL20_SEL41(x) |
|
|
#define | XBARA_SEL21_SEL42_MASK (0x7FU) |
|
#define | XBARA_SEL21_SEL42_SHIFT (0U) |
| #define | XBARA_SEL21_SEL42(x) |
|
#define | XBARA_SEL21_SEL43_MASK (0x7F00U) |
|
#define | XBARA_SEL21_SEL43_SHIFT (8U) |
| #define | XBARA_SEL21_SEL43(x) |
|
#define | XBARA_SEL21_SEL42_MASK (0xFFU) |
|
#define | XBARA_SEL21_SEL42_SHIFT (0U) |
| #define | XBARA_SEL21_SEL42(x) |
|
#define | XBARA_SEL21_SEL43_MASK (0xFF00U) |
|
#define | XBARA_SEL21_SEL43_SHIFT (8U) |
| #define | XBARA_SEL21_SEL43(x) |
|
#define | XBARA_SEL21_SEL42_MASK (0xFFU) |
|
#define | XBARA_SEL21_SEL42_SHIFT (0U) |
| #define | XBARA_SEL21_SEL42(x) |
|
#define | XBARA_SEL21_SEL43_MASK (0xFF00U) |
|
#define | XBARA_SEL21_SEL43_SHIFT (8U) |
| #define | XBARA_SEL21_SEL43(x) |
|
|
#define | XBARA_SEL22_SEL44_MASK (0x7FU) |
|
#define | XBARA_SEL22_SEL44_SHIFT (0U) |
| #define | XBARA_SEL22_SEL44(x) |
|
#define | XBARA_SEL22_SEL45_MASK (0x7F00U) |
|
#define | XBARA_SEL22_SEL45_SHIFT (8U) |
| #define | XBARA_SEL22_SEL45(x) |
|
#define | XBARA_SEL22_SEL44_MASK (0xFFU) |
|
#define | XBARA_SEL22_SEL44_SHIFT (0U) |
| #define | XBARA_SEL22_SEL44(x) |
|
#define | XBARA_SEL22_SEL45_MASK (0xFF00U) |
|
#define | XBARA_SEL22_SEL45_SHIFT (8U) |
| #define | XBARA_SEL22_SEL45(x) |
|
#define | XBARA_SEL22_SEL44_MASK (0xFFU) |
|
#define | XBARA_SEL22_SEL44_SHIFT (0U) |
| #define | XBARA_SEL22_SEL44(x) |
|
#define | XBARA_SEL22_SEL45_MASK (0xFF00U) |
|
#define | XBARA_SEL22_SEL45_SHIFT (8U) |
| #define | XBARA_SEL22_SEL45(x) |
|
|
#define | XBARA_SEL23_SEL46_MASK (0x7FU) |
|
#define | XBARA_SEL23_SEL46_SHIFT (0U) |
| #define | XBARA_SEL23_SEL46(x) |
|
#define | XBARA_SEL23_SEL47_MASK (0x7F00U) |
|
#define | XBARA_SEL23_SEL47_SHIFT (8U) |
| #define | XBARA_SEL23_SEL47(x) |
|
#define | XBARA_SEL23_SEL46_MASK (0xFFU) |
|
#define | XBARA_SEL23_SEL46_SHIFT (0U) |
| #define | XBARA_SEL23_SEL46(x) |
|
#define | XBARA_SEL23_SEL47_MASK (0xFF00U) |
|
#define | XBARA_SEL23_SEL47_SHIFT (8U) |
| #define | XBARA_SEL23_SEL47(x) |
|
#define | XBARA_SEL23_SEL46_MASK (0xFFU) |
|
#define | XBARA_SEL23_SEL46_SHIFT (0U) |
| #define | XBARA_SEL23_SEL46(x) |
|
#define | XBARA_SEL23_SEL47_MASK (0xFF00U) |
|
#define | XBARA_SEL23_SEL47_SHIFT (8U) |
| #define | XBARA_SEL23_SEL47(x) |
|
|
#define | XBARA_SEL24_SEL48_MASK (0x7FU) |
|
#define | XBARA_SEL24_SEL48_SHIFT (0U) |
| #define | XBARA_SEL24_SEL48(x) |
|
#define | XBARA_SEL24_SEL49_MASK (0x7F00U) |
|
#define | XBARA_SEL24_SEL49_SHIFT (8U) |
| #define | XBARA_SEL24_SEL49(x) |
|
#define | XBARA_SEL24_SEL48_MASK (0xFFU) |
|
#define | XBARA_SEL24_SEL48_SHIFT (0U) |
| #define | XBARA_SEL24_SEL48(x) |
|
#define | XBARA_SEL24_SEL49_MASK (0xFF00U) |
|
#define | XBARA_SEL24_SEL49_SHIFT (8U) |
| #define | XBARA_SEL24_SEL49(x) |
|
#define | XBARA_SEL24_SEL48_MASK (0xFFU) |
|
#define | XBARA_SEL24_SEL48_SHIFT (0U) |
| #define | XBARA_SEL24_SEL48(x) |
|
#define | XBARA_SEL24_SEL49_MASK (0xFF00U) |
|
#define | XBARA_SEL24_SEL49_SHIFT (8U) |
| #define | XBARA_SEL24_SEL49(x) |
|
|
#define | XBARA_SEL25_SEL50_MASK (0x7FU) |
|
#define | XBARA_SEL25_SEL50_SHIFT (0U) |
| #define | XBARA_SEL25_SEL50(x) |
|
#define | XBARA_SEL25_SEL51_MASK (0x7F00U) |
|
#define | XBARA_SEL25_SEL51_SHIFT (8U) |
| #define | XBARA_SEL25_SEL51(x) |
|
#define | XBARA_SEL25_SEL50_MASK (0xFFU) |
|
#define | XBARA_SEL25_SEL50_SHIFT (0U) |
| #define | XBARA_SEL25_SEL50(x) |
|
#define | XBARA_SEL25_SEL51_MASK (0xFF00U) |
|
#define | XBARA_SEL25_SEL51_SHIFT (8U) |
| #define | XBARA_SEL25_SEL51(x) |
|
#define | XBARA_SEL25_SEL50_MASK (0xFFU) |
|
#define | XBARA_SEL25_SEL50_SHIFT (0U) |
| #define | XBARA_SEL25_SEL50(x) |
|
#define | XBARA_SEL25_SEL51_MASK (0xFF00U) |
|
#define | XBARA_SEL25_SEL51_SHIFT (8U) |
| #define | XBARA_SEL25_SEL51(x) |
|
|
#define | XBARA_SEL26_SEL52_MASK (0x7FU) |
|
#define | XBARA_SEL26_SEL52_SHIFT (0U) |
| #define | XBARA_SEL26_SEL52(x) |
|
#define | XBARA_SEL26_SEL53_MASK (0x7F00U) |
|
#define | XBARA_SEL26_SEL53_SHIFT (8U) |
| #define | XBARA_SEL26_SEL53(x) |
|
#define | XBARA_SEL26_SEL52_MASK (0xFFU) |
|
#define | XBARA_SEL26_SEL52_SHIFT (0U) |
| #define | XBARA_SEL26_SEL52(x) |
|
#define | XBARA_SEL26_SEL53_MASK (0xFF00U) |
|
#define | XBARA_SEL26_SEL53_SHIFT (8U) |
| #define | XBARA_SEL26_SEL53(x) |
|
#define | XBARA_SEL26_SEL52_MASK (0xFFU) |
|
#define | XBARA_SEL26_SEL52_SHIFT (0U) |
| #define | XBARA_SEL26_SEL52(x) |
|
#define | XBARA_SEL26_SEL53_MASK (0xFF00U) |
|
#define | XBARA_SEL26_SEL53_SHIFT (8U) |
| #define | XBARA_SEL26_SEL53(x) |
|
|
#define | XBARA_SEL27_SEL54_MASK (0x7FU) |
|
#define | XBARA_SEL27_SEL54_SHIFT (0U) |
| #define | XBARA_SEL27_SEL54(x) |
|
#define | XBARA_SEL27_SEL55_MASK (0x7F00U) |
|
#define | XBARA_SEL27_SEL55_SHIFT (8U) |
| #define | XBARA_SEL27_SEL55(x) |
|
#define | XBARA_SEL27_SEL54_MASK (0xFFU) |
|
#define | XBARA_SEL27_SEL54_SHIFT (0U) |
| #define | XBARA_SEL27_SEL54(x) |
|
#define | XBARA_SEL27_SEL55_MASK (0xFF00U) |
|
#define | XBARA_SEL27_SEL55_SHIFT (8U) |
| #define | XBARA_SEL27_SEL55(x) |
|
#define | XBARA_SEL27_SEL54_MASK (0xFFU) |
|
#define | XBARA_SEL27_SEL54_SHIFT (0U) |
| #define | XBARA_SEL27_SEL54(x) |
|
#define | XBARA_SEL27_SEL55_MASK (0xFF00U) |
|
#define | XBARA_SEL27_SEL55_SHIFT (8U) |
| #define | XBARA_SEL27_SEL55(x) |
|
|
#define | XBARA_SEL28_SEL56_MASK (0x7FU) |
|
#define | XBARA_SEL28_SEL56_SHIFT (0U) |
| #define | XBARA_SEL28_SEL56(x) |
|
#define | XBARA_SEL28_SEL57_MASK (0x7F00U) |
|
#define | XBARA_SEL28_SEL57_SHIFT (8U) |
| #define | XBARA_SEL28_SEL57(x) |
|
#define | XBARA_SEL28_SEL56_MASK (0xFFU) |
|
#define | XBARA_SEL28_SEL56_SHIFT (0U) |
| #define | XBARA_SEL28_SEL56(x) |
|
#define | XBARA_SEL28_SEL57_MASK (0xFF00U) |
|
#define | XBARA_SEL28_SEL57_SHIFT (8U) |
| #define | XBARA_SEL28_SEL57(x) |
|
#define | XBARA_SEL28_SEL56_MASK (0xFFU) |
|
#define | XBARA_SEL28_SEL56_SHIFT (0U) |
| #define | XBARA_SEL28_SEL56(x) |
|
#define | XBARA_SEL28_SEL57_MASK (0xFF00U) |
|
#define | XBARA_SEL28_SEL57_SHIFT (8U) |
| #define | XBARA_SEL28_SEL57(x) |
|
|
#define | XBARA_SEL29_SEL58_MASK (0x7FU) |
|
#define | XBARA_SEL29_SEL58_SHIFT (0U) |
| #define | XBARA_SEL29_SEL58(x) |
|
#define | XBARA_SEL29_SEL59_MASK (0x7F00U) |
|
#define | XBARA_SEL29_SEL59_SHIFT (8U) |
| #define | XBARA_SEL29_SEL59(x) |
|
#define | XBARA_SEL29_SEL58_MASK (0xFFU) |
|
#define | XBARA_SEL29_SEL58_SHIFT (0U) |
| #define | XBARA_SEL29_SEL58(x) |
|
#define | XBARA_SEL29_SEL59_MASK (0xFF00U) |
|
#define | XBARA_SEL29_SEL59_SHIFT (8U) |
| #define | XBARA_SEL29_SEL59(x) |
|
#define | XBARA_SEL29_SEL58_MASK (0xFFU) |
|
#define | XBARA_SEL29_SEL58_SHIFT (0U) |
| #define | XBARA_SEL29_SEL58(x) |
|
#define | XBARA_SEL29_SEL59_MASK (0xFF00U) |
|
#define | XBARA_SEL29_SEL59_SHIFT (8U) |
| #define | XBARA_SEL29_SEL59(x) |
|
|
#define | XBARA_SEL30_SEL60_MASK (0x7FU) |
|
#define | XBARA_SEL30_SEL60_SHIFT (0U) |
| #define | XBARA_SEL30_SEL60(x) |
|
#define | XBARA_SEL30_SEL61_MASK (0x7F00U) |
|
#define | XBARA_SEL30_SEL61_SHIFT (8U) |
| #define | XBARA_SEL30_SEL61(x) |
|
#define | XBARA_SEL30_SEL60_MASK (0xFFU) |
|
#define | XBARA_SEL30_SEL60_SHIFT (0U) |
| #define | XBARA_SEL30_SEL60(x) |
|
#define | XBARA_SEL30_SEL61_MASK (0xFF00U) |
|
#define | XBARA_SEL30_SEL61_SHIFT (8U) |
| #define | XBARA_SEL30_SEL61(x) |
|
#define | XBARA_SEL30_SEL60_MASK (0xFFU) |
|
#define | XBARA_SEL30_SEL60_SHIFT (0U) |
| #define | XBARA_SEL30_SEL60(x) |
|
#define | XBARA_SEL30_SEL61_MASK (0xFF00U) |
|
#define | XBARA_SEL30_SEL61_SHIFT (8U) |
| #define | XBARA_SEL30_SEL61(x) |
|
|
#define | XBARA_SEL31_SEL62_MASK (0x7FU) |
|
#define | XBARA_SEL31_SEL62_SHIFT (0U) |
| #define | XBARA_SEL31_SEL62(x) |
|
#define | XBARA_SEL31_SEL63_MASK (0x7F00U) |
|
#define | XBARA_SEL31_SEL63_SHIFT (8U) |
| #define | XBARA_SEL31_SEL63(x) |
|
#define | XBARA_SEL31_SEL62_MASK (0xFFU) |
|
#define | XBARA_SEL31_SEL62_SHIFT (0U) |
| #define | XBARA_SEL31_SEL62(x) |
|
#define | XBARA_SEL31_SEL63_MASK (0xFF00U) |
|
#define | XBARA_SEL31_SEL63_SHIFT (8U) |
| #define | XBARA_SEL31_SEL63(x) |
|
#define | XBARA_SEL31_SEL62_MASK (0xFFU) |
|
#define | XBARA_SEL31_SEL62_SHIFT (0U) |
| #define | XBARA_SEL31_SEL62(x) |
|
#define | XBARA_SEL31_SEL63_MASK (0xFF00U) |
|
#define | XBARA_SEL31_SEL63_SHIFT (8U) |
| #define | XBARA_SEL31_SEL63(x) |
|
|
#define | XBARA_SEL32_SEL64_MASK (0x7FU) |
|
#define | XBARA_SEL32_SEL64_SHIFT (0U) |
| #define | XBARA_SEL32_SEL64(x) |
|
#define | XBARA_SEL32_SEL65_MASK (0x7F00U) |
|
#define | XBARA_SEL32_SEL65_SHIFT (8U) |
| #define | XBARA_SEL32_SEL65(x) |
|
#define | XBARA_SEL32_SEL64_MASK (0xFFU) |
|
#define | XBARA_SEL32_SEL64_SHIFT (0U) |
| #define | XBARA_SEL32_SEL64(x) |
|
#define | XBARA_SEL32_SEL65_MASK (0xFF00U) |
|
#define | XBARA_SEL32_SEL65_SHIFT (8U) |
| #define | XBARA_SEL32_SEL65(x) |
|
#define | XBARA_SEL32_SEL64_MASK (0xFFU) |
|
#define | XBARA_SEL32_SEL64_SHIFT (0U) |
| #define | XBARA_SEL32_SEL64(x) |
|
#define | XBARA_SEL32_SEL65_MASK (0xFF00U) |
|
#define | XBARA_SEL32_SEL65_SHIFT (8U) |
| #define | XBARA_SEL32_SEL65(x) |
|
|
#define | XBARA_SEL33_SEL66_MASK (0x7FU) |
|
#define | XBARA_SEL33_SEL66_SHIFT (0U) |
| #define | XBARA_SEL33_SEL66(x) |
|
#define | XBARA_SEL33_SEL67_MASK (0x7F00U) |
|
#define | XBARA_SEL33_SEL67_SHIFT (8U) |
| #define | XBARA_SEL33_SEL67(x) |
|
#define | XBARA_SEL33_SEL66_MASK (0xFFU) |
|
#define | XBARA_SEL33_SEL66_SHIFT (0U) |
| #define | XBARA_SEL33_SEL66(x) |
|
#define | XBARA_SEL33_SEL67_MASK (0xFF00U) |
|
#define | XBARA_SEL33_SEL67_SHIFT (8U) |
| #define | XBARA_SEL33_SEL67(x) |
|
#define | XBARA_SEL33_SEL66_MASK (0xFFU) |
|
#define | XBARA_SEL33_SEL66_SHIFT (0U) |
| #define | XBARA_SEL33_SEL66(x) |
|
#define | XBARA_SEL33_SEL67_MASK (0xFF00U) |
|
#define | XBARA_SEL33_SEL67_SHIFT (8U) |
| #define | XBARA_SEL33_SEL67(x) |
|
|
#define | XBARA_SEL34_SEL68_MASK (0x7FU) |
|
#define | XBARA_SEL34_SEL68_SHIFT (0U) |
| #define | XBARA_SEL34_SEL68(x) |
|
#define | XBARA_SEL34_SEL69_MASK (0x7F00U) |
|
#define | XBARA_SEL34_SEL69_SHIFT (8U) |
| #define | XBARA_SEL34_SEL69(x) |
|
#define | XBARA_SEL34_SEL68_MASK (0xFFU) |
|
#define | XBARA_SEL34_SEL68_SHIFT (0U) |
| #define | XBARA_SEL34_SEL68(x) |
|
#define | XBARA_SEL34_SEL69_MASK (0xFF00U) |
|
#define | XBARA_SEL34_SEL69_SHIFT (8U) |
| #define | XBARA_SEL34_SEL69(x) |
|
#define | XBARA_SEL34_SEL68_MASK (0xFFU) |
|
#define | XBARA_SEL34_SEL68_SHIFT (0U) |
| #define | XBARA_SEL34_SEL68(x) |
|
#define | XBARA_SEL34_SEL69_MASK (0xFF00U) |
|
#define | XBARA_SEL34_SEL69_SHIFT (8U) |
| #define | XBARA_SEL34_SEL69(x) |
|
|
#define | XBARA_SEL35_SEL70_MASK (0x7FU) |
|
#define | XBARA_SEL35_SEL70_SHIFT (0U) |
| #define | XBARA_SEL35_SEL70(x) |
|
#define | XBARA_SEL35_SEL71_MASK (0x7F00U) |
|
#define | XBARA_SEL35_SEL71_SHIFT (8U) |
| #define | XBARA_SEL35_SEL71(x) |
|
#define | XBARA_SEL35_SEL70_MASK (0xFFU) |
|
#define | XBARA_SEL35_SEL70_SHIFT (0U) |
| #define | XBARA_SEL35_SEL70(x) |
|
#define | XBARA_SEL35_SEL71_MASK (0xFF00U) |
|
#define | XBARA_SEL35_SEL71_SHIFT (8U) |
| #define | XBARA_SEL35_SEL71(x) |
|
#define | XBARA_SEL35_SEL70_MASK (0xFFU) |
|
#define | XBARA_SEL35_SEL70_SHIFT (0U) |
| #define | XBARA_SEL35_SEL70(x) |
|
#define | XBARA_SEL35_SEL71_MASK (0xFF00U) |
|
#define | XBARA_SEL35_SEL71_SHIFT (8U) |
| #define | XBARA_SEL35_SEL71(x) |
|
|
#define | XBARA_SEL36_SEL72_MASK (0x7FU) |
|
#define | XBARA_SEL36_SEL72_SHIFT (0U) |
| #define | XBARA_SEL36_SEL72(x) |
|
#define | XBARA_SEL36_SEL73_MASK (0x7F00U) |
|
#define | XBARA_SEL36_SEL73_SHIFT (8U) |
| #define | XBARA_SEL36_SEL73(x) |
|
#define | XBARA_SEL36_SEL72_MASK (0xFFU) |
|
#define | XBARA_SEL36_SEL72_SHIFT (0U) |
| #define | XBARA_SEL36_SEL72(x) |
|
#define | XBARA_SEL36_SEL73_MASK (0xFF00U) |
|
#define | XBARA_SEL36_SEL73_SHIFT (8U) |
| #define | XBARA_SEL36_SEL73(x) |
|
#define | XBARA_SEL36_SEL72_MASK (0xFFU) |
|
#define | XBARA_SEL36_SEL72_SHIFT (0U) |
| #define | XBARA_SEL36_SEL72(x) |
|
#define | XBARA_SEL36_SEL73_MASK (0xFF00U) |
|
#define | XBARA_SEL36_SEL73_SHIFT (8U) |
| #define | XBARA_SEL36_SEL73(x) |
|
|
#define | XBARA_SEL37_SEL74_MASK (0x7FU) |
|
#define | XBARA_SEL37_SEL74_SHIFT (0U) |
| #define | XBARA_SEL37_SEL74(x) |
|
#define | XBARA_SEL37_SEL75_MASK (0x7F00U) |
|
#define | XBARA_SEL37_SEL75_SHIFT (8U) |
| #define | XBARA_SEL37_SEL75(x) |
|
#define | XBARA_SEL37_SEL74_MASK (0xFFU) |
|
#define | XBARA_SEL37_SEL74_SHIFT (0U) |
| #define | XBARA_SEL37_SEL74(x) |
|
#define | XBARA_SEL37_SEL75_MASK (0xFF00U) |
|
#define | XBARA_SEL37_SEL75_SHIFT (8U) |
| #define | XBARA_SEL37_SEL75(x) |
|
#define | XBARA_SEL37_SEL74_MASK (0xFFU) |
|
#define | XBARA_SEL37_SEL74_SHIFT (0U) |
| #define | XBARA_SEL37_SEL74(x) |
|
#define | XBARA_SEL37_SEL75_MASK (0xFF00U) |
|
#define | XBARA_SEL37_SEL75_SHIFT (8U) |
| #define | XBARA_SEL37_SEL75(x) |
|
|
#define | XBARA_SEL38_SEL76_MASK (0x7FU) |
|
#define | XBARA_SEL38_SEL76_SHIFT (0U) |
| #define | XBARA_SEL38_SEL76(x) |
|
#define | XBARA_SEL38_SEL77_MASK (0x7F00U) |
|
#define | XBARA_SEL38_SEL77_SHIFT (8U) |
| #define | XBARA_SEL38_SEL77(x) |
|
#define | XBARA_SEL38_SEL76_MASK (0xFFU) |
|
#define | XBARA_SEL38_SEL76_SHIFT (0U) |
| #define | XBARA_SEL38_SEL76(x) |
|
#define | XBARA_SEL38_SEL77_MASK (0xFF00U) |
|
#define | XBARA_SEL38_SEL77_SHIFT (8U) |
| #define | XBARA_SEL38_SEL77(x) |
|
#define | XBARA_SEL38_SEL76_MASK (0xFFU) |
|
#define | XBARA_SEL38_SEL76_SHIFT (0U) |
| #define | XBARA_SEL38_SEL76(x) |
|
#define | XBARA_SEL38_SEL77_MASK (0xFF00U) |
|
#define | XBARA_SEL38_SEL77_SHIFT (8U) |
| #define | XBARA_SEL38_SEL77(x) |
|
|
#define | XBARA_SEL39_SEL78_MASK (0x7FU) |
|
#define | XBARA_SEL39_SEL78_SHIFT (0U) |
| #define | XBARA_SEL39_SEL78(x) |
|
#define | XBARA_SEL39_SEL79_MASK (0x7F00U) |
|
#define | XBARA_SEL39_SEL79_SHIFT (8U) |
| #define | XBARA_SEL39_SEL79(x) |
|
#define | XBARA_SEL39_SEL78_MASK (0xFFU) |
|
#define | XBARA_SEL39_SEL78_SHIFT (0U) |
| #define | XBARA_SEL39_SEL78(x) |
|
#define | XBARA_SEL39_SEL79_MASK (0xFF00U) |
|
#define | XBARA_SEL39_SEL79_SHIFT (8U) |
| #define | XBARA_SEL39_SEL79(x) |
|
#define | XBARA_SEL39_SEL78_MASK (0xFFU) |
|
#define | XBARA_SEL39_SEL78_SHIFT (0U) |
| #define | XBARA_SEL39_SEL78(x) |
|
#define | XBARA_SEL39_SEL79_MASK (0xFF00U) |
|
#define | XBARA_SEL39_SEL79_SHIFT (8U) |
| #define | XBARA_SEL39_SEL79(x) |
|
|
#define | XBARA_SEL40_SEL80_MASK (0x7FU) |
|
#define | XBARA_SEL40_SEL80_SHIFT (0U) |
| #define | XBARA_SEL40_SEL80(x) |
|
#define | XBARA_SEL40_SEL81_MASK (0x7F00U) |
|
#define | XBARA_SEL40_SEL81_SHIFT (8U) |
| #define | XBARA_SEL40_SEL81(x) |
|
#define | XBARA_SEL40_SEL80_MASK (0xFFU) |
|
#define | XBARA_SEL40_SEL80_SHIFT (0U) |
| #define | XBARA_SEL40_SEL80(x) |
|
#define | XBARA_SEL40_SEL81_MASK (0xFF00U) |
|
#define | XBARA_SEL40_SEL81_SHIFT (8U) |
| #define | XBARA_SEL40_SEL81(x) |
|
#define | XBARA_SEL40_SEL80_MASK (0xFFU) |
|
#define | XBARA_SEL40_SEL80_SHIFT (0U) |
| #define | XBARA_SEL40_SEL80(x) |
|
#define | XBARA_SEL40_SEL81_MASK (0xFF00U) |
|
#define | XBARA_SEL40_SEL81_SHIFT (8U) |
| #define | XBARA_SEL40_SEL81(x) |
|
|
#define | XBARA_SEL41_SEL82_MASK (0x7FU) |
|
#define | XBARA_SEL41_SEL82_SHIFT (0U) |
| #define | XBARA_SEL41_SEL82(x) |
|
#define | XBARA_SEL41_SEL83_MASK (0x7F00U) |
|
#define | XBARA_SEL41_SEL83_SHIFT (8U) |
| #define | XBARA_SEL41_SEL83(x) |
|
#define | XBARA_SEL41_SEL82_MASK (0xFFU) |
|
#define | XBARA_SEL41_SEL82_SHIFT (0U) |
| #define | XBARA_SEL41_SEL82(x) |
|
#define | XBARA_SEL41_SEL83_MASK (0xFF00U) |
|
#define | XBARA_SEL41_SEL83_SHIFT (8U) |
| #define | XBARA_SEL41_SEL83(x) |
|
#define | XBARA_SEL41_SEL82_MASK (0xFFU) |
|
#define | XBARA_SEL41_SEL82_SHIFT (0U) |
| #define | XBARA_SEL41_SEL82(x) |
|
#define | XBARA_SEL41_SEL83_MASK (0xFF00U) |
|
#define | XBARA_SEL41_SEL83_SHIFT (8U) |
| #define | XBARA_SEL41_SEL83(x) |
|
|
#define | XBARA_SEL42_SEL84_MASK (0x7FU) |
|
#define | XBARA_SEL42_SEL84_SHIFT (0U) |
| #define | XBARA_SEL42_SEL84(x) |
|
#define | XBARA_SEL42_SEL85_MASK (0x7F00U) |
|
#define | XBARA_SEL42_SEL85_SHIFT (8U) |
| #define | XBARA_SEL42_SEL85(x) |
|
#define | XBARA_SEL42_SEL84_MASK (0xFFU) |
|
#define | XBARA_SEL42_SEL84_SHIFT (0U) |
| #define | XBARA_SEL42_SEL84(x) |
|
#define | XBARA_SEL42_SEL85_MASK (0xFF00U) |
|
#define | XBARA_SEL42_SEL85_SHIFT (8U) |
| #define | XBARA_SEL42_SEL85(x) |
|
#define | XBARA_SEL42_SEL84_MASK (0xFFU) |
|
#define | XBARA_SEL42_SEL84_SHIFT (0U) |
| #define | XBARA_SEL42_SEL84(x) |
|
#define | XBARA_SEL42_SEL85_MASK (0xFF00U) |
|
#define | XBARA_SEL42_SEL85_SHIFT (8U) |
| #define | XBARA_SEL42_SEL85(x) |
|
|
#define | XBARA_SEL43_SEL86_MASK (0x7FU) |
|
#define | XBARA_SEL43_SEL86_SHIFT (0U) |
| #define | XBARA_SEL43_SEL86(x) |
|
#define | XBARA_SEL43_SEL87_MASK (0x7F00U) |
|
#define | XBARA_SEL43_SEL87_SHIFT (8U) |
| #define | XBARA_SEL43_SEL87(x) |
|
#define | XBARA_SEL43_SEL86_MASK (0xFFU) |
|
#define | XBARA_SEL43_SEL86_SHIFT (0U) |
| #define | XBARA_SEL43_SEL86(x) |
|
#define | XBARA_SEL43_SEL87_MASK (0xFF00U) |
|
#define | XBARA_SEL43_SEL87_SHIFT (8U) |
| #define | XBARA_SEL43_SEL87(x) |
|
#define | XBARA_SEL43_SEL86_MASK (0xFFU) |
|
#define | XBARA_SEL43_SEL86_SHIFT (0U) |
| #define | XBARA_SEL43_SEL86(x) |
|
#define | XBARA_SEL43_SEL87_MASK (0xFF00U) |
|
#define | XBARA_SEL43_SEL87_SHIFT (8U) |
| #define | XBARA_SEL43_SEL87(x) |
|
|
#define | XBARA_SEL44_SEL88_MASK (0x7FU) |
|
#define | XBARA_SEL44_SEL88_SHIFT (0U) |
| #define | XBARA_SEL44_SEL88(x) |
|
#define | XBARA_SEL44_SEL89_MASK (0x7F00U) |
|
#define | XBARA_SEL44_SEL89_SHIFT (8U) |
| #define | XBARA_SEL44_SEL89(x) |
|
#define | XBARA_SEL44_SEL88_MASK (0xFFU) |
|
#define | XBARA_SEL44_SEL88_SHIFT (0U) |
| #define | XBARA_SEL44_SEL88(x) |
|
#define | XBARA_SEL44_SEL89_MASK (0xFF00U) |
|
#define | XBARA_SEL44_SEL89_SHIFT (8U) |
| #define | XBARA_SEL44_SEL89(x) |
|
#define | XBARA_SEL44_SEL88_MASK (0xFFU) |
|
#define | XBARA_SEL44_SEL88_SHIFT (0U) |
| #define | XBARA_SEL44_SEL88(x) |
|
#define | XBARA_SEL44_SEL89_MASK (0xFF00U) |
|
#define | XBARA_SEL44_SEL89_SHIFT (8U) |
| #define | XBARA_SEL44_SEL89(x) |
|
|
#define | XBARA_SEL45_SEL90_MASK (0x7FU) |
|
#define | XBARA_SEL45_SEL90_SHIFT (0U) |
| #define | XBARA_SEL45_SEL90(x) |
|
#define | XBARA_SEL45_SEL91_MASK (0x7F00U) |
|
#define | XBARA_SEL45_SEL91_SHIFT (8U) |
| #define | XBARA_SEL45_SEL91(x) |
|
#define | XBARA_SEL45_SEL90_MASK (0xFFU) |
|
#define | XBARA_SEL45_SEL90_SHIFT (0U) |
| #define | XBARA_SEL45_SEL90(x) |
|
#define | XBARA_SEL45_SEL91_MASK (0xFF00U) |
|
#define | XBARA_SEL45_SEL91_SHIFT (8U) |
| #define | XBARA_SEL45_SEL91(x) |
|
#define | XBARA_SEL45_SEL90_MASK (0xFFU) |
|
#define | XBARA_SEL45_SEL90_SHIFT (0U) |
| #define | XBARA_SEL45_SEL90(x) |
|
#define | XBARA_SEL45_SEL91_MASK (0xFF00U) |
|
#define | XBARA_SEL45_SEL91_SHIFT (8U) |
| #define | XBARA_SEL45_SEL91(x) |
|
|
#define | XBARA_SEL46_SEL92_MASK (0x7FU) |
|
#define | XBARA_SEL46_SEL92_SHIFT (0U) |
| #define | XBARA_SEL46_SEL92(x) |
|
#define | XBARA_SEL46_SEL93_MASK (0x7F00U) |
|
#define | XBARA_SEL46_SEL93_SHIFT (8U) |
| #define | XBARA_SEL46_SEL93(x) |
|
#define | XBARA_SEL46_SEL92_MASK (0xFFU) |
|
#define | XBARA_SEL46_SEL92_SHIFT (0U) |
| #define | XBARA_SEL46_SEL92(x) |
|
#define | XBARA_SEL46_SEL93_MASK (0xFF00U) |
|
#define | XBARA_SEL46_SEL93_SHIFT (8U) |
| #define | XBARA_SEL46_SEL93(x) |
|
#define | XBARA_SEL46_SEL92_MASK (0xFFU) |
|
#define | XBARA_SEL46_SEL92_SHIFT (0U) |
| #define | XBARA_SEL46_SEL92(x) |
|
#define | XBARA_SEL46_SEL93_MASK (0xFF00U) |
|
#define | XBARA_SEL46_SEL93_SHIFT (8U) |
| #define | XBARA_SEL46_SEL93(x) |
|
|
#define | XBARA_SEL47_SEL94_MASK (0x7FU) |
|
#define | XBARA_SEL47_SEL94_SHIFT (0U) |
| #define | XBARA_SEL47_SEL94(x) |
|
#define | XBARA_SEL47_SEL95_MASK (0x7F00U) |
|
#define | XBARA_SEL47_SEL95_SHIFT (8U) |
| #define | XBARA_SEL47_SEL95(x) |
|
#define | XBARA_SEL47_SEL94_MASK (0xFFU) |
|
#define | XBARA_SEL47_SEL94_SHIFT (0U) |
| #define | XBARA_SEL47_SEL94(x) |
|
#define | XBARA_SEL47_SEL95_MASK (0xFF00U) |
|
#define | XBARA_SEL47_SEL95_SHIFT (8U) |
| #define | XBARA_SEL47_SEL95(x) |
|
#define | XBARA_SEL47_SEL94_MASK (0xFFU) |
|
#define | XBARA_SEL47_SEL94_SHIFT (0U) |
| #define | XBARA_SEL47_SEL94(x) |
|
#define | XBARA_SEL47_SEL95_MASK (0xFF00U) |
|
#define | XBARA_SEL47_SEL95_SHIFT (8U) |
| #define | XBARA_SEL47_SEL95(x) |
|
|
#define | XBARA_SEL48_SEL96_MASK (0x7FU) |
|
#define | XBARA_SEL48_SEL96_SHIFT (0U) |
| #define | XBARA_SEL48_SEL96(x) |
|
#define | XBARA_SEL48_SEL97_MASK (0x7F00U) |
|
#define | XBARA_SEL48_SEL97_SHIFT (8U) |
| #define | XBARA_SEL48_SEL97(x) |
|
#define | XBARA_SEL48_SEL96_MASK (0xFFU) |
|
#define | XBARA_SEL48_SEL96_SHIFT (0U) |
| #define | XBARA_SEL48_SEL96(x) |
|
#define | XBARA_SEL48_SEL97_MASK (0xFF00U) |
|
#define | XBARA_SEL48_SEL97_SHIFT (8U) |
| #define | XBARA_SEL48_SEL97(x) |
|
#define | XBARA_SEL48_SEL96_MASK (0xFFU) |
|
#define | XBARA_SEL48_SEL96_SHIFT (0U) |
| #define | XBARA_SEL48_SEL96(x) |
|
#define | XBARA_SEL48_SEL97_MASK (0xFF00U) |
|
#define | XBARA_SEL48_SEL97_SHIFT (8U) |
| #define | XBARA_SEL48_SEL97(x) |
|
|
#define | XBARA_SEL49_SEL98_MASK (0x7FU) |
|
#define | XBARA_SEL49_SEL98_SHIFT (0U) |
| #define | XBARA_SEL49_SEL98(x) |
|
#define | XBARA_SEL49_SEL99_MASK (0x7F00U) |
|
#define | XBARA_SEL49_SEL99_SHIFT (8U) |
| #define | XBARA_SEL49_SEL99(x) |
|
#define | XBARA_SEL49_SEL98_MASK (0xFFU) |
|
#define | XBARA_SEL49_SEL98_SHIFT (0U) |
| #define | XBARA_SEL49_SEL98(x) |
|
#define | XBARA_SEL49_SEL99_MASK (0xFF00U) |
|
#define | XBARA_SEL49_SEL99_SHIFT (8U) |
| #define | XBARA_SEL49_SEL99(x) |
|
#define | XBARA_SEL49_SEL98_MASK (0xFFU) |
|
#define | XBARA_SEL49_SEL98_SHIFT (0U) |
| #define | XBARA_SEL49_SEL98(x) |
|
#define | XBARA_SEL49_SEL99_MASK (0xFF00U) |
|
#define | XBARA_SEL49_SEL99_SHIFT (8U) |
| #define | XBARA_SEL49_SEL99(x) |
|
|
#define | XBARA_SEL50_SEL100_MASK (0x7FU) |
|
#define | XBARA_SEL50_SEL100_SHIFT (0U) |
| #define | XBARA_SEL50_SEL100(x) |
|
#define | XBARA_SEL50_SEL101_MASK (0x7F00U) |
|
#define | XBARA_SEL50_SEL101_SHIFT (8U) |
| #define | XBARA_SEL50_SEL101(x) |
|
#define | XBARA_SEL50_SEL100_MASK (0xFFU) |
|
#define | XBARA_SEL50_SEL100_SHIFT (0U) |
| #define | XBARA_SEL50_SEL100(x) |
|
#define | XBARA_SEL50_SEL101_MASK (0xFF00U) |
|
#define | XBARA_SEL50_SEL101_SHIFT (8U) |
| #define | XBARA_SEL50_SEL101(x) |
|
#define | XBARA_SEL50_SEL100_MASK (0xFFU) |
|
#define | XBARA_SEL50_SEL100_SHIFT (0U) |
| #define | XBARA_SEL50_SEL100(x) |
|
#define | XBARA_SEL50_SEL101_MASK (0xFF00U) |
|
#define | XBARA_SEL50_SEL101_SHIFT (8U) |
| #define | XBARA_SEL50_SEL101(x) |
|
|
#define | XBARA_SEL51_SEL102_MASK (0x7FU) |
|
#define | XBARA_SEL51_SEL102_SHIFT (0U) |
| #define | XBARA_SEL51_SEL102(x) |
|
#define | XBARA_SEL51_SEL103_MASK (0x7F00U) |
|
#define | XBARA_SEL51_SEL103_SHIFT (8U) |
| #define | XBARA_SEL51_SEL103(x) |
|
#define | XBARA_SEL51_SEL102_MASK (0xFFU) |
|
#define | XBARA_SEL51_SEL102_SHIFT (0U) |
| #define | XBARA_SEL51_SEL102(x) |
|
#define | XBARA_SEL51_SEL103_MASK (0xFF00U) |
|
#define | XBARA_SEL51_SEL103_SHIFT (8U) |
| #define | XBARA_SEL51_SEL103(x) |
|
#define | XBARA_SEL51_SEL102_MASK (0xFFU) |
|
#define | XBARA_SEL51_SEL102_SHIFT (0U) |
| #define | XBARA_SEL51_SEL102(x) |
|
#define | XBARA_SEL51_SEL103_MASK (0xFF00U) |
|
#define | XBARA_SEL51_SEL103_SHIFT (8U) |
| #define | XBARA_SEL51_SEL103(x) |
|
|
#define | XBARA_SEL52_SEL104_MASK (0x7FU) |
|
#define | XBARA_SEL52_SEL104_SHIFT (0U) |
| #define | XBARA_SEL52_SEL104(x) |
|
#define | XBARA_SEL52_SEL105_MASK (0x7F00U) |
|
#define | XBARA_SEL52_SEL105_SHIFT (8U) |
| #define | XBARA_SEL52_SEL105(x) |
|
#define | XBARA_SEL52_SEL104_MASK (0xFFU) |
|
#define | XBARA_SEL52_SEL104_SHIFT (0U) |
| #define | XBARA_SEL52_SEL104(x) |
|
#define | XBARA_SEL52_SEL105_MASK (0xFF00U) |
|
#define | XBARA_SEL52_SEL105_SHIFT (8U) |
| #define | XBARA_SEL52_SEL105(x) |
|
#define | XBARA_SEL52_SEL104_MASK (0xFFU) |
|
#define | XBARA_SEL52_SEL104_SHIFT (0U) |
| #define | XBARA_SEL52_SEL104(x) |
|
#define | XBARA_SEL52_SEL105_MASK (0xFF00U) |
|
#define | XBARA_SEL52_SEL105_SHIFT (8U) |
| #define | XBARA_SEL52_SEL105(x) |
|
|
#define | XBARA_SEL53_SEL106_MASK (0x7FU) |
|
#define | XBARA_SEL53_SEL106_SHIFT (0U) |
| #define | XBARA_SEL53_SEL106(x) |
|
#define | XBARA_SEL53_SEL107_MASK (0x7F00U) |
|
#define | XBARA_SEL53_SEL107_SHIFT (8U) |
| #define | XBARA_SEL53_SEL107(x) |
|
#define | XBARA_SEL53_SEL106_MASK (0xFFU) |
|
#define | XBARA_SEL53_SEL106_SHIFT (0U) |
| #define | XBARA_SEL53_SEL106(x) |
|
#define | XBARA_SEL53_SEL107_MASK (0xFF00U) |
|
#define | XBARA_SEL53_SEL107_SHIFT (8U) |
| #define | XBARA_SEL53_SEL107(x) |
|
#define | XBARA_SEL53_SEL106_MASK (0xFFU) |
|
#define | XBARA_SEL53_SEL106_SHIFT (0U) |
| #define | XBARA_SEL53_SEL106(x) |
|
#define | XBARA_SEL53_SEL107_MASK (0xFF00U) |
|
#define | XBARA_SEL53_SEL107_SHIFT (8U) |
| #define | XBARA_SEL53_SEL107(x) |
|
|
#define | XBARA_SEL54_SEL108_MASK (0x7FU) |
|
#define | XBARA_SEL54_SEL108_SHIFT (0U) |
| #define | XBARA_SEL54_SEL108(x) |
|
#define | XBARA_SEL54_SEL109_MASK (0x7F00U) |
|
#define | XBARA_SEL54_SEL109_SHIFT (8U) |
| #define | XBARA_SEL54_SEL109(x) |
|
#define | XBARA_SEL54_SEL108_MASK (0xFFU) |
|
#define | XBARA_SEL54_SEL108_SHIFT (0U) |
| #define | XBARA_SEL54_SEL108(x) |
|
#define | XBARA_SEL54_SEL109_MASK (0xFF00U) |
|
#define | XBARA_SEL54_SEL109_SHIFT (8U) |
| #define | XBARA_SEL54_SEL109(x) |
|
#define | XBARA_SEL54_SEL108_MASK (0xFFU) |
|
#define | XBARA_SEL54_SEL108_SHIFT (0U) |
| #define | XBARA_SEL54_SEL108(x) |
|
#define | XBARA_SEL54_SEL109_MASK (0xFF00U) |
|
#define | XBARA_SEL54_SEL109_SHIFT (8U) |
| #define | XBARA_SEL54_SEL109(x) |
|
|
#define | XBARA_SEL55_SEL110_MASK (0x7FU) |
|
#define | XBARA_SEL55_SEL110_SHIFT (0U) |
| #define | XBARA_SEL55_SEL110(x) |
|
#define | XBARA_SEL55_SEL111_MASK (0x7F00U) |
|
#define | XBARA_SEL55_SEL111_SHIFT (8U) |
| #define | XBARA_SEL55_SEL111(x) |
|
#define | XBARA_SEL55_SEL110_MASK (0xFFU) |
|
#define | XBARA_SEL55_SEL110_SHIFT (0U) |
| #define | XBARA_SEL55_SEL110(x) |
|
#define | XBARA_SEL55_SEL111_MASK (0xFF00U) |
|
#define | XBARA_SEL55_SEL111_SHIFT (8U) |
| #define | XBARA_SEL55_SEL111(x) |
|
#define | XBARA_SEL55_SEL110_MASK (0xFFU) |
|
#define | XBARA_SEL55_SEL110_SHIFT (0U) |
| #define | XBARA_SEL55_SEL110(x) |
|
#define | XBARA_SEL55_SEL111_MASK (0xFF00U) |
|
#define | XBARA_SEL55_SEL111_SHIFT (8U) |
| #define | XBARA_SEL55_SEL111(x) |
|
|
#define | XBARA_SEL56_SEL112_MASK (0x7FU) |
|
#define | XBARA_SEL56_SEL112_SHIFT (0U) |
| #define | XBARA_SEL56_SEL112(x) |
|
#define | XBARA_SEL56_SEL113_MASK (0x7F00U) |
|
#define | XBARA_SEL56_SEL113_SHIFT (8U) |
| #define | XBARA_SEL56_SEL113(x) |
|
#define | XBARA_SEL56_SEL112_MASK (0xFFU) |
|
#define | XBARA_SEL56_SEL112_SHIFT (0U) |
| #define | XBARA_SEL56_SEL112(x) |
|
#define | XBARA_SEL56_SEL113_MASK (0xFF00U) |
|
#define | XBARA_SEL56_SEL113_SHIFT (8U) |
| #define | XBARA_SEL56_SEL113(x) |
|
#define | XBARA_SEL56_SEL112_MASK (0xFFU) |
|
#define | XBARA_SEL56_SEL112_SHIFT (0U) |
| #define | XBARA_SEL56_SEL112(x) |
|
#define | XBARA_SEL56_SEL113_MASK (0xFF00U) |
|
#define | XBARA_SEL56_SEL113_SHIFT (8U) |
| #define | XBARA_SEL56_SEL113(x) |
|
|
#define | XBARA_SEL57_SEL114_MASK (0x7FU) |
|
#define | XBARA_SEL57_SEL114_SHIFT (0U) |
| #define | XBARA_SEL57_SEL114(x) |
|
#define | XBARA_SEL57_SEL115_MASK (0x7F00U) |
|
#define | XBARA_SEL57_SEL115_SHIFT (8U) |
| #define | XBARA_SEL57_SEL115(x) |
|
#define | XBARA_SEL57_SEL114_MASK (0xFFU) |
|
#define | XBARA_SEL57_SEL114_SHIFT (0U) |
| #define | XBARA_SEL57_SEL114(x) |
|
#define | XBARA_SEL57_SEL115_MASK (0xFF00U) |
|
#define | XBARA_SEL57_SEL115_SHIFT (8U) |
| #define | XBARA_SEL57_SEL115(x) |
|
#define | XBARA_SEL57_SEL114_MASK (0xFFU) |
|
#define | XBARA_SEL57_SEL114_SHIFT (0U) |
| #define | XBARA_SEL57_SEL114(x) |
|
#define | XBARA_SEL57_SEL115_MASK (0xFF00U) |
|
#define | XBARA_SEL57_SEL115_SHIFT (8U) |
| #define | XBARA_SEL57_SEL115(x) |
|
|
#define | XBARA_SEL58_SEL116_MASK (0x7FU) |
|
#define | XBARA_SEL58_SEL116_SHIFT (0U) |
| #define | XBARA_SEL58_SEL116(x) |
|
#define | XBARA_SEL58_SEL117_MASK (0x7F00U) |
|
#define | XBARA_SEL58_SEL117_SHIFT (8U) |
| #define | XBARA_SEL58_SEL117(x) |
|
#define | XBARA_SEL58_SEL116_MASK (0xFFU) |
|
#define | XBARA_SEL58_SEL116_SHIFT (0U) |
| #define | XBARA_SEL58_SEL116(x) |
|
#define | XBARA_SEL58_SEL117_MASK (0xFF00U) |
|
#define | XBARA_SEL58_SEL117_SHIFT (8U) |
| #define | XBARA_SEL58_SEL117(x) |
|
#define | XBARA_SEL58_SEL116_MASK (0xFFU) |
|
#define | XBARA_SEL58_SEL116_SHIFT (0U) |
| #define | XBARA_SEL58_SEL116(x) |
|
#define | XBARA_SEL58_SEL117_MASK (0xFF00U) |
|
#define | XBARA_SEL58_SEL117_SHIFT (8U) |
| #define | XBARA_SEL58_SEL117(x) |
|
|
#define | XBARA_SEL59_SEL118_MASK (0x7FU) |
|
#define | XBARA_SEL59_SEL118_SHIFT (0U) |
| #define | XBARA_SEL59_SEL118(x) |
|
#define | XBARA_SEL59_SEL119_MASK (0x7F00U) |
|
#define | XBARA_SEL59_SEL119_SHIFT (8U) |
| #define | XBARA_SEL59_SEL119(x) |
|
#define | XBARA_SEL59_SEL118_MASK (0xFFU) |
|
#define | XBARA_SEL59_SEL118_SHIFT (0U) |
| #define | XBARA_SEL59_SEL118(x) |
|
#define | XBARA_SEL59_SEL119_MASK (0xFF00U) |
|
#define | XBARA_SEL59_SEL119_SHIFT (8U) |
| #define | XBARA_SEL59_SEL119(x) |
|
#define | XBARA_SEL59_SEL118_MASK (0xFFU) |
|
#define | XBARA_SEL59_SEL118_SHIFT (0U) |
| #define | XBARA_SEL59_SEL118(x) |
|
#define | XBARA_SEL59_SEL119_MASK (0xFF00U) |
|
#define | XBARA_SEL59_SEL119_SHIFT (8U) |
| #define | XBARA_SEL59_SEL119(x) |
|
|
#define | XBARA_SEL60_SEL120_MASK (0x7FU) |
|
#define | XBARA_SEL60_SEL120_SHIFT (0U) |
| #define | XBARA_SEL60_SEL120(x) |
|
#define | XBARA_SEL60_SEL121_MASK (0x7F00U) |
|
#define | XBARA_SEL60_SEL121_SHIFT (8U) |
| #define | XBARA_SEL60_SEL121(x) |
|
#define | XBARA_SEL60_SEL120_MASK (0xFFU) |
|
#define | XBARA_SEL60_SEL120_SHIFT (0U) |
| #define | XBARA_SEL60_SEL120(x) |
|
#define | XBARA_SEL60_SEL121_MASK (0xFF00U) |
|
#define | XBARA_SEL60_SEL121_SHIFT (8U) |
| #define | XBARA_SEL60_SEL121(x) |
|
#define | XBARA_SEL60_SEL120_MASK (0xFFU) |
|
#define | XBARA_SEL60_SEL120_SHIFT (0U) |
| #define | XBARA_SEL60_SEL120(x) |
|
#define | XBARA_SEL60_SEL121_MASK (0xFF00U) |
|
#define | XBARA_SEL60_SEL121_SHIFT (8U) |
| #define | XBARA_SEL60_SEL121(x) |
|
|
#define | XBARA_SEL61_SEL122_MASK (0x7FU) |
|
#define | XBARA_SEL61_SEL122_SHIFT (0U) |
| #define | XBARA_SEL61_SEL122(x) |
|
#define | XBARA_SEL61_SEL123_MASK (0x7F00U) |
|
#define | XBARA_SEL61_SEL123_SHIFT (8U) |
| #define | XBARA_SEL61_SEL123(x) |
|
#define | XBARA_SEL61_SEL122_MASK (0xFFU) |
|
#define | XBARA_SEL61_SEL122_SHIFT (0U) |
| #define | XBARA_SEL61_SEL122(x) |
|
#define | XBARA_SEL61_SEL123_MASK (0xFF00U) |
|
#define | XBARA_SEL61_SEL123_SHIFT (8U) |
| #define | XBARA_SEL61_SEL123(x) |
|
#define | XBARA_SEL61_SEL122_MASK (0xFFU) |
|
#define | XBARA_SEL61_SEL122_SHIFT (0U) |
| #define | XBARA_SEL61_SEL122(x) |
|
#define | XBARA_SEL61_SEL123_MASK (0xFF00U) |
|
#define | XBARA_SEL61_SEL123_SHIFT (8U) |
| #define | XBARA_SEL61_SEL123(x) |
|
|
#define | XBARA_SEL62_SEL124_MASK (0x7FU) |
|
#define | XBARA_SEL62_SEL124_SHIFT (0U) |
| #define | XBARA_SEL62_SEL124(x) |
|
#define | XBARA_SEL62_SEL125_MASK (0x7F00U) |
|
#define | XBARA_SEL62_SEL125_SHIFT (8U) |
| #define | XBARA_SEL62_SEL125(x) |
|
#define | XBARA_SEL62_SEL124_MASK (0xFFU) |
|
#define | XBARA_SEL62_SEL124_SHIFT (0U) |
| #define | XBARA_SEL62_SEL124(x) |
|
#define | XBARA_SEL62_SEL125_MASK (0xFF00U) |
|
#define | XBARA_SEL62_SEL125_SHIFT (8U) |
| #define | XBARA_SEL62_SEL125(x) |
|
#define | XBARA_SEL62_SEL124_MASK (0xFFU) |
|
#define | XBARA_SEL62_SEL124_SHIFT (0U) |
| #define | XBARA_SEL62_SEL124(x) |
|
#define | XBARA_SEL62_SEL125_MASK (0xFF00U) |
|
#define | XBARA_SEL62_SEL125_SHIFT (8U) |
| #define | XBARA_SEL62_SEL125(x) |
|
|
#define | XBARA_SEL63_SEL126_MASK (0x7FU) |
|
#define | XBARA_SEL63_SEL126_SHIFT (0U) |
| #define | XBARA_SEL63_SEL126(x) |
|
#define | XBARA_SEL63_SEL127_MASK (0x7F00U) |
|
#define | XBARA_SEL63_SEL127_SHIFT (8U) |
| #define | XBARA_SEL63_SEL127(x) |
|
#define | XBARA_SEL63_SEL126_MASK (0xFFU) |
|
#define | XBARA_SEL63_SEL126_SHIFT (0U) |
| #define | XBARA_SEL63_SEL126(x) |
|
#define | XBARA_SEL63_SEL127_MASK (0xFF00U) |
|
#define | XBARA_SEL63_SEL127_SHIFT (8U) |
| #define | XBARA_SEL63_SEL127(x) |
|
#define | XBARA_SEL63_SEL126_MASK (0xFFU) |
|
#define | XBARA_SEL63_SEL126_SHIFT (0U) |
| #define | XBARA_SEL63_SEL126(x) |
|
#define | XBARA_SEL63_SEL127_MASK (0xFF00U) |
|
#define | XBARA_SEL63_SEL127_SHIFT (8U) |
| #define | XBARA_SEL63_SEL127(x) |
|
|
#define | XBARA_SEL64_SEL128_MASK (0x7FU) |
|
#define | XBARA_SEL64_SEL128_SHIFT (0U) |
| #define | XBARA_SEL64_SEL128(x) |
|
#define | XBARA_SEL64_SEL129_MASK (0x7F00U) |
|
#define | XBARA_SEL64_SEL129_SHIFT (8U) |
| #define | XBARA_SEL64_SEL129(x) |
|
#define | XBARA_SEL64_SEL128_MASK (0xFFU) |
|
#define | XBARA_SEL64_SEL128_SHIFT (0U) |
| #define | XBARA_SEL64_SEL128(x) |
|
#define | XBARA_SEL64_SEL129_MASK (0xFF00U) |
|
#define | XBARA_SEL64_SEL129_SHIFT (8U) |
| #define | XBARA_SEL64_SEL129(x) |
|
#define | XBARA_SEL64_SEL128_MASK (0xFFU) |
|
#define | XBARA_SEL64_SEL128_SHIFT (0U) |
| #define | XBARA_SEL64_SEL128(x) |
|
#define | XBARA_SEL64_SEL129_MASK (0xFF00U) |
|
#define | XBARA_SEL64_SEL129_SHIFT (8U) |
| #define | XBARA_SEL64_SEL129(x) |
|
|
#define | XBARA_SEL65_SEL130_MASK (0x7FU) |
|
#define | XBARA_SEL65_SEL130_SHIFT (0U) |
| #define | XBARA_SEL65_SEL130(x) |
|
#define | XBARA_SEL65_SEL131_MASK (0x7F00U) |
|
#define | XBARA_SEL65_SEL131_SHIFT (8U) |
| #define | XBARA_SEL65_SEL131(x) |
|
#define | XBARA_SEL65_SEL130_MASK (0xFFU) |
|
#define | XBARA_SEL65_SEL130_SHIFT (0U) |
| #define | XBARA_SEL65_SEL130(x) |
|
#define | XBARA_SEL65_SEL131_MASK (0xFF00U) |
|
#define | XBARA_SEL65_SEL131_SHIFT (8U) |
| #define | XBARA_SEL65_SEL131(x) |
|
#define | XBARA_SEL65_SEL130_MASK (0xFFU) |
|
#define | XBARA_SEL65_SEL130_SHIFT (0U) |
| #define | XBARA_SEL65_SEL130(x) |
|
#define | XBARA_SEL65_SEL131_MASK (0xFF00U) |
|
#define | XBARA_SEL65_SEL131_SHIFT (8U) |
| #define | XBARA_SEL65_SEL131(x) |
|
|
#define | XBARA_CTRL0_DEN0_MASK (0x1U) |
|
#define | XBARA_CTRL0_DEN0_SHIFT (0U) |
| #define | XBARA_CTRL0_DEN0(x) |
|
#define | XBARA_CTRL0_IEN0_MASK (0x2U) |
|
#define | XBARA_CTRL0_IEN0_SHIFT (1U) |
| #define | XBARA_CTRL0_IEN0(x) |
|
#define | XBARA_CTRL0_EDGE0_MASK (0xCU) |
|
#define | XBARA_CTRL0_EDGE0_SHIFT (2U) |
| #define | XBARA_CTRL0_EDGE0(x) |
|
#define | XBARA_CTRL0_STS0_MASK (0x10U) |
|
#define | XBARA_CTRL0_STS0_SHIFT (4U) |
| #define | XBARA_CTRL0_STS0(x) |
|
#define | XBARA_CTRL0_DEN1_MASK (0x100U) |
|
#define | XBARA_CTRL0_DEN1_SHIFT (8U) |
| #define | XBARA_CTRL0_DEN1(x) |
|
#define | XBARA_CTRL0_IEN1_MASK (0x200U) |
|
#define | XBARA_CTRL0_IEN1_SHIFT (9U) |
| #define | XBARA_CTRL0_IEN1(x) |
|
#define | XBARA_CTRL0_EDGE1_MASK (0xC00U) |
|
#define | XBARA_CTRL0_EDGE1_SHIFT (10U) |
| #define | XBARA_CTRL0_EDGE1(x) |
|
#define | XBARA_CTRL0_STS1_MASK (0x1000U) |
|
#define | XBARA_CTRL0_STS1_SHIFT (12U) |
| #define | XBARA_CTRL0_STS1(x) |
|
#define | XBARA_CTRL0_DEN0_MASK (0x1U) |
|
#define | XBARA_CTRL0_DEN0_SHIFT (0U) |
| #define | XBARA_CTRL0_DEN0(x) |
|
#define | XBARA_CTRL0_IEN0_MASK (0x2U) |
|
#define | XBARA_CTRL0_IEN0_SHIFT (1U) |
| #define | XBARA_CTRL0_IEN0(x) |
|
#define | XBARA_CTRL0_EDGE0_MASK (0xCU) |
|
#define | XBARA_CTRL0_EDGE0_SHIFT (2U) |
| #define | XBARA_CTRL0_EDGE0(x) |
|
#define | XBARA_CTRL0_STS0_MASK (0x10U) |
|
#define | XBARA_CTRL0_STS0_SHIFT (4U) |
| #define | XBARA_CTRL0_STS0(x) |
|
#define | XBARA_CTRL0_DEN1_MASK (0x100U) |
|
#define | XBARA_CTRL0_DEN1_SHIFT (8U) |
| #define | XBARA_CTRL0_DEN1(x) |
|
#define | XBARA_CTRL0_IEN1_MASK (0x200U) |
|
#define | XBARA_CTRL0_IEN1_SHIFT (9U) |
| #define | XBARA_CTRL0_IEN1(x) |
|
#define | XBARA_CTRL0_EDGE1_MASK (0xC00U) |
|
#define | XBARA_CTRL0_EDGE1_SHIFT (10U) |
| #define | XBARA_CTRL0_EDGE1(x) |
|
#define | XBARA_CTRL0_STS1_MASK (0x1000U) |
|
#define | XBARA_CTRL0_STS1_SHIFT (12U) |
| #define | XBARA_CTRL0_STS1(x) |
|
#define | XBARA_CTRL0_DEN0_MASK (0x1U) |
|
#define | XBARA_CTRL0_DEN0_SHIFT (0U) |
| #define | XBARA_CTRL0_DEN0(x) |
|
#define | XBARA_CTRL0_IEN0_MASK (0x2U) |
|
#define | XBARA_CTRL0_IEN0_SHIFT (1U) |
| #define | XBARA_CTRL0_IEN0(x) |
|
#define | XBARA_CTRL0_EDGE0_MASK (0xCU) |
|
#define | XBARA_CTRL0_EDGE0_SHIFT (2U) |
| #define | XBARA_CTRL0_EDGE0(x) |
|
#define | XBARA_CTRL0_STS0_MASK (0x10U) |
|
#define | XBARA_CTRL0_STS0_SHIFT (4U) |
| #define | XBARA_CTRL0_STS0(x) |
|
#define | XBARA_CTRL0_DEN1_MASK (0x100U) |
|
#define | XBARA_CTRL0_DEN1_SHIFT (8U) |
| #define | XBARA_CTRL0_DEN1(x) |
|
#define | XBARA_CTRL0_IEN1_MASK (0x200U) |
|
#define | XBARA_CTRL0_IEN1_SHIFT (9U) |
| #define | XBARA_CTRL0_IEN1(x) |
|
#define | XBARA_CTRL0_EDGE1_MASK (0xC00U) |
|
#define | XBARA_CTRL0_EDGE1_SHIFT (10U) |
| #define | XBARA_CTRL0_EDGE1(x) |
|
#define | XBARA_CTRL0_STS1_MASK (0x1000U) |
|
#define | XBARA_CTRL0_STS1_SHIFT (12U) |
| #define | XBARA_CTRL0_STS1(x) |
|
|
#define | XBARA_CTRL1_DEN2_MASK (0x1U) |
|
#define | XBARA_CTRL1_DEN2_SHIFT (0U) |
| #define | XBARA_CTRL1_DEN2(x) |
|
#define | XBARA_CTRL1_IEN2_MASK (0x2U) |
|
#define | XBARA_CTRL1_IEN2_SHIFT (1U) |
| #define | XBARA_CTRL1_IEN2(x) |
|
#define | XBARA_CTRL1_EDGE2_MASK (0xCU) |
|
#define | XBARA_CTRL1_EDGE2_SHIFT (2U) |
| #define | XBARA_CTRL1_EDGE2(x) |
|
#define | XBARA_CTRL1_STS2_MASK (0x10U) |
|
#define | XBARA_CTRL1_STS2_SHIFT (4U) |
| #define | XBARA_CTRL1_STS2(x) |
|
#define | XBARA_CTRL1_DEN3_MASK (0x100U) |
|
#define | XBARA_CTRL1_DEN3_SHIFT (8U) |
| #define | XBARA_CTRL1_DEN3(x) |
|
#define | XBARA_CTRL1_IEN3_MASK (0x200U) |
|
#define | XBARA_CTRL1_IEN3_SHIFT (9U) |
| #define | XBARA_CTRL1_IEN3(x) |
|
#define | XBARA_CTRL1_EDGE3_MASK (0xC00U) |
|
#define | XBARA_CTRL1_EDGE3_SHIFT (10U) |
| #define | XBARA_CTRL1_EDGE3(x) |
|
#define | XBARA_CTRL1_STS3_MASK (0x1000U) |
|
#define | XBARA_CTRL1_STS3_SHIFT (12U) |
| #define | XBARA_CTRL1_STS3(x) |
|
#define | XBARA_CTRL1_DEN2_MASK (0x1U) |
|
#define | XBARA_CTRL1_DEN2_SHIFT (0U) |
| #define | XBARA_CTRL1_DEN2(x) |
|
#define | XBARA_CTRL1_IEN2_MASK (0x2U) |
|
#define | XBARA_CTRL1_IEN2_SHIFT (1U) |
| #define | XBARA_CTRL1_IEN2(x) |
|
#define | XBARA_CTRL1_EDGE2_MASK (0xCU) |
|
#define | XBARA_CTRL1_EDGE2_SHIFT (2U) |
| #define | XBARA_CTRL1_EDGE2(x) |
|
#define | XBARA_CTRL1_STS2_MASK (0x10U) |
|
#define | XBARA_CTRL1_STS2_SHIFT (4U) |
| #define | XBARA_CTRL1_STS2(x) |
|
#define | XBARA_CTRL1_DEN3_MASK (0x100U) |
|
#define | XBARA_CTRL1_DEN3_SHIFT (8U) |
| #define | XBARA_CTRL1_DEN3(x) |
|
#define | XBARA_CTRL1_IEN3_MASK (0x200U) |
|
#define | XBARA_CTRL1_IEN3_SHIFT (9U) |
| #define | XBARA_CTRL1_IEN3(x) |
|
#define | XBARA_CTRL1_EDGE3_MASK (0xC00U) |
|
#define | XBARA_CTRL1_EDGE3_SHIFT (10U) |
| #define | XBARA_CTRL1_EDGE3(x) |
|
#define | XBARA_CTRL1_STS3_MASK (0x1000U) |
|
#define | XBARA_CTRL1_STS3_SHIFT (12U) |
| #define | XBARA_CTRL1_STS3(x) |
|
#define | XBARA_CTRL1_DEN2_MASK (0x1U) |
|
#define | XBARA_CTRL1_DEN2_SHIFT (0U) |
| #define | XBARA_CTRL1_DEN2(x) |
|
#define | XBARA_CTRL1_IEN2_MASK (0x2U) |
|
#define | XBARA_CTRL1_IEN2_SHIFT (1U) |
| #define | XBARA_CTRL1_IEN2(x) |
|
#define | XBARA_CTRL1_EDGE2_MASK (0xCU) |
|
#define | XBARA_CTRL1_EDGE2_SHIFT (2U) |
| #define | XBARA_CTRL1_EDGE2(x) |
|
#define | XBARA_CTRL1_STS2_MASK (0x10U) |
|
#define | XBARA_CTRL1_STS2_SHIFT (4U) |
| #define | XBARA_CTRL1_STS2(x) |
|
#define | XBARA_CTRL1_DEN3_MASK (0x100U) |
|
#define | XBARA_CTRL1_DEN3_SHIFT (8U) |
| #define | XBARA_CTRL1_DEN3(x) |
|
#define | XBARA_CTRL1_IEN3_MASK (0x200U) |
|
#define | XBARA_CTRL1_IEN3_SHIFT (9U) |
| #define | XBARA_CTRL1_IEN3(x) |
|
#define | XBARA_CTRL1_EDGE3_MASK (0xC00U) |
|
#define | XBARA_CTRL1_EDGE3_SHIFT (10U) |
| #define | XBARA_CTRL1_EDGE3(x) |
|
#define | XBARA_CTRL1_STS3_MASK (0x1000U) |
|
#define | XBARA_CTRL1_STS3_SHIFT (12U) |
| #define | XBARA_CTRL1_STS3(x) |