RTEMS 6.3
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Topics

 TSC Register Masks

Data Structures

struct  TSC_Type

Macros

#define TSC_BASE   (0x400E0000u)
#define TSC   ((TSC_Type *)TSC_BASE)
#define TSC_BASE_ADDRS   { TSC_BASE }
#define TSC_BASE_PTRS   { TSC }
#define TSC_IRQS   { TSC_DIG_IRQn }
#define TSC_BASIC_SETTING__4_5_WIRE_MASK   TSC_BASIC_SETTING_WIRE_4_5_MASK
#define TSC_BASIC_SETTING__4_5_WIRE_SHIFT   TSC_BASIC_SETTING_WIRE_4_5_SHIFT
#define TSC_BASIC_SETTING__4_5_WIRE(x)

Detailed Description

Macro Definition Documentation

◆ TSC

#define TSC   ((TSC_Type *)TSC_BASE)

Peripheral TSC base pointer

◆ TSC_BASE

#define TSC_BASE   (0x400E0000u)

Peripheral TSC base address

◆ TSC_BASE_ADDRS

#define TSC_BASE_ADDRS   { TSC_BASE }

Array initializer of TSC peripheral base addresses

◆ TSC_BASE_PTRS

#define TSC_BASE_PTRS   { TSC }

Array initializer of TSC peripheral base pointers

◆ TSC_BASIC_SETTING__4_5_WIRE

#define TSC_BASIC_SETTING__4_5_WIRE ( x)
Value:
#define TSC_BASIC_SETTING_WIRE_4_5(x)
Definition MIMXRT1052.h:44787

◆ TSC_IRQS

#define TSC_IRQS   { TSC_DIG_IRQn }

Interrupt vectors for the TSC peripheral type