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RTEMS 6.3
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This group contains register bit definitions. More...
Macros | |
| #define | L2CACHE_L2CS_LS 0x1000000U |
| #define | L2CACHE_L2CS_AT 0x800000U |
| #define | L2CACHE_L2CS_MP 0x400000U |
| #define | L2CACHE_L2CS_MTRR_SHIFT 16 |
| #define | L2CACHE_L2CS_MTRR_MASK 0x3f0000U |
| #define | L2CACHE_L2CS_MTRR_GET(_reg) |
| #define | L2CACHE_L2CS_MTRR_SET(_reg, _val) |
| #define | L2CACHE_L2CS_MTRR(_val) |
| #define | L2CACHE_L2CS_BBUS_W_SHIFT 13 |
| #define | L2CACHE_L2CS_BBUS_W_MASK 0xe000U |
| #define | L2CACHE_L2CS_BBUS_W_GET(_reg) |
| #define | L2CACHE_L2CS_BBUS_W_SET(_reg, _val) |
| #define | L2CACHE_L2CS_BBUS_W(_val) |
| #define | L2CACHE_L2CS_WAY_SIZE_SHIFT 2 |
| #define | L2CACHE_L2CS_WAY_SIZE_MASK 0x1ffcU |
| #define | L2CACHE_L2CS_WAY_SIZE_GET(_reg) |
| #define | L2CACHE_L2CS_WAY_SIZE_SET(_reg, _val) |
| #define | L2CACHE_L2CS_WAY_SIZE(_val) |
| #define | L2CACHE_L2CS_WAY_SHIFT 0 |
| #define | L2CACHE_L2CS_WAY_MASK 0x3U |
| #define | L2CACHE_L2CS_WAY_GET(_reg) |
| #define | L2CACHE_L2CS_WAY_SET(_reg, _val) |
| #define | L2CACHE_L2CS_WAY(_val) |
This group contains register bit definitions.
| #define L2CACHE_L2CS_BBUS_W | ( | _val | ) |
| #define L2CACHE_L2CS_BBUS_W_GET | ( | _reg | ) |
| #define L2CACHE_L2CS_BBUS_W_SET | ( | _reg, | |
| _val ) |
| #define L2CACHE_L2CS_MTRR | ( | _val | ) |
| #define L2CACHE_L2CS_MTRR_GET | ( | _reg | ) |
| #define L2CACHE_L2CS_MTRR_SET | ( | _reg, | |
| _val ) |
| #define L2CACHE_L2CS_WAY | ( | _val | ) |
| #define L2CACHE_L2CS_WAY_GET | ( | _reg | ) |
| #define L2CACHE_L2CS_WAY_SET | ( | _reg, | |
| _val ) |
| #define L2CACHE_L2CS_WAY_SIZE | ( | _val | ) |
| #define L2CACHE_L2CS_WAY_SIZE_GET | ( | _reg | ) |
| #define L2CACHE_L2CS_WAY_SIZE_SET | ( | _reg, | |
| _val ) |