RTEMS 6.3
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Processor n extended interrupt acknowledge register (PEXTACK)

This group contains register bit definitions. More...

Macros

#define IRQAMP_PEXTACK_EID_4_0_SHIFT   0
#define IRQAMP_PEXTACK_EID_4_0_MASK   0x1fU
#define IRQAMP_PEXTACK_EID_4_0_GET(_reg)
#define IRQAMP_PEXTACK_EID_4_0_SET(_reg, _val)
#define IRQAMP_PEXTACK_EID_4_0(_val)

Detailed Description

This group contains register bit definitions.

Macro Definition Documentation

◆ IRQAMP_PEXTACK_EID_4_0

#define IRQAMP_PEXTACK_EID_4_0 ( _val)
Value:
( ( ( _val ) << IRQAMP_PEXTACK_EID_4_0_SHIFT ) & \
IRQAMP_PEXTACK_EID_4_0_MASK )

◆ IRQAMP_PEXTACK_EID_4_0_GET

#define IRQAMP_PEXTACK_EID_4_0_GET ( _reg)
Value:
( ( ( _reg ) & IRQAMP_PEXTACK_EID_4_0_MASK ) >> \
IRQAMP_PEXTACK_EID_4_0_SHIFT )

◆ IRQAMP_PEXTACK_EID_4_0_SET

#define IRQAMP_PEXTACK_EID_4_0_SET ( _reg,
_val )
Value:
( ( ( _reg ) & ~IRQAMP_PEXTACK_EID_4_0_MASK ) | \
( ( ( _val ) << IRQAMP_PEXTACK_EID_4_0_SHIFT ) & \
IRQAMP_PEXTACK_EID_4_0_MASK ) )