Interrupt controller select register (ICSELR)

This group contains register bit definitions. More...

Macros
#define	IRQAMP_ICSELR_ICSEL0_SHIFT   28
#define	IRQAMP_ICSELR_ICSEL0_MASK   0xf0000000U
#define	IRQAMP_ICSELR_ICSEL0_GET(_reg)
#define	IRQAMP_ICSELR_ICSEL0_SET(_reg, _val)
#define	IRQAMP_ICSELR_ICSEL0(_val)
#define	IRQAMP_ICSELR_ICSEL1_SHIFT   24
#define	IRQAMP_ICSELR_ICSEL1_MASK   0xf000000U
#define	IRQAMP_ICSELR_ICSEL1_GET(_reg)
#define	IRQAMP_ICSELR_ICSEL1_SET(_reg, _val)
#define	IRQAMP_ICSELR_ICSEL1(_val)
#define	IRQAMP_ICSELR_ICSEL2_SHIFT   20
#define	IRQAMP_ICSELR_ICSEL2_MASK   0xf00000U
#define	IRQAMP_ICSELR_ICSEL2_GET(_reg)
#define	IRQAMP_ICSELR_ICSEL2_SET(_reg, _val)
#define	IRQAMP_ICSELR_ICSEL2(_val)
#define	IRQAMP_ICSELR_ICSEL3_SHIFT   16
#define	IRQAMP_ICSELR_ICSEL3_MASK   0xf0000U
#define	IRQAMP_ICSELR_ICSEL3_GET(_reg)
#define	IRQAMP_ICSELR_ICSEL3_SET(_reg, _val)
#define	IRQAMP_ICSELR_ICSEL3(_val)

Detailed Description

This group contains register bit definitions.

Macro Definition Documentation

IRQAMP_ICSELR_ICSEL0

#define IRQAMP_ICSELR_ICSEL0

(

_val

)

Value:

( ( ( _val ) << IRQAMP_ICSELR_ICSEL0_SHIFT ) & \
  IRQAMP_ICSELR_ICSEL0_MASK )

IRQAMP_ICSELR_ICSEL0_GET

#define IRQAMP_ICSELR_ICSEL0_GET

(

_reg

)

Value:

( ( ( _reg ) & IRQAMP_ICSELR_ICSEL0_MASK ) >> \
  IRQAMP_ICSELR_ICSEL0_SHIFT )

IRQAMP_ICSELR_ICSEL0_SET

#define IRQAMP_ICSELR_ICSEL0_SET	(		_reg,
			_val )

Value:

( ( ( _reg ) & ~IRQAMP_ICSELR_ICSEL0_MASK ) | \
  ( ( ( _val ) << IRQAMP_ICSELR_ICSEL0_SHIFT ) & \
    IRQAMP_ICSELR_ICSEL0_MASK ) )

IRQAMP_ICSELR_ICSEL1

#define IRQAMP_ICSELR_ICSEL1

(

_val

)

Value:

( ( ( _val ) << IRQAMP_ICSELR_ICSEL1_SHIFT ) & \
  IRQAMP_ICSELR_ICSEL1_MASK )

IRQAMP_ICSELR_ICSEL1_GET

#define IRQAMP_ICSELR_ICSEL1_GET

(

_reg

)

Value:

( ( ( _reg ) & IRQAMP_ICSELR_ICSEL1_MASK ) >> \
  IRQAMP_ICSELR_ICSEL1_SHIFT )

IRQAMP_ICSELR_ICSEL1_SET

#define IRQAMP_ICSELR_ICSEL1_SET	(		_reg,
			_val )

Value:

( ( ( _reg ) & ~IRQAMP_ICSELR_ICSEL1_MASK ) | \
  ( ( ( _val ) << IRQAMP_ICSELR_ICSEL1_SHIFT ) & \
    IRQAMP_ICSELR_ICSEL1_MASK ) )

IRQAMP_ICSELR_ICSEL2

#define IRQAMP_ICSELR_ICSEL2

(

_val

)

Value:

( ( ( _val ) << IRQAMP_ICSELR_ICSEL2_SHIFT ) & \
  IRQAMP_ICSELR_ICSEL2_MASK )

IRQAMP_ICSELR_ICSEL2_GET

#define IRQAMP_ICSELR_ICSEL2_GET

(

_reg

)

Value:

( ( ( _reg ) & IRQAMP_ICSELR_ICSEL2_MASK ) >> \
  IRQAMP_ICSELR_ICSEL2_SHIFT )

IRQAMP_ICSELR_ICSEL2_SET

#define IRQAMP_ICSELR_ICSEL2_SET	(		_reg,
			_val )

Value:

( ( ( _reg ) & ~IRQAMP_ICSELR_ICSEL2_MASK ) | \
  ( ( ( _val ) << IRQAMP_ICSELR_ICSEL2_SHIFT ) & \
    IRQAMP_ICSELR_ICSEL2_MASK ) )

IRQAMP_ICSELR_ICSEL3

#define IRQAMP_ICSELR_ICSEL3

(

_val

)

Value:

( ( ( _val ) << IRQAMP_ICSELR_ICSEL3_SHIFT ) & \
  IRQAMP_ICSELR_ICSEL3_MASK )

IRQAMP_ICSELR_ICSEL3_GET

#define IRQAMP_ICSELR_ICSEL3_GET

(

_reg

)

Value:

( ( ( _reg ) & IRQAMP_ICSELR_ICSEL3_MASK ) >> \
  IRQAMP_ICSELR_ICSEL3_SHIFT )

IRQAMP_ICSELR_ICSEL3_SET

#define IRQAMP_ICSELR_ICSEL3_SET	(		_reg,
			_val )

Value:

( ( ( _reg ) & ~IRQAMP_ICSELR_ICSEL3_MASK ) | \
  ( ( ( _val ) << IRQAMP_ICSELR_ICSEL3_SHIFT ) & \
    IRQAMP_ICSELR_ICSEL3_MASK ) )