RTEMS 6.3
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Memory configuration register 5 (MCFG5)

This group contains register bit definitions. More...

Macros

#define FTMCTRL_MCFG5_IOHWS_SHIFT   23
#define FTMCTRL_MCFG5_IOHWS_MASK   0x3f800000U
#define FTMCTRL_MCFG5_IOHWS_GET(_reg)
#define FTMCTRL_MCFG5_IOHWS_SET(_reg, _val)
#define FTMCTRL_MCFG5_IOHWS(_val)
#define FTMCTRL_MCFG5_ROMHWS_SHIFT   7
#define FTMCTRL_MCFG5_ROMHWS_MASK   0x3f80U
#define FTMCTRL_MCFG5_ROMHWS_GET(_reg)
#define FTMCTRL_MCFG5_ROMHWS_SET(_reg, _val)
#define FTMCTRL_MCFG5_ROMHWS(_val)

Detailed Description

This group contains register bit definitions.

Macro Definition Documentation

◆ FTMCTRL_MCFG5_IOHWS

#define FTMCTRL_MCFG5_IOHWS ( _val)
Value:
( ( ( _val ) << FTMCTRL_MCFG5_IOHWS_SHIFT ) & \
FTMCTRL_MCFG5_IOHWS_MASK )

◆ FTMCTRL_MCFG5_IOHWS_GET

#define FTMCTRL_MCFG5_IOHWS_GET ( _reg)
Value:
( ( ( _reg ) & FTMCTRL_MCFG5_IOHWS_MASK ) >> \
FTMCTRL_MCFG5_IOHWS_SHIFT )

◆ FTMCTRL_MCFG5_IOHWS_SET

#define FTMCTRL_MCFG5_IOHWS_SET ( _reg,
_val )
Value:
( ( ( _reg ) & ~FTMCTRL_MCFG5_IOHWS_MASK ) | \
( ( ( _val ) << FTMCTRL_MCFG5_IOHWS_SHIFT ) & \
FTMCTRL_MCFG5_IOHWS_MASK ) )

◆ FTMCTRL_MCFG5_ROMHWS

#define FTMCTRL_MCFG5_ROMHWS ( _val)
Value:
( ( ( _val ) << FTMCTRL_MCFG5_ROMHWS_SHIFT ) & \
FTMCTRL_MCFG5_ROMHWS_MASK )

◆ FTMCTRL_MCFG5_ROMHWS_GET

#define FTMCTRL_MCFG5_ROMHWS_GET ( _reg)
Value:
( ( ( _reg ) & FTMCTRL_MCFG5_ROMHWS_MASK ) >> \
FTMCTRL_MCFG5_ROMHWS_SHIFT )

◆ FTMCTRL_MCFG5_ROMHWS_SET

#define FTMCTRL_MCFG5_ROMHWS_SET ( _reg,
_val )
Value:
( ( ( _reg ) & ~FTMCTRL_MCFG5_ROMHWS_MASK ) | \
( ( ( _val ) << FTMCTRL_MCFG5_ROMHWS_SHIFT ) & \
FTMCTRL_MCFG5_ROMHWS_MASK ) )