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RTEMS 6.3
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This group contains register bit definitions. More...
Macros | |
| #define | FTMCTRL_MCFG5_IOHWS_SHIFT 23 |
| #define | FTMCTRL_MCFG5_IOHWS_MASK 0x3f800000U |
| #define | FTMCTRL_MCFG5_IOHWS_GET(_reg) |
| #define | FTMCTRL_MCFG5_IOHWS_SET(_reg, _val) |
| #define | FTMCTRL_MCFG5_IOHWS(_val) |
| #define | FTMCTRL_MCFG5_ROMHWS_SHIFT 7 |
| #define | FTMCTRL_MCFG5_ROMHWS_MASK 0x3f80U |
| #define | FTMCTRL_MCFG5_ROMHWS_GET(_reg) |
| #define | FTMCTRL_MCFG5_ROMHWS_SET(_reg, _val) |
| #define | FTMCTRL_MCFG5_ROMHWS(_val) |
This group contains register bit definitions.
| #define FTMCTRL_MCFG5_IOHWS | ( | _val | ) |
| #define FTMCTRL_MCFG5_IOHWS_GET | ( | _reg | ) |
| #define FTMCTRL_MCFG5_IOHWS_SET | ( | _reg, | |
| _val ) |
| #define FTMCTRL_MCFG5_ROMHWS | ( | _val | ) |
| #define FTMCTRL_MCFG5_ROMHWS_GET | ( | _reg | ) |
| #define FTMCTRL_MCFG5_ROMHWS_SET | ( | _reg, | |
| _val ) |