RTEMS 6.3
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Instruction trace count register (ICNT)

This group contains register bit definitions. More...

Macros

#define DSU4_ICNT_CE   0x80000000U
#define DSU4_ICNT_IC   0x40000000U
#define DSU4_ICNT_PE   0x20000000U
#define DSU4_ICNT_ICOUNT_28_0_SHIFT   0
#define DSU4_ICNT_ICOUNT_28_0_MASK   0x1fffffffU
#define DSU4_ICNT_ICOUNT_28_0_GET(_reg)
#define DSU4_ICNT_ICOUNT_28_0_SET(_reg, _val)
#define DSU4_ICNT_ICOUNT_28_0(_val)

Detailed Description

This group contains register bit definitions.

Macro Definition Documentation

◆ DSU4_ICNT_ICOUNT_28_0

#define DSU4_ICNT_ICOUNT_28_0 ( _val)
Value:
( ( ( _val ) << DSU4_ICNT_ICOUNT_28_0_SHIFT ) & \
DSU4_ICNT_ICOUNT_28_0_MASK )

◆ DSU4_ICNT_ICOUNT_28_0_GET

#define DSU4_ICNT_ICOUNT_28_0_GET ( _reg)
Value:
( ( ( _reg ) & DSU4_ICNT_ICOUNT_28_0_MASK ) >> \
DSU4_ICNT_ICOUNT_28_0_SHIFT )

◆ DSU4_ICNT_ICOUNT_28_0_SET

#define DSU4_ICNT_ICOUNT_28_0_SET ( _reg,
_val )
Value:
( ( ( _reg ) & ~DSU4_ICNT_ICOUNT_28_0_MASK ) | \
( ( ( _val ) << DSU4_ICNT_ICOUNT_28_0_SHIFT ) & \
DSU4_ICNT_ICOUNT_28_0_MASK ) )