AHB trace buffer filter control register (ATBFC)

This group contains register bit definitions. More...

Macros
#define	DSU4_ATBFC_WPF_SHIFT   12
#define	DSU4_ATBFC_WPF_MASK   0x3000U
#define	DSU4_ATBFC_WPF_GET(_reg)
#define	DSU4_ATBFC_WPF_SET(_reg, _val)
#define	DSU4_ATBFC_WPF(_val)
#define	DSU4_ATBFC_BPF_SHIFT   8
#define	DSU4_ATBFC_BPF_MASK   0x300U
#define	DSU4_ATBFC_BPF_GET(_reg)
#define	DSU4_ATBFC_BPF_SET(_reg, _val)
#define	DSU4_ATBFC_BPF(_val)
#define	DSU4_ATBFC_PF   0x8U
#define	DSU4_ATBFC_AF   0x4U
#define	DSU4_ATBFC_FR   0x2U
#define	DSU4_ATBFC_FW   0x1U

Detailed Description

This group contains register bit definitions.

Macro Definition Documentation

DSU4_ATBFC_BPF

#define DSU4_ATBFC_BPF

(

_val

)

Value:

( ( ( _val ) << DSU4_ATBFC_BPF_SHIFT ) & \
  DSU4_ATBFC_BPF_MASK )

DSU4_ATBFC_BPF_GET

#define DSU4_ATBFC_BPF_GET

(

_reg

)

Value:

( ( ( _reg ) & DSU4_ATBFC_BPF_MASK ) >> \
  DSU4_ATBFC_BPF_SHIFT )

DSU4_ATBFC_BPF_SET

#define DSU4_ATBFC_BPF_SET	(		_reg,
			_val )

Value:

( ( ( _reg ) & ~DSU4_ATBFC_BPF_MASK ) | \
  ( ( ( _val ) << DSU4_ATBFC_BPF_SHIFT ) & \
    DSU4_ATBFC_BPF_MASK ) )

DSU4_ATBFC_WPF

#define DSU4_ATBFC_WPF

(

_val

)

Value:

( ( ( _val ) << DSU4_ATBFC_WPF_SHIFT ) & \
  DSU4_ATBFC_WPF_MASK )

DSU4_ATBFC_WPF_GET

#define DSU4_ATBFC_WPF_GET

(

_reg

)

Value:

( ( ( _reg ) & DSU4_ATBFC_WPF_MASK ) >> \
  DSU4_ATBFC_WPF_SHIFT )

DSU4_ATBFC_WPF_SET

#define DSU4_ATBFC_WPF_SET	(		_reg,
			_val )

Value:

( ( ( _reg ) & ~DSU4_ATBFC_WPF_MASK ) | \
  ( ( ( _val ) << DSU4_ATBFC_WPF_SHIFT ) & \
    DSU4_ATBFC_WPF_MASK ) )